267 	if (txq_id != trans_pcie->cmd_queue)  in iwl_pcie_txq_inval_byte_cnt_tbl()
297 	    txq_id != trans_pcie->cmd_queue &&  in iwl_pcie_txq_inc_wr_ptr()
506 	if (txq_id == trans_pcie->cmd_queue)  in iwl_pcie_txq_alloc()
541 	if (txq->entries && txq_id == trans_pcie->cmd_queue)  in iwl_pcie_txq_alloc()
623 	if (txq_id == trans_pcie->cmd_queue)  in iwl_pcie_txq_free()
684 	iwl_trans_ac_txq_enable(trans, trans_pcie->cmd_queue,  in iwl_pcie_tx_start()
871 		slots_num = (txq_id == trans_pcie->cmd_queue) ?  in iwl_pcie_tx_alloc()
916 		slots_num = (txq_id == trans_pcie->cmd_queue) ?  in iwl_pcie_tx_init()
974 	if (WARN_ON(txq_id == trans_pcie->cmd_queue))  in iwl_trans_pcie_reclaim()
1192 		if (txq_id == trans_pcie->cmd_queue &&  in iwl_trans_pcie_txq_enable()
1200 		if (txq_id != trans_pcie->cmd_queue)  in iwl_trans_pcie_txq_enable()
1255 		if (txq_id == trans_pcie->cmd_queue &&  in iwl_trans_pcie_txq_enable()
1322 	struct iwl_txq *txq = &trans_pcie->txq[trans_pcie->cmd_queue];  in iwl_pcie_enqueue_hcmd()
1448 			cpu_to_le16(QUEUE_TO_SEQ(trans_pcie->cmd_queue) |  in iwl_pcie_enqueue_hcmd()
1456 			cpu_to_le16(QUEUE_TO_SEQ(trans_pcie->cmd_queue) |  in iwl_pcie_enqueue_hcmd()
1507 		     cmd_size, q->write_ptr, idx, trans_pcie->cmd_queue);  in iwl_pcie_enqueue_hcmd()
1610 	struct iwl_txq *txq = &trans_pcie->txq[trans_pcie->cmd_queue];  in iwl_pcie_hcmd_complete()
1615 	if (WARN(txq_id != trans_pcie->cmd_queue,  in iwl_pcie_hcmd_complete()
1617 		 txq_id, trans_pcie->cmd_queue, sequence,  in iwl_pcie_hcmd_complete()
1618 		 trans_pcie->txq[trans_pcie->cmd_queue].q.read_ptr,  in iwl_pcie_hcmd_complete()
1619 		 trans_pcie->txq[trans_pcie->cmd_queue].q.write_ptr)) {  in iwl_pcie_hcmd_complete()
1716 		struct iwl_txq *txq = &trans_pcie->txq[trans_pcie->cmd_queue];  in iwl_pcie_send_hcmd_sync()
1769 		trans_pcie->txq[trans_pcie->cmd_queue].  in iwl_pcie_send_hcmd_sync()