219 		iwl_set_bit(trans, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED);  in iwl_pcie_apm_config()
248 		iwl_set_bit(trans, CSR_GIO_CHICKEN_BITS,  in iwl_pcie_apm_init()
255 	iwl_set_bit(trans, CSR_GIO_CHICKEN_BITS,  in iwl_pcie_apm_init()
259 	iwl_set_bit(trans, CSR_DBG_HPET_MEM_REG, CSR_DBG_HPET_MEM_REG_VAL);  in iwl_pcie_apm_init()
265 	iwl_set_bit(trans, CSR_HW_IF_CONFIG_REG,  in iwl_pcie_apm_init()
272 		iwl_set_bit(trans, CSR_ANA_PLL_CFG,  in iwl_pcie_apm_init()
279 	iwl_set_bit(trans, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);  in iwl_pcie_apm_init()
362 	iwl_set_bit(trans, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);  in iwl_pcie_apm_lp_xtal_enable()
370 	iwl_set_bit(trans, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);  in iwl_pcie_apm_lp_xtal_enable()
409 	iwl_set_bit(trans, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);  in iwl_pcie_apm_lp_xtal_enable()
428 	iwl_set_bit(trans, CSR_HW_IF_CONFIG_REG,  in iwl_pcie_apm_lp_xtal_enable()
458 	iwl_set_bit(trans, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);  in iwl_pcie_apm_stop_master()
484 			iwl_set_bit(trans, CSR_DBG_LINK_PWR_MGMT_REG,  in iwl_pcie_apm_stop()
486 			iwl_set_bit(trans, CSR_HW_IF_CONFIG_REG,  in iwl_pcie_apm_stop()
507 	iwl_set_bit(trans, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);  in iwl_pcie_apm_stop()
542 		iwl_set_bit(trans, CSR_MAC_SHADOW_REG_CTRL, 0x800FFFFF);  in iwl_pcie_nic_init()
556 	iwl_set_bit(trans, CSR_HW_IF_CONFIG_REG,  in iwl_pcie_set_hw_ready()
566 		iwl_set_bit(trans, CSR_MBOX_SET_REG, CSR_MBOX_SET_REG_OS_ALIVE);  in iwl_pcie_set_hw_ready()
586 	iwl_set_bit(trans, CSR_DBG_LINK_PWR_MGMT_REG,  in iwl_pcie_prepare_card_hw()
592 		iwl_set_bit(trans, CSR_HW_IF_CONFIG_REG,  in iwl_pcie_prepare_card_hw()
896 			iwl_set_bit(trans, addr, BIT(val));  in iwl_pcie_apply_destination()
1227 		iwl_set_bit(trans, CSR_HW_IF_CONFIG_REG,  in iwl_trans_pcie_d3_suspend()
1281 	iwl_set_bit(trans, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);  in iwl_trans_pcie_d3_resume()
1282 	iwl_set_bit(trans, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);  in iwl_trans_pcie_d3_resume()
2771 		iwl_set_bit(trans, CSR_GP_CNTRL,  in iwl_trans_pcie_alloc()