Lines Matching refs:rxon
3691 struct il_rxon_cmd *rxon = &il->staging; in il_set_rxon_hwcrypto() local
3694 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK; in il_set_rxon_hwcrypto()
3696 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK; in il_set_rxon_hwcrypto()
3705 struct il_rxon_cmd *rxon = &il->staging; in il_check_rxon_cmd() local
3708 if (rxon->flags & RXON_FLG_BAND_24G_MSK) { in il_check_rxon_cmd()
3709 if (rxon->flags & RXON_FLG_TGJ_NARROW_BAND_MSK) { in il_check_rxon_cmd()
3713 if (rxon->flags & RXON_FLG_RADAR_DETECT_MSK) { in il_check_rxon_cmd()
3718 if (!(rxon->flags & RXON_FLG_SHORT_SLOT_MSK)) { in il_check_rxon_cmd()
3722 if (rxon->flags & RXON_FLG_CCK_MSK) { in il_check_rxon_cmd()
3727 if ((rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1) { in il_check_rxon_cmd()
3733 if ((rxon->ofdm_basic_rates & RATE_6M_MASK) == 0 && in il_check_rxon_cmd()
3734 (rxon->cck_basic_rates & RATE_1M_MASK) == 0) { in il_check_rxon_cmd()
3739 if (le16_to_cpu(rxon->assoc_id) > 2007) { in il_check_rxon_cmd()
3744 if ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)) == in il_check_rxon_cmd()
3750 if ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)) == in il_check_rxon_cmd()
3756 if ((rxon-> in il_check_rxon_cmd()
3764 IL_WARN("Tuning to channel %d\n", le16_to_cpu(rxon->channel)); in il_check_rxon_cmd()
3853 struct il_rxon_cmd *rxon = &il->staging; in _il_set_rxon_ht() local
3856 rxon->flags &= in _il_set_rxon_ht()
3863 rxon->flags |= in _il_set_rxon_ht()
3869 rxon->flags &= in _il_set_rxon_ht()
3874 rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40; in _il_set_rxon_ht()
3878 rxon->flags &= in _il_set_rxon_ht()
3882 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK; in _il_set_rxon_ht()
3889 rxon->flags &= in _il_set_rxon_ht()
3891 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED; in _il_set_rxon_ht()
3894 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK; in _il_set_rxon_ht()
3895 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED; in _il_set_rxon_ht()
3905 rxon->flags |= RXON_FLG_CHANNEL_MODE_LEGACY; in _il_set_rxon_ht()
3912 "extension channel offset 0x%x\n", le32_to_cpu(rxon->flags), in _il_set_rxon_ht()
4119 struct il_rxon_cmd *rxon = (void *)&il->active; in il_hdl_csa() local
4125 rxon->channel = csa->channel; in il_hdl_csa()
4141 struct il_rxon_cmd *rxon = &il->staging; in il_print_rx_config_cmd() local
4144 il_print_hex_dump(il, IL_DL_RADIO, (u8 *) rxon, sizeof(*rxon)); in il_print_rx_config_cmd()
4145 D_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel)); in il_print_rx_config_cmd()
4146 D_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags)); in il_print_rx_config_cmd()
4147 D_RADIO("u32 filter_flags: 0x%08x\n", le32_to_cpu(rxon->filter_flags)); in il_print_rx_config_cmd()
4148 D_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type); in il_print_rx_config_cmd()
4149 D_RADIO("u8 ofdm_basic_rates: 0x%02x\n", rxon->ofdm_basic_rates); in il_print_rx_config_cmd()
4150 D_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates); in il_print_rx_config_cmd()
4151 D_RADIO("u8[6] node_addr: %pM\n", rxon->node_addr); in il_print_rx_config_cmd()
4152 D_RADIO("u8[6] bssid_addr: %pM\n", rxon->bssid_addr); in il_print_rx_config_cmd()
4153 D_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id)); in il_print_rx_config_cmd()