Lines Matching refs:il
82 il4965_check_abort_status(struct il_priv *il, u8 frame_count, u32 status) in il4965_check_abort_status() argument
86 if (!test_bit(S_EXIT_PENDING, &il->status)) in il4965_check_abort_status()
87 queue_work(il->workqueue, &il->tx_flush); in il4965_check_abort_status()
100 il4965_rx_queue_reset(struct il_priv *il, struct il_rx_queue *rxq) in il4965_rx_queue_reset() argument
112 pci_unmap_page(il->pci_dev, rxq->pool[i].page_dma, in il4965_rx_queue_reset()
113 PAGE_SIZE << il->hw_params.rx_page_order, in il4965_rx_queue_reset()
115 __il_free_pages(il, rxq->pool[i].page); in il4965_rx_queue_reset()
133 il4965_rx_init(struct il_priv *il, struct il_rx_queue *rxq) in il4965_rx_init() argument
139 if (il->cfg->mod_params->amsdu_size_8K) in il4965_rx_init()
145 il_wr(il, FH49_MEM_RCSR_CHNL0_CONFIG_REG, 0); in il4965_rx_init()
148 il_wr(il, FH49_RSCSR_CHNL0_RBDCB_WPTR_REG, 0); in il4965_rx_init()
151 il_wr(il, FH49_RSCSR_CHNL0_RBDCB_BASE_REG, (u32) (rxq->bd_dma >> 8)); in il4965_rx_init()
154 il_wr(il, FH49_RSCSR_CHNL0_STTS_WPTR_REG, rxq->rb_stts_dma >> 4); in il4965_rx_init()
162 il_wr(il, FH49_MEM_RCSR_CHNL0_CONFIG_REG, in il4965_rx_init()
171 il_write8(il, CSR_INT_COALESCING, IL_HOST_INT_TIMEOUT_DEF); in il4965_rx_init()
177 il4965_set_pwr_vmain(struct il_priv *il) in il4965_set_pwr_vmain() argument
189 il_set_bits_mask_prph(il, APMG_PS_CTRL_REG, in il4965_set_pwr_vmain()
195 il4965_hw_nic_init(struct il_priv *il) in il4965_hw_nic_init() argument
198 struct il_rx_queue *rxq = &il->rxq; in il4965_hw_nic_init()
201 spin_lock_irqsave(&il->lock, flags); in il4965_hw_nic_init()
202 il_apm_init(il); in il4965_hw_nic_init()
204 il_write8(il, CSR_INT_COALESCING, IL_HOST_INT_CALIB_TIMEOUT_DEF); in il4965_hw_nic_init()
205 spin_unlock_irqrestore(&il->lock, flags); in il4965_hw_nic_init()
207 il4965_set_pwr_vmain(il); in il4965_hw_nic_init()
208 il4965_nic_config(il); in il4965_hw_nic_init()
212 ret = il_rx_queue_alloc(il); in il4965_hw_nic_init()
218 il4965_rx_queue_reset(il, rxq); in il4965_hw_nic_init()
220 il4965_rx_replenish(il); in il4965_hw_nic_init()
222 il4965_rx_init(il, rxq); in il4965_hw_nic_init()
224 spin_lock_irqsave(&il->lock, flags); in il4965_hw_nic_init()
227 il_rx_queue_update_write_ptr(il, rxq); in il4965_hw_nic_init()
229 spin_unlock_irqrestore(&il->lock, flags); in il4965_hw_nic_init()
232 if (!il->txq) { in il4965_hw_nic_init()
233 ret = il4965_txq_ctx_alloc(il); in il4965_hw_nic_init()
237 il4965_txq_ctx_reset(il); in il4965_hw_nic_init()
239 set_bit(S_INIT, &il->status); in il4965_hw_nic_init()
248 il4965_dma_addr2rbd_ptr(struct il_priv *il, dma_addr_t dma_addr) in il4965_dma_addr2rbd_ptr() argument
265 il4965_rx_queue_restock(struct il_priv *il) in il4965_rx_queue_restock() argument
267 struct il_rx_queue *rxq = &il->rxq; in il4965_rx_queue_restock()
285 il4965_dma_addr2rbd_ptr(il, rxb->page_dma); in il4965_rx_queue_restock()
294 queue_work(il->workqueue, &il->rx_replenish); in il4965_rx_queue_restock()
302 il_rx_queue_update_write_ptr(il, rxq); in il4965_rx_queue_restock()
315 il4965_rx_allocate(struct il_priv *il, gfp_t priority) in il4965_rx_allocate() argument
317 struct il_rx_queue *rxq = &il->rxq; in il4965_rx_allocate()
336 if (il->hw_params.rx_page_order > 0) in il4965_rx_allocate()
340 page = alloc_pages(gfp_mask, il->hw_params.rx_page_order); in il4965_rx_allocate()
344 il->hw_params.rx_page_order); in il4965_rx_allocate()
361 pci_map_page(il->pci_dev, page, 0, in il4965_rx_allocate()
362 PAGE_SIZE << il->hw_params.rx_page_order, in il4965_rx_allocate()
364 if (unlikely(pci_dma_mapping_error(il->pci_dev, page_dma))) { in il4965_rx_allocate()
365 __free_pages(page, il->hw_params.rx_page_order); in il4965_rx_allocate()
373 pci_unmap_page(il->pci_dev, page_dma, in il4965_rx_allocate()
374 PAGE_SIZE << il->hw_params.rx_page_order, in il4965_rx_allocate()
376 __free_pages(page, il->hw_params.rx_page_order); in il4965_rx_allocate()
390 il->alloc_rxb_page++; in il4965_rx_allocate()
397 il4965_rx_replenish(struct il_priv *il) in il4965_rx_replenish() argument
401 il4965_rx_allocate(il, GFP_KERNEL); in il4965_rx_replenish()
403 spin_lock_irqsave(&il->lock, flags); in il4965_rx_replenish()
404 il4965_rx_queue_restock(il); in il4965_rx_replenish()
405 spin_unlock_irqrestore(&il->lock, flags); in il4965_rx_replenish()
409 il4965_rx_replenish_now(struct il_priv *il) in il4965_rx_replenish_now() argument
411 il4965_rx_allocate(il, GFP_ATOMIC); in il4965_rx_replenish_now()
413 il4965_rx_queue_restock(il); in il4965_rx_replenish_now()
422 il4965_rx_queue_free(struct il_priv *il, struct il_rx_queue *rxq) in il4965_rx_queue_free() argument
427 pci_unmap_page(il->pci_dev, rxq->pool[i].page_dma, in il4965_rx_queue_free()
428 PAGE_SIZE << il->hw_params.rx_page_order, in il4965_rx_queue_free()
430 __il_free_pages(il, rxq->pool[i].page); in il4965_rx_queue_free()
435 dma_free_coherent(&il->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd, in il4965_rx_queue_free()
437 dma_free_coherent(&il->pci_dev->dev, sizeof(struct il_rb_status), in il4965_rx_queue_free()
444 il4965_rxq_stop(struct il_priv *il) in il4965_rxq_stop() argument
448 _il_wr(il, FH49_MEM_RCSR_CHNL0_CONFIG_REG, 0); in il4965_rxq_stop()
449 ret = _il_poll_bit(il, FH49_MEM_RSSR_RX_STATUS_REG, in il4965_rxq_stop()
482 il4965_calc_rssi(struct il_priv *il, struct il_rx_phy_res *rx_resp) in il4965_calc_rssi() argument
517 il4965_translate_rx_status(struct il_priv *il, u32 decrypt_in) in il4965_translate_rx_status() argument
579 il4965_pass_packet_to_mac80211(struct il_priv *il, struct ieee80211_hdr *hdr, in il4965_pass_packet_to_mac80211() argument
587 if (unlikely(!il->is_open)) { in il4965_pass_packet_to_mac80211()
592 if (unlikely(test_bit(IL_STOP_REASON_PASSIVE, &il->stop_reason))) { in il4965_pass_packet_to_mac80211()
593 il_wake_queues_by_reason(il, IL_STOP_REASON_PASSIVE); in il4965_pass_packet_to_mac80211()
598 if (!il->cfg->mod_params->sw_crypto && in il4965_pass_packet_to_mac80211()
599 il_set_decrypted_flag(il, hdr, ampdu_status, stats)) in il4965_pass_packet_to_mac80211()
612 len, PAGE_SIZE << il->hw_params.rx_page_order); in il4965_pass_packet_to_mac80211()
613 il->alloc_rxb_page--; in il4965_pass_packet_to_mac80211()
617 il_update_stats(il, false, fc, len); in il4965_pass_packet_to_mac80211()
620 ieee80211_rx(il->hw, skb); in il4965_pass_packet_to_mac80211()
626 il4965_hdl_rx(struct il_priv *il, struct il_rx_buf *rxb) in il4965_hdl_rx() argument
659 if (!il->_4965.last_phy_res_valid) { in il4965_hdl_rx()
663 phy_res = &il->_4965.last_phy_res; in il4965_hdl_rx()
669 il4965_translate_rx_status(il, le32_to_cpu(rx_pkt_status)); in il4965_hdl_rx()
704 il->ucode_beacon_time = le32_to_cpu(phy_res->beacon_time_stamp); in il4965_hdl_rx()
707 rx_status.signal = il4965_calc_rssi(il, phy_res); in il4965_hdl_rx()
748 rx_status.ampdu_reference = il->_4965.ampdu_ref; in il4965_hdl_rx()
751 il4965_pass_packet_to_mac80211(il, header, len, ampdu_status, rxb, in il4965_hdl_rx()
758 il4965_hdl_rx_phy(struct il_priv *il, struct il_rx_buf *rxb) in il4965_hdl_rx_phy() argument
761 il->_4965.last_phy_res_valid = true; in il4965_hdl_rx_phy()
762 il->_4965.ampdu_ref++; in il4965_hdl_rx_phy()
763 memcpy(&il->_4965.last_phy_res, pkt->u.raw, in il4965_hdl_rx_phy()
768 il4965_get_channels_for_scan(struct il_priv *il, struct ieee80211_vif *vif, in il4965_get_channels_for_scan() argument
780 sband = il_get_hw_mode(il, band); in il4965_get_channels_for_scan()
784 active_dwell = il_get_active_dwell_time(il, band, n_probes); in il4965_get_channels_for_scan()
785 passive_dwell = il_get_passive_dwell_time(il, band, vif); in il4965_get_channels_for_scan()
790 for (i = 0, added = 0; i < il->scan_request->n_channels; i++) { in il4965_get_channels_for_scan()
791 chan = il->scan_request->channels[i]; in il4965_get_channels_for_scan()
799 ch_info = il_get_channel_info(il, band, channel); in il4965_get_channels_for_scan()
847 il4965_toggle_tx_ant(struct il_priv *il, u8 *ant, u8 valid) in il4965_toggle_tx_ant() argument
862 il4965_request_scan(struct il_priv *il, struct ieee80211_vif *vif) in il4965_request_scan() argument
875 u8 rx_ant = il->hw_params.valid_rx_ant; in il4965_request_scan()
880 u8 scan_tx_antennas = il->hw_params.valid_tx_ant; in il4965_request_scan()
883 lockdep_assert_held(&il->mutex); in il4965_request_scan()
885 if (!il->scan_cmd) { in il4965_request_scan()
886 il->scan_cmd = in il4965_request_scan()
889 if (!il->scan_cmd) { in il4965_request_scan()
894 scan = il->scan_cmd; in il4965_request_scan()
900 if (il_is_any_associated(il)) { in il4965_request_scan()
922 if (il->scan_request->n_ssids) { in il4965_request_scan()
925 for (i = 0; i < il->scan_request->n_ssids; i++) { in il4965_request_scan()
927 if (!il->scan_request->ssids[i].ssid_len) in il4965_request_scan()
931 il->scan_request->ssids[i].ssid_len; in il4965_request_scan()
933 il->scan_request->ssids[i].ssid, in il4965_request_scan()
934 il->scan_request->ssids[i].ssid_len); in il4965_request_scan()
943 scan->tx_cmd.sta_id = il->hw_params.bcast_id; in il4965_request_scan()
946 switch (il->scan_band) { in il4965_request_scan()
950 le32_to_cpu(il->active.flags & RXON_FLG_CHANNEL_MODE_MSK) >> in il4965_request_scan()
987 band = il->scan_band; in il4965_request_scan()
989 if (il->cfg->scan_rx_antennas[band]) in il4965_request_scan()
990 rx_ant = il->cfg->scan_rx_antennas[band]; in il4965_request_scan()
992 il4965_toggle_tx_ant(il, &il->scan_tx_ant[band], scan_tx_antennas); in il4965_request_scan()
993 rate_flags |= BIT(il->scan_tx_ant[band]) << RATE_MCS_ANT_POS; in il4965_request_scan()
997 if (test_bit(S_POWER_PMI, &il->status)) { in il4965_request_scan()
1000 rx_ant & ((u8) (il->chain_noise_data.active_chains)); in il4965_request_scan()
1005 il->chain_noise_data.active_chains); in il4965_request_scan()
1011 rx_chain |= il->hw_params.valid_rx_ant << RXON_RX_CHAIN_VALID_POS; in il4965_request_scan()
1018 il_fill_probe_req(il, (struct ieee80211_mgmt *)scan->data, in il4965_request_scan()
1019 vif->addr, il->scan_request->ie, in il4965_request_scan()
1020 il->scan_request->ie_len, in il4965_request_scan()
1028 il4965_get_channels_for_scan(il, vif, band, is_active, n_probes, in il4965_request_scan()
1041 set_bit(S_SCAN_HW, &il->status); in il4965_request_scan()
1043 ret = il_send_cmd_sync(il, &cmd); in il4965_request_scan()
1045 clear_bit(S_SCAN_HW, &il->status); in il4965_request_scan()
1051 il4965_manage_ibss_station(struct il_priv *il, struct ieee80211_vif *vif, in il4965_manage_ibss_station() argument
1057 return il4965_add_bssid_station(il, vif->bss_conf.bssid, in il4965_manage_ibss_station()
1059 return il_remove_station(il, vif_priv->ibss_bssid_sta_id, in il4965_manage_ibss_station()
1064 il4965_free_tfds_in_queue(struct il_priv *il, int sta_id, int tid, int freed) in il4965_free_tfds_in_queue() argument
1066 lockdep_assert_held(&il->sta_lock); in il4965_free_tfds_in_queue()
1068 if (il->stations[sta_id].tid[tid].tfds_in_queue >= freed) in il4965_free_tfds_in_queue()
1069 il->stations[sta_id].tid[tid].tfds_in_queue -= freed; in il4965_free_tfds_in_queue()
1072 il->stations[sta_id].tid[tid].tfds_in_queue, freed); in il4965_free_tfds_in_queue()
1073 il->stations[sta_id].tid[tid].tfds_in_queue = 0; in il4965_free_tfds_in_queue()
1080 il4965_is_single_rx_stream(struct il_priv *il) in il4965_is_single_rx_stream() argument
1082 return il->current_ht_config.smps == IEEE80211_SMPS_STATIC || in il4965_is_single_rx_stream()
1083 il->current_ht_config.single_chain_sufficient; in il4965_is_single_rx_stream()
1102 il4965_get_active_rx_chain_count(struct il_priv *il) in il4965_get_active_rx_chain_count() argument
1105 if (il4965_is_single_rx_stream(il)) in il4965_get_active_rx_chain_count()
1116 il4965_get_idle_rx_chain_count(struct il_priv *il, int active_cnt) in il4965_get_idle_rx_chain_count() argument
1119 switch (il->current_ht_config.smps) { in il4965_get_idle_rx_chain_count()
1126 WARN(1, "invalid SMPS mode %d", il->current_ht_config.smps); in il4965_get_idle_rx_chain_count()
1150 il4965_set_rxon_chain(struct il_priv *il) in il4965_set_rxon_chain() argument
1152 bool is_single = il4965_is_single_rx_stream(il); in il4965_set_rxon_chain()
1153 bool is_cam = !test_bit(S_POWER_PMI, &il->status); in il4965_set_rxon_chain()
1162 if (il->chain_noise_data.active_chains) in il4965_set_rxon_chain()
1163 active_chains = il->chain_noise_data.active_chains; in il4965_set_rxon_chain()
1165 active_chains = il->hw_params.valid_rx_ant; in il4965_set_rxon_chain()
1170 active_rx_cnt = il4965_get_active_rx_chain_count(il); in il4965_set_rxon_chain()
1171 idle_rx_cnt = il4965_get_idle_rx_chain_count(il, active_rx_cnt); in il4965_set_rxon_chain()
1186 il->staging.rx_chain = cpu_to_le16(rx_chain); in il4965_set_rxon_chain()
1189 il->staging.rx_chain |= RXON_RX_CHAIN_MIMO_FORCE_MSK; in il4965_set_rxon_chain()
1191 il->staging.rx_chain &= ~RXON_RX_CHAIN_MIMO_FORCE_MSK; in il4965_set_rxon_chain()
1193 D_ASSOC("rx_chain=0x%X active=%d idle=%d\n", il->staging.rx_chain, in il4965_set_rxon_chain()
1219 il4965_dump_fh(struct il_priv *il, char **buf, bool display) in il4965_dump_fh() argument
1250 il_rd(il, fh_tbl[i])); in il4965_dump_fh()
1258 il_rd(il, fh_tbl[i])); in il4965_dump_fh()
1264 il4965_hdl_missed_beacon(struct il_priv *il, struct il_rx_buf *rxb) in il4965_hdl_missed_beacon() argument
1271 il->missed_beacon_threshold) { in il4965_hdl_missed_beacon()
1277 if (!test_bit(S_SCANNING, &il->status)) in il4965_hdl_missed_beacon()
1278 il4965_init_sensitivity(il); in il4965_hdl_missed_beacon()
1286 il4965_rx_calc_noise(struct il_priv *il) in il4965_rx_calc_noise() argument
1294 rx_info = &(il->_4965.stats.rx.general); in il4965_rx_calc_noise()
1332 il4965_accumulative_stats(struct il_priv *il, __le32 * stats) in il4965_accumulative_stats() argument
1341 prev_stats = (__le32 *) &il->_4965.stats; in il4965_accumulative_stats()
1342 accum_stats = (u32 *) &il->_4965.accum_stats; in il4965_accumulative_stats()
1344 general = &il->_4965.stats.general.common; in il4965_accumulative_stats()
1345 accum_general = &il->_4965.accum_stats.general.common; in il4965_accumulative_stats()
1346 tx = &il->_4965.stats.tx; in il4965_accumulative_stats()
1347 accum_tx = &il->_4965.accum_stats.tx; in il4965_accumulative_stats()
1348 delta = (u32 *) &il->_4965.delta_stats; in il4965_accumulative_stats()
1349 max_delta = (u32 *) &il->_4965.max_delta; in il4965_accumulative_stats()
1371 il4965_hdl_stats(struct il_priv *il, struct il_rx_buf *rxb) in il4965_hdl_stats() argument
1382 ((il->_4965.stats.general.common.temperature != in il4965_hdl_stats()
1384 ((il->_4965.stats.flag & STATS_REPLY_FLG_HT40_MODE_MSK) != in il4965_hdl_stats()
1387 il4965_accumulative_stats(il, (__le32 *) &pkt->u.stats); in il4965_hdl_stats()
1391 memcpy(&il->_4965.stats, &pkt->u.stats, sizeof(il->_4965.stats)); in il4965_hdl_stats()
1393 set_bit(S_STATS, &il->status); in il4965_hdl_stats()
1399 mod_timer(&il->stats_periodic, in il4965_hdl_stats()
1402 if (unlikely(!test_bit(S_SCANNING, &il->status)) && in il4965_hdl_stats()
1404 il4965_rx_calc_noise(il); in il4965_hdl_stats()
1405 queue_work(il->workqueue, &il->run_time_calib_work); in il4965_hdl_stats()
1409 il4965_temperature_calib(il); in il4965_hdl_stats()
1413 il4965_hdl_c_stats(struct il_priv *il, struct il_rx_buf *rxb) in il4965_hdl_c_stats() argument
1419 memset(&il->_4965.accum_stats, 0, in il4965_hdl_c_stats()
1421 memset(&il->_4965.delta_stats, 0, in il4965_hdl_c_stats()
1423 memset(&il->_4965.max_delta, 0, sizeof(struct il_notif_stats)); in il4965_hdl_c_stats()
1427 il4965_hdl_stats(il, rxb); in il4965_hdl_c_stats()
1499 il4965_tx_cmd_build_basic(struct il_priv *il, struct sk_buff *skb, in il4965_tx_cmd_build_basic() argument
1535 il_tx_cmd_protection(il, info, fc, &tx_flags); in il4965_tx_cmd_build_basic()
1553 il4965_tx_cmd_build_rate(struct il_priv *il, in il4965_tx_cmd_build_rate() argument
1591 rate_idx = rate_lowest_index(&il->bands[info->band], sta); in il4965_tx_cmd_build_rate()
1605 il4965_toggle_tx_ant(il, &il->mgmt_tx_ant, il->hw_params.valid_tx_ant); in il4965_tx_cmd_build_rate()
1606 rate_flags |= BIT(il->mgmt_tx_ant) << RATE_MCS_ANT_POS; in il4965_tx_cmd_build_rate()
1613 il4965_tx_cmd_build_hwcrypto(struct il_priv *il, struct ieee80211_tx_info *info, in il4965_tx_cmd_build_hwcrypto() argument
1658 il4965_tx_skb(struct il_priv *il, in il4965_tx_skb() argument
1685 spin_lock_irqsave(&il->lock, flags); in il4965_tx_skb()
1686 if (il_is_rfkill(il)) { in il4965_tx_skb()
1706 sta_id = il->hw_params.bcast_id; in il4965_tx_skb()
1709 sta_id = il_sta_id_or_broadcast(il, sta); in il4965_tx_skb()
1733 il4965_sta_modify_sleep_tx_count(il, sta_id, 1); in il4965_tx_skb()
1743 spin_lock(&il->sta_lock); in il4965_tx_skb()
1749 spin_unlock(&il->sta_lock); in il4965_tx_skb()
1752 seq_number = il->stations[sta_id].tid[tid].seq_number; in il4965_tx_skb()
1760 il->stations[sta_id].tid[tid].agg.state == IL_AGG_ON) { in il4965_tx_skb()
1761 txq_id = il->stations[sta_id].tid[tid].agg.txq_id; in il4965_tx_skb()
1766 txq = &il->txq[txq_id]; in il4965_tx_skb()
1770 spin_unlock(&il->sta_lock); in il4965_tx_skb()
1775 il->stations[sta_id].tid[tid].tfds_in_queue++; in il4965_tx_skb()
1777 il->stations[sta_id].tid[tid].seq_number = seq_number; in il4965_tx_skb()
1780 spin_unlock(&il->sta_lock); in il4965_tx_skb()
1809 il4965_tx_cmd_build_hwcrypto(il, info, tx_cmd, skb, sta_id); in il4965_tx_skb()
1812 il4965_tx_cmd_build_basic(il, skb, tx_cmd, info, hdr, sta_id); in il4965_tx_skb()
1814 il4965_tx_cmd_build_rate(il, tx_cmd, info, sta, fc); in il4965_tx_skb()
1835 pci_map_single(il->pci_dev, &out_cmd->hdr, firstlen, in il4965_tx_skb()
1837 if (unlikely(pci_dma_mapping_error(il->pci_dev, txcmd_phys))) in il4965_tx_skb()
1845 pci_map_single(il->pci_dev, skb->data + hdr_len, secondlen, in il4965_tx_skb()
1847 if (unlikely(pci_dma_mapping_error(il->pci_dev, phys_addr))) in il4965_tx_skb()
1853 il->ops->txq_attach_buf_to_tfd(il, txq, txcmd_phys, firstlen, 1, 0); in il4965_tx_skb()
1857 il->ops->txq_attach_buf_to_tfd(il, txq, phys_addr, secondlen, in il4965_tx_skb()
1872 pci_dma_sync_single_for_cpu(il->pci_dev, txcmd_phys, firstlen, in il4965_tx_skb()
1877 il_update_stats(il, true, fc, skb->len); in il4965_tx_skb()
1881 il_print_hex_dump(il, IL_DL_TX, (u8 *) tx_cmd, sizeof(*tx_cmd)); in il4965_tx_skb()
1882 il_print_hex_dump(il, IL_DL_TX, (u8 *) tx_cmd->hdr, hdr_len); in il4965_tx_skb()
1886 il->ops->txq_update_byte_cnt_tbl(il, txq, le16_to_cpu(tx_cmd->len)); in il4965_tx_skb()
1888 pci_dma_sync_single_for_device(il->pci_dev, txcmd_phys, firstlen, in il4965_tx_skb()
1893 il_txq_update_write_ptr(il, txq); in il4965_tx_skb()
1894 spin_unlock_irqrestore(&il->lock, flags); in il4965_tx_skb()
1913 if (il_queue_space(q) < q->high_mark && il->mac80211_registered) { in il4965_tx_skb()
1915 spin_lock_irqsave(&il->lock, flags); in il4965_tx_skb()
1917 il_txq_update_write_ptr(il, txq); in il4965_tx_skb()
1918 spin_unlock_irqrestore(&il->lock, flags); in il4965_tx_skb()
1920 il_stop_queue(il, txq); in il4965_tx_skb()
1927 spin_unlock_irqrestore(&il->lock, flags); in il4965_tx_skb()
1932 il4965_alloc_dma_ptr(struct il_priv *il, struct il_dma_ptr *ptr, size_t size) in il4965_alloc_dma_ptr() argument
1934 ptr->addr = dma_alloc_coherent(&il->pci_dev->dev, size, &ptr->dma, in il4965_alloc_dma_ptr()
1943 il4965_free_dma_ptr(struct il_priv *il, struct il_dma_ptr *ptr) in il4965_free_dma_ptr() argument
1948 dma_free_coherent(&il->pci_dev->dev, ptr->size, ptr->addr, ptr->dma); in il4965_free_dma_ptr()
1958 il4965_hw_txq_ctx_free(struct il_priv *il) in il4965_hw_txq_ctx_free() argument
1963 if (il->txq) { in il4965_hw_txq_ctx_free()
1964 for (txq_id = 0; txq_id < il->hw_params.max_txq_num; txq_id++) in il4965_hw_txq_ctx_free()
1965 if (txq_id == il->cmd_queue) in il4965_hw_txq_ctx_free()
1966 il_cmd_queue_free(il); in il4965_hw_txq_ctx_free()
1968 il_tx_queue_free(il, txq_id); in il4965_hw_txq_ctx_free()
1970 il4965_free_dma_ptr(il, &il->kw); in il4965_hw_txq_ctx_free()
1972 il4965_free_dma_ptr(il, &il->scd_bc_tbls); in il4965_hw_txq_ctx_free()
1975 il_free_txq_mem(il); in il4965_hw_txq_ctx_free()
1986 il4965_txq_ctx_alloc(struct il_priv *il) in il4965_txq_ctx_alloc() argument
1992 il4965_hw_txq_ctx_free(il); in il4965_txq_ctx_alloc()
1995 il4965_alloc_dma_ptr(il, &il->scd_bc_tbls, in il4965_txq_ctx_alloc()
1996 il->hw_params.scd_bc_tbls_size); in il4965_txq_ctx_alloc()
2002 ret = il4965_alloc_dma_ptr(il, &il->kw, IL_KW_SIZE); in il4965_txq_ctx_alloc()
2009 ret = il_alloc_txq_mem(il); in il4965_txq_ctx_alloc()
2013 spin_lock_irqsave(&il->lock, flags); in il4965_txq_ctx_alloc()
2016 il4965_txq_set_sched(il, 0); in il4965_txq_ctx_alloc()
2019 il_wr(il, FH49_KW_MEM_ADDR_REG, il->kw.dma >> 4); in il4965_txq_ctx_alloc()
2021 spin_unlock_irqrestore(&il->lock, flags); in il4965_txq_ctx_alloc()
2024 for (txq_id = 0; txq_id < il->hw_params.max_txq_num; txq_id++) { in il4965_txq_ctx_alloc()
2025 ret = il_tx_queue_init(il, txq_id); in il4965_txq_ctx_alloc()
2035 il4965_hw_txq_ctx_free(il); in il4965_txq_ctx_alloc()
2036 il4965_free_dma_ptr(il, &il->kw); in il4965_txq_ctx_alloc()
2038 il4965_free_dma_ptr(il, &il->scd_bc_tbls); in il4965_txq_ctx_alloc()
2044 il4965_txq_ctx_reset(struct il_priv *il) in il4965_txq_ctx_reset() argument
2049 spin_lock_irqsave(&il->lock, flags); in il4965_txq_ctx_reset()
2052 il4965_txq_set_sched(il, 0); in il4965_txq_ctx_reset()
2054 il_wr(il, FH49_KW_MEM_ADDR_REG, il->kw.dma >> 4); in il4965_txq_ctx_reset()
2056 spin_unlock_irqrestore(&il->lock, flags); in il4965_txq_ctx_reset()
2059 for (txq_id = 0; txq_id < il->hw_params.max_txq_num; txq_id++) in il4965_txq_ctx_reset()
2060 il_tx_queue_reset(il, txq_id); in il4965_txq_ctx_reset()
2064 il4965_txq_ctx_unmap(struct il_priv *il) in il4965_txq_ctx_unmap() argument
2068 if (!il->txq) in il4965_txq_ctx_unmap()
2072 for (txq_id = 0; txq_id < il->hw_params.max_txq_num; txq_id++) in il4965_txq_ctx_unmap()
2073 if (txq_id == il->cmd_queue) in il4965_txq_ctx_unmap()
2074 il_cmd_queue_unmap(il); in il4965_txq_ctx_unmap()
2076 il_tx_queue_unmap(il, txq_id); in il4965_txq_ctx_unmap()
2083 il4965_txq_ctx_stop(struct il_priv *il) in il4965_txq_ctx_stop() argument
2087 _il_wr_prph(il, IL49_SCD_TXFACT, 0); in il4965_txq_ctx_stop()
2090 for (ch = 0; ch < il->hw_params.dma_chnl_num; ch++) { in il4965_txq_ctx_stop()
2091 _il_wr(il, FH49_TCSR_CHNL_TX_CONFIG_REG(ch), 0x0); in il4965_txq_ctx_stop()
2093 _il_poll_bit(il, FH49_TSSR_TX_STATUS_REG, in il4965_txq_ctx_stop()
2099 ch, _il_rd(il, FH49_TSSR_TX_STATUS_REG)); in il4965_txq_ctx_stop()
2110 il4965_txq_ctx_activate_free(struct il_priv *il) in il4965_txq_ctx_activate_free() argument
2114 for (txq_id = 0; txq_id < il->hw_params.max_txq_num; txq_id++) in il4965_txq_ctx_activate_free()
2115 if (!test_and_set_bit(txq_id, &il->txq_ctx_active_msk)) in il4965_txq_ctx_activate_free()
2124 il4965_tx_queue_stop_scheduler(struct il_priv *il, u16 txq_id) in il4965_tx_queue_stop_scheduler() argument
2128 il_wr_prph(il, IL49_SCD_QUEUE_STATUS_BITS(txq_id), in il4965_tx_queue_stop_scheduler()
2137 il4965_tx_queue_set_q2ratid(struct il_priv *il, u16 ra_tid, u16 txq_id) in il4965_tx_queue_set_q2ratid() argument
2146 il->scd_base_addr + IL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(txq_id); in il4965_tx_queue_set_q2ratid()
2148 tbl_dw = il_read_targ_mem(il, tbl_dw_addr); in il4965_tx_queue_set_q2ratid()
2155 il_write_targ_mem(il, tbl_dw_addr, tbl_dw); in il4965_tx_queue_set_q2ratid()
2167 il4965_txq_agg_enable(struct il_priv *il, int txq_id, int tx_fifo, int sta_id, in il4965_txq_agg_enable() argument
2176 il->cfg->num_of_ampdu_queues <= txq_id)) { in il4965_txq_agg_enable()
2180 il->cfg->num_of_ampdu_queues - 1); in il4965_txq_agg_enable()
2187 ret = il4965_sta_tx_modify_enable_tid(il, sta_id, tid); in il4965_txq_agg_enable()
2191 spin_lock_irqsave(&il->lock, flags); in il4965_txq_agg_enable()
2194 il4965_tx_queue_stop_scheduler(il, txq_id); in il4965_txq_agg_enable()
2197 il4965_tx_queue_set_q2ratid(il, ra_tid, txq_id); in il4965_txq_agg_enable()
2200 il_set_bits_prph(il, IL49_SCD_QUEUECHAIN_SEL, (1 << txq_id)); in il4965_txq_agg_enable()
2204 il->txq[txq_id].q.read_ptr = (ssn_idx & 0xff); in il4965_txq_agg_enable()
2205 il->txq[txq_id].q.write_ptr = (ssn_idx & 0xff); in il4965_txq_agg_enable()
2206 il4965_set_wr_ptrs(il, txq_id, ssn_idx); in il4965_txq_agg_enable()
2209 il_write_targ_mem(il, in il4965_txq_agg_enable()
2210 il->scd_base_addr + in il4965_txq_agg_enable()
2215 il_write_targ_mem(il, in il4965_txq_agg_enable()
2216 il->scd_base_addr + in il4965_txq_agg_enable()
2222 il_set_bits_prph(il, IL49_SCD_INTERRUPT_MASK, (1 << txq_id)); in il4965_txq_agg_enable()
2225 il4965_tx_queue_set_status(il, &il->txq[txq_id], tx_fifo, 1); in il4965_txq_agg_enable()
2227 spin_unlock_irqrestore(&il->lock, flags); in il4965_txq_agg_enable()
2233 il4965_tx_agg_start(struct il_priv *il, struct ieee80211_vif *vif, in il4965_tx_agg_start() argument
2258 if (il->stations[sta_id].tid[tid].agg.state != IL_AGG_OFF) { in il4965_tx_agg_start()
2263 txq_id = il4965_txq_ctx_activate_free(il); in il4965_tx_agg_start()
2269 spin_lock_irqsave(&il->sta_lock, flags); in il4965_tx_agg_start()
2270 tid_data = &il->stations[sta_id].tid[tid]; in il4965_tx_agg_start()
2273 il_set_swq_id(&il->txq[txq_id], il4965_get_ac_from_tid(tid), txq_id); in il4965_tx_agg_start()
2274 spin_unlock_irqrestore(&il->sta_lock, flags); in il4965_tx_agg_start()
2276 ret = il4965_txq_agg_enable(il, txq_id, tx_fifo, sta_id, tid, *ssn); in il4965_tx_agg_start()
2280 spin_lock_irqsave(&il->sta_lock, flags); in il4965_tx_agg_start()
2281 tid_data = &il->stations[sta_id].tid[tid]; in il4965_tx_agg_start()
2291 spin_unlock_irqrestore(&il->sta_lock, flags); in il4965_tx_agg_start()
2300 il4965_txq_agg_disable(struct il_priv *il, u16 txq_id, u16 ssn_idx, u8 tx_fifo) in il4965_txq_agg_disable() argument
2304 il->cfg->num_of_ampdu_queues <= txq_id)) { in il4965_txq_agg_disable()
2308 il->cfg->num_of_ampdu_queues - 1); in il4965_txq_agg_disable()
2312 il4965_tx_queue_stop_scheduler(il, txq_id); in il4965_txq_agg_disable()
2314 il_clear_bits_prph(il, IL49_SCD_QUEUECHAIN_SEL, (1 << txq_id)); in il4965_txq_agg_disable()
2316 il->txq[txq_id].q.read_ptr = (ssn_idx & 0xff); in il4965_txq_agg_disable()
2317 il->txq[txq_id].q.write_ptr = (ssn_idx & 0xff); in il4965_txq_agg_disable()
2319 il4965_set_wr_ptrs(il, txq_id, ssn_idx); in il4965_txq_agg_disable()
2321 il_clear_bits_prph(il, IL49_SCD_INTERRUPT_MASK, (1 << txq_id)); in il4965_txq_agg_disable()
2322 il_txq_ctx_deactivate(il, txq_id); in il4965_txq_agg_disable()
2323 il4965_tx_queue_set_status(il, &il->txq[txq_id], tx_fifo, 0); in il4965_txq_agg_disable()
2329 il4965_tx_agg_stop(struct il_priv *il, struct ieee80211_vif *vif, in il4965_tx_agg_stop() argument
2349 spin_lock_irqsave(&il->sta_lock, flags); in il4965_tx_agg_stop()
2351 tid_data = &il->stations[sta_id].tid[tid]; in il4965_tx_agg_stop()
2355 switch (il->stations[sta_id].tid[tid].agg.state) { in il4965_tx_agg_stop()
2371 write_ptr = il->txq[txq_id].q.write_ptr; in il4965_tx_agg_stop()
2372 read_ptr = il->txq[txq_id].q.read_ptr; in il4965_tx_agg_stop()
2377 il->stations[sta_id].tid[tid].agg.state = in il4965_tx_agg_stop()
2379 spin_unlock_irqrestore(&il->sta_lock, flags); in il4965_tx_agg_stop()
2385 il->stations[sta_id].tid[tid].agg.state = IL_AGG_OFF; in il4965_tx_agg_stop()
2388 spin_unlock(&il->sta_lock); in il4965_tx_agg_stop()
2389 spin_lock(&il->lock); in il4965_tx_agg_stop()
2398 il4965_txq_agg_disable(il, txq_id, ssn, tx_fifo_id); in il4965_tx_agg_stop()
2399 spin_unlock_irqrestore(&il->lock, flags); in il4965_tx_agg_stop()
2407 il4965_txq_check_empty(struct il_priv *il, int sta_id, u8 tid, int txq_id) in il4965_txq_check_empty() argument
2409 struct il_queue *q = &il->txq[txq_id].q; in il4965_txq_check_empty()
2410 u8 *addr = il->stations[sta_id].sta.sta.addr; in il4965_txq_check_empty()
2411 struct il_tid_data *tid_data = &il->stations[sta_id].tid[tid]; in il4965_txq_check_empty()
2413 lockdep_assert_held(&il->sta_lock); in il4965_txq_check_empty()
2415 switch (il->stations[sta_id].tid[tid].agg.state) { in il4965_txq_check_empty()
2424 il4965_txq_agg_disable(il, txq_id, ssn, tx_fifo); in il4965_txq_check_empty()
2426 ieee80211_stop_tx_ba_cb_irqsafe(il->vif, addr, tid); in il4965_txq_check_empty()
2434 ieee80211_start_tx_ba_cb_irqsafe(il->vif, addr, tid); in il4965_txq_check_empty()
2443 il4965_non_agg_tx_status(struct il_priv *il, const u8 *addr1) in il4965_non_agg_tx_status() argument
2449 sta = ieee80211_find_sta(il->vif, addr1); in il4965_non_agg_tx_status()
2455 ieee80211_sta_block_awake(il->hw, sta, false); in il4965_non_agg_tx_status()
2461 il4965_tx_status(struct il_priv *il, struct sk_buff *skb, bool is_agg) in il4965_tx_status() argument
2466 il4965_non_agg_tx_status(il, hdr->addr1); in il4965_tx_status()
2468 ieee80211_tx_status_irqsafe(il->hw, skb); in il4965_tx_status()
2472 il4965_tx_queue_reclaim(struct il_priv *il, int txq_id, int idx) in il4965_tx_queue_reclaim() argument
2474 struct il_tx_queue *txq = &il->txq[txq_id]; in il4965_tx_queue_reclaim()
2499 il4965_tx_status(il, skb, txq_id >= IL4965_FIRST_AMPDU_QUEUE); in il4965_tx_queue_reclaim()
2502 il->ops->txq_free_tfd(il, txq); in il4965_tx_queue_reclaim()
2514 il4965_tx_status_reply_compressed_ba(struct il_priv *il, struct il_ht_agg *agg, in il4965_tx_status_reply_compressed_ba() argument
2565 info = IEEE80211_SKB_CB(il->txq[scd_flow].skbs[agg->start_idx]); in il4965_tx_status_reply_compressed_ba()
2571 il4965_hwrate_to_tx_control(il, agg->rate_n_flags, info); in il4965_tx_status_reply_compressed_ba()
2584 il4965_find_station(struct il_priv *il, const u8 *addr) in il4965_find_station() argument
2591 if (il->iw_mode == NL80211_IFTYPE_ADHOC) in il4965_find_station()
2595 return il->hw_params.bcast_id; in il4965_find_station()
2597 spin_lock_irqsave(&il->sta_lock, flags); in il4965_find_station()
2598 for (i = start; i < il->hw_params.max_stations; i++) in il4965_find_station()
2599 if (il->stations[i].used && in il4965_find_station()
2600 ether_addr_equal(il->stations[i].sta.sta.addr, addr)) { in il4965_find_station()
2605 D_ASSOC("can not find STA %pM total %d\n", addr, il->num_stations); in il4965_find_station()
2614 (!(il->stations[ret].used & IL_STA_UCODE_ACTIVE) || in il4965_find_station()
2615 ((il->stations[ret].used & IL_STA_UCODE_ACTIVE) && in il4965_find_station()
2616 (il->stations[ret].used & IL_STA_UCODE_INPROGRESS)))) { in il4965_find_station()
2621 spin_unlock_irqrestore(&il->sta_lock, flags); in il4965_find_station()
2626 il4965_get_ra_sta_id(struct il_priv *il, struct ieee80211_hdr *hdr) in il4965_get_ra_sta_id() argument
2628 if (il->iw_mode == NL80211_IFTYPE_STATION) in il4965_get_ra_sta_id()
2633 return il4965_find_station(il, da); in il4965_get_ra_sta_id()
2664 il4965_tx_status_reply_tx(struct il_priv *il, struct il_ht_agg *agg, in il4965_tx_status_reply_tx() argument
2692 info = IEEE80211_SKB_CB(il->txq[txq_id].skbs[idx]); in il4965_tx_status_reply_tx()
2696 il4965_hwrate_to_tx_control(il, rate_n_flags, info); in il4965_tx_status_reply_tx()
2725 skb = il->txq[txq_id].skbs[idx]; in il4965_tx_status_reply_tx()
2776 il4965_hdl_tx(struct il_priv *il, struct il_rx_buf *rxb) in il4965_hdl_tx() argument
2782 struct il_tx_queue *txq = &il->txq[txq_id]; in il4965_hdl_tx()
2813 sta_id = il4965_get_ra_sta_id(il, hdr); in il4965_hdl_tx()
2827 il->iw_mode == NL80211_IFTYPE_STATION) { in il4965_hdl_tx()
2828 il_stop_queues_by_reason(il, IL_STOP_REASON_PASSIVE); in il4965_hdl_tx()
2832 spin_lock_irqsave(&il->sta_lock, flags); in il4965_hdl_tx()
2838 agg = &il->stations[sta_id].tid[tid].agg; in il4965_hdl_tx()
2840 il4965_tx_status_reply_tx(il, agg, tx_resp, txq_id, idx); in il4965_hdl_tx()
2851 freed = il4965_tx_queue_reclaim(il, txq_id, idx); in il4965_hdl_tx()
2853 il4965_free_tfds_in_queue(il, sta_id, tid, in il4965_hdl_tx()
2856 if (il->mac80211_registered && in il4965_hdl_tx()
2859 il_wake_queue(il, txq); in il4965_hdl_tx()
2864 il4965_hwrate_to_tx_control(il, in il4965_hdl_tx()
2874 freed = il4965_tx_queue_reclaim(il, txq_id, idx); in il4965_hdl_tx()
2876 il4965_free_tfds_in_queue(il, sta_id, tid, freed); in il4965_hdl_tx()
2880 if (il->mac80211_registered && in il4965_hdl_tx()
2882 il_wake_queue(il, txq); in il4965_hdl_tx()
2885 il4965_txq_check_empty(il, sta_id, tid, txq_id); in il4965_hdl_tx()
2887 il4965_check_abort_status(il, tx_resp->frame_count, status); in il4965_hdl_tx()
2889 spin_unlock_irqrestore(&il->sta_lock, flags); in il4965_hdl_tx()
2896 il4965_hwrate_to_tx_control(struct il_priv *il, u32 rate_n_flags, in il4965_hwrate_to_tx_control() argument
2923 il4965_hdl_compressed_ba(struct il_priv *il, struct il_rx_buf *rxb) in il4965_hdl_compressed_ba() argument
2941 if (scd_flow >= il->hw_params.max_txq_num) { in il4965_hdl_compressed_ba()
2946 txq = &il->txq[scd_flow]; in il4965_hdl_compressed_ba()
2949 agg = &il->stations[sta_id].tid[tid].agg; in il4965_hdl_compressed_ba()
2965 spin_lock_irqsave(&il->sta_lock, flags); in il4965_hdl_compressed_ba()
2978 il4965_tx_status_reply_compressed_ba(il, agg, ba_resp); in il4965_hdl_compressed_ba()
2985 int freed = il4965_tx_queue_reclaim(il, scd_flow, idx); in il4965_hdl_compressed_ba()
2986 il4965_free_tfds_in_queue(il, sta_id, tid, freed); in il4965_hdl_compressed_ba()
2989 il->mac80211_registered && in il4965_hdl_compressed_ba()
2991 il_wake_queue(il, txq); in il4965_hdl_compressed_ba()
2993 il4965_txq_check_empty(il, sta_id, tid, scd_flow); in il4965_hdl_compressed_ba()
2996 spin_unlock_irqrestore(&il->sta_lock, flags); in il4965_hdl_compressed_ba()
3040 il4965_sta_alloc_lq(struct il_priv *il, u8 sta_id) in il4965_sta_alloc_lq() argument
3054 if (il->band == IEEE80211_BAND_5GHZ) in il4965_sta_alloc_lq()
3063 il4965_first_antenna(il->hw_params. in il4965_sta_alloc_lq()
3070 il4965_first_antenna(il->hw_params.valid_tx_ant); in il4965_sta_alloc_lq()
3073 il->hw_params.valid_tx_ant & ~il4965_first_antenna(il->hw_params. in il4965_sta_alloc_lq()
3077 } else if (il4965_num_of_ant(il->hw_params.valid_tx_ant) == 2) { in il4965_sta_alloc_lq()
3079 il->hw_params.valid_tx_ant; in il4965_sta_alloc_lq()
3097 il4965_add_bssid_station(struct il_priv *il, const u8 *addr, u8 *sta_id_r) in il4965_add_bssid_station() argument
3107 ret = il_add_station_common(il, addr, 0, NULL, &sta_id); in il4965_add_bssid_station()
3116 spin_lock_irqsave(&il->sta_lock, flags); in il4965_add_bssid_station()
3117 il->stations[sta_id].used |= IL_STA_LOCAL; in il4965_add_bssid_station()
3118 spin_unlock_irqrestore(&il->sta_lock, flags); in il4965_add_bssid_station()
3121 link_cmd = il4965_sta_alloc_lq(il, sta_id); in il4965_add_bssid_station()
3128 ret = il_send_lq_cmd(il, link_cmd, CMD_SYNC, true); in il4965_add_bssid_station()
3132 spin_lock_irqsave(&il->sta_lock, flags); in il4965_add_bssid_station()
3133 il->stations[sta_id].lq = link_cmd; in il4965_add_bssid_station()
3134 spin_unlock_irqrestore(&il->sta_lock, flags); in il4965_add_bssid_station()
3140 il4965_static_wepkey_cmd(struct il_priv *il, bool send_if_empty) in il4965_static_wepkey_cmd() argument
3160 u8 key_size = il->_4965.wep_keys[i].key_size; in il4965_static_wepkey_cmd()
3170 memcpy(&wep_cmd->key[i].key[3], il->_4965.wep_keys[i].key, key_size); in il4965_static_wepkey_cmd()
3180 return il_send_cmd(il, &cmd); in il4965_static_wepkey_cmd()
3186 il4965_restore_default_wep_keys(struct il_priv *il) in il4965_restore_default_wep_keys() argument
3188 lockdep_assert_held(&il->mutex); in il4965_restore_default_wep_keys()
3190 return il4965_static_wepkey_cmd(il, false); in il4965_restore_default_wep_keys()
3194 il4965_remove_default_wep_key(struct il_priv *il, in il4965_remove_default_wep_key() argument
3200 lockdep_assert_held(&il->mutex); in il4965_remove_default_wep_key()
3204 memset(&il->_4965.wep_keys[idx], 0, sizeof(struct il_wep_key)); in il4965_remove_default_wep_key()
3205 if (il_is_rfkill(il)) { in il4965_remove_default_wep_key()
3210 ret = il4965_static_wepkey_cmd(il, 1); in il4965_remove_default_wep_key()
3217 il4965_set_default_wep_key(struct il_priv *il, in il4965_set_default_wep_key() argument
3224 lockdep_assert_held(&il->mutex); in il4965_set_default_wep_key()
3233 il->stations[IL_AP_ID].keyinfo.cipher = keyconf->cipher; in il4965_set_default_wep_key()
3235 il->_4965.wep_keys[idx].key_size = len; in il4965_set_default_wep_key()
3236 memcpy(&il->_4965.wep_keys[idx].key, &keyconf->key, len); in il4965_set_default_wep_key()
3238 ret = il4965_static_wepkey_cmd(il, false); in il4965_set_default_wep_key()
3245 il4965_set_wep_dynamic_key_info(struct il_priv *il, in il4965_set_wep_dynamic_key_info() argument
3252 lockdep_assert_held(&il->mutex); in il4965_set_wep_dynamic_key_info()
3263 if (sta_id == il->hw_params.bcast_id) in il4965_set_wep_dynamic_key_info()
3266 spin_lock_irqsave(&il->sta_lock, flags); in il4965_set_wep_dynamic_key_info()
3268 il->stations[sta_id].keyinfo.cipher = keyconf->cipher; in il4965_set_wep_dynamic_key_info()
3269 il->stations[sta_id].keyinfo.keylen = keyconf->keylen; in il4965_set_wep_dynamic_key_info()
3270 il->stations[sta_id].keyinfo.keyidx = keyconf->keyidx; in il4965_set_wep_dynamic_key_info()
3272 memcpy(il->stations[sta_id].keyinfo.key, keyconf->key, keyconf->keylen); in il4965_set_wep_dynamic_key_info()
3274 memcpy(&il->stations[sta_id].sta.key.key[3], keyconf->key, in il4965_set_wep_dynamic_key_info()
3277 if ((il->stations[sta_id].sta.key. in il4965_set_wep_dynamic_key_info()
3279 il->stations[sta_id].sta.key.key_offset = in il4965_set_wep_dynamic_key_info()
3280 il_get_free_ucode_key_idx(il); in il4965_set_wep_dynamic_key_info()
3284 WARN(il->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET, in il4965_set_wep_dynamic_key_info()
3287 il->stations[sta_id].sta.key.key_flags = key_flags; in il4965_set_wep_dynamic_key_info()
3288 il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK; in il4965_set_wep_dynamic_key_info()
3289 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; in il4965_set_wep_dynamic_key_info()
3291 memcpy(&sta_cmd, &il->stations[sta_id].sta, in il4965_set_wep_dynamic_key_info()
3293 spin_unlock_irqrestore(&il->sta_lock, flags); in il4965_set_wep_dynamic_key_info()
3295 return il_send_add_sta(il, &sta_cmd, CMD_SYNC); in il4965_set_wep_dynamic_key_info()
3299 il4965_set_ccmp_dynamic_key_info(struct il_priv *il, in il4965_set_ccmp_dynamic_key_info() argument
3306 lockdep_assert_held(&il->mutex); in il4965_set_ccmp_dynamic_key_info()
3312 if (sta_id == il->hw_params.bcast_id) in il4965_set_ccmp_dynamic_key_info()
3317 spin_lock_irqsave(&il->sta_lock, flags); in il4965_set_ccmp_dynamic_key_info()
3318 il->stations[sta_id].keyinfo.cipher = keyconf->cipher; in il4965_set_ccmp_dynamic_key_info()
3319 il->stations[sta_id].keyinfo.keylen = keyconf->keylen; in il4965_set_ccmp_dynamic_key_info()
3321 memcpy(il->stations[sta_id].keyinfo.key, keyconf->key, keyconf->keylen); in il4965_set_ccmp_dynamic_key_info()
3323 memcpy(il->stations[sta_id].sta.key.key, keyconf->key, keyconf->keylen); in il4965_set_ccmp_dynamic_key_info()
3325 if ((il->stations[sta_id].sta.key. in il4965_set_ccmp_dynamic_key_info()
3327 il->stations[sta_id].sta.key.key_offset = in il4965_set_ccmp_dynamic_key_info()
3328 il_get_free_ucode_key_idx(il); in il4965_set_ccmp_dynamic_key_info()
3332 WARN(il->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET, in il4965_set_ccmp_dynamic_key_info()
3335 il->stations[sta_id].sta.key.key_flags = key_flags; in il4965_set_ccmp_dynamic_key_info()
3336 il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK; in il4965_set_ccmp_dynamic_key_info()
3337 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; in il4965_set_ccmp_dynamic_key_info()
3339 memcpy(&sta_cmd, &il->stations[sta_id].sta, in il4965_set_ccmp_dynamic_key_info()
3341 spin_unlock_irqrestore(&il->sta_lock, flags); in il4965_set_ccmp_dynamic_key_info()
3343 return il_send_add_sta(il, &sta_cmd, CMD_SYNC); in il4965_set_ccmp_dynamic_key_info()
3347 il4965_set_tkip_dynamic_key_info(struct il_priv *il, in il4965_set_tkip_dynamic_key_info() argument
3358 if (sta_id == il->hw_params.bcast_id) in il4965_set_tkip_dynamic_key_info()
3364 spin_lock_irqsave(&il->sta_lock, flags); in il4965_set_tkip_dynamic_key_info()
3366 il->stations[sta_id].keyinfo.cipher = keyconf->cipher; in il4965_set_tkip_dynamic_key_info()
3367 il->stations[sta_id].keyinfo.keylen = 16; in il4965_set_tkip_dynamic_key_info()
3369 if ((il->stations[sta_id].sta.key. in il4965_set_tkip_dynamic_key_info()
3371 il->stations[sta_id].sta.key.key_offset = in il4965_set_tkip_dynamic_key_info()
3372 il_get_free_ucode_key_idx(il); in il4965_set_tkip_dynamic_key_info()
3376 WARN(il->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET, in il4965_set_tkip_dynamic_key_info()
3379 il->stations[sta_id].sta.key.key_flags = key_flags; in il4965_set_tkip_dynamic_key_info()
3382 memcpy(il->stations[sta_id].keyinfo.key, keyconf->key, 16); in il4965_set_tkip_dynamic_key_info()
3384 memcpy(il->stations[sta_id].sta.key.key, keyconf->key, 16); in il4965_set_tkip_dynamic_key_info()
3386 spin_unlock_irqrestore(&il->sta_lock, flags); in il4965_set_tkip_dynamic_key_info()
3392 il4965_update_tkip_key(struct il_priv *il, struct ieee80211_key_conf *keyconf, in il4965_update_tkip_key() argument
3399 if (il_scan_cancel(il)) { in il4965_update_tkip_key()
3405 sta_id = il_sta_id_or_broadcast(il, sta); in il4965_update_tkip_key()
3409 spin_lock_irqsave(&il->sta_lock, flags); in il4965_update_tkip_key()
3411 il->stations[sta_id].sta.key.tkip_rx_tsc_byte2 = (u8) iv32; in il4965_update_tkip_key()
3414 il->stations[sta_id].sta.key.tkip_rx_ttak[i] = in il4965_update_tkip_key()
3417 il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK; in il4965_update_tkip_key()
3418 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; in il4965_update_tkip_key()
3420 il_send_add_sta(il, &il->stations[sta_id].sta, CMD_ASYNC); in il4965_update_tkip_key()
3422 spin_unlock_irqrestore(&il->sta_lock, flags); in il4965_update_tkip_key()
3426 il4965_remove_dynamic_key(struct il_priv *il, in il4965_remove_dynamic_key() argument
3434 lockdep_assert_held(&il->mutex); in il4965_remove_dynamic_key()
3436 il->_4965.key_mapping_keys--; in il4965_remove_dynamic_key()
3438 spin_lock_irqsave(&il->sta_lock, flags); in il4965_remove_dynamic_key()
3439 key_flags = le16_to_cpu(il->stations[sta_id].sta.key.key_flags); in il4965_remove_dynamic_key()
3450 spin_unlock_irqrestore(&il->sta_lock, flags); in il4965_remove_dynamic_key()
3454 if (il->stations[sta_id].sta.key.key_flags & STA_KEY_FLG_INVALID) { in il4965_remove_dynamic_key()
3457 spin_unlock_irqrestore(&il->sta_lock, flags); in il4965_remove_dynamic_key()
3462 (il->stations[sta_id].sta.key.key_offset, &il->ucode_key_table)) in il4965_remove_dynamic_key()
3464 il->stations[sta_id].sta.key.key_offset); in il4965_remove_dynamic_key()
3465 memset(&il->stations[sta_id].keyinfo, 0, sizeof(struct il_hw_key)); in il4965_remove_dynamic_key()
3466 memset(&il->stations[sta_id].sta.key, 0, sizeof(struct il4965_keyinfo)); in il4965_remove_dynamic_key()
3467 il->stations[sta_id].sta.key.key_flags = in il4965_remove_dynamic_key()
3469 il->stations[sta_id].sta.key.key_offset = keyconf->hw_key_idx; in il4965_remove_dynamic_key()
3470 il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK; in il4965_remove_dynamic_key()
3471 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; in il4965_remove_dynamic_key()
3473 if (il_is_rfkill(il)) { in il4965_remove_dynamic_key()
3476 spin_unlock_irqrestore(&il->sta_lock, flags); in il4965_remove_dynamic_key()
3479 memcpy(&sta_cmd, &il->stations[sta_id].sta, in il4965_remove_dynamic_key()
3481 spin_unlock_irqrestore(&il->sta_lock, flags); in il4965_remove_dynamic_key()
3483 return il_send_add_sta(il, &sta_cmd, CMD_SYNC); in il4965_remove_dynamic_key()
3487 il4965_set_dynamic_key(struct il_priv *il, struct ieee80211_key_conf *keyconf, in il4965_set_dynamic_key() argument
3492 lockdep_assert_held(&il->mutex); in il4965_set_dynamic_key()
3494 il->_4965.key_mapping_keys++; in il4965_set_dynamic_key()
3500 il4965_set_ccmp_dynamic_key_info(il, keyconf, sta_id); in il4965_set_dynamic_key()
3504 il4965_set_tkip_dynamic_key_info(il, keyconf, sta_id); in il4965_set_dynamic_key()
3508 ret = il4965_set_wep_dynamic_key_info(il, keyconf, sta_id); in il4965_set_dynamic_key()
3530 il4965_alloc_bcast_station(struct il_priv *il) in il4965_alloc_bcast_station() argument
3536 spin_lock_irqsave(&il->sta_lock, flags); in il4965_alloc_bcast_station()
3537 sta_id = il_prep_station(il, il_bcast_addr, false, NULL); in il4965_alloc_bcast_station()
3540 spin_unlock_irqrestore(&il->sta_lock, flags); in il4965_alloc_bcast_station()
3545 il->stations[sta_id].used |= IL_STA_DRIVER_ACTIVE; in il4965_alloc_bcast_station()
3546 il->stations[sta_id].used |= IL_STA_BCAST; in il4965_alloc_bcast_station()
3547 spin_unlock_irqrestore(&il->sta_lock, flags); in il4965_alloc_bcast_station()
3549 link_cmd = il4965_sta_alloc_lq(il, sta_id); in il4965_alloc_bcast_station()
3556 spin_lock_irqsave(&il->sta_lock, flags); in il4965_alloc_bcast_station()
3557 il->stations[sta_id].lq = link_cmd; in il4965_alloc_bcast_station()
3558 spin_unlock_irqrestore(&il->sta_lock, flags); in il4965_alloc_bcast_station()
3570 il4965_update_bcast_station(struct il_priv *il) in il4965_update_bcast_station() argument
3574 u8 sta_id = il->hw_params.bcast_id; in il4965_update_bcast_station()
3576 link_cmd = il4965_sta_alloc_lq(il, sta_id); in il4965_update_bcast_station()
3582 spin_lock_irqsave(&il->sta_lock, flags); in il4965_update_bcast_station()
3583 if (il->stations[sta_id].lq) in il4965_update_bcast_station()
3584 kfree(il->stations[sta_id].lq); in il4965_update_bcast_station()
3587 il->stations[sta_id].lq = link_cmd; in il4965_update_bcast_station()
3588 spin_unlock_irqrestore(&il->sta_lock, flags); in il4965_update_bcast_station()
3594 il4965_update_bcast_stations(struct il_priv *il) in il4965_update_bcast_stations() argument
3596 return il4965_update_bcast_station(il); in il4965_update_bcast_stations()
3603 il4965_sta_tx_modify_enable_tid(struct il_priv *il, int sta_id, int tid) in il4965_sta_tx_modify_enable_tid() argument
3608 lockdep_assert_held(&il->mutex); in il4965_sta_tx_modify_enable_tid()
3611 spin_lock_irqsave(&il->sta_lock, flags); in il4965_sta_tx_modify_enable_tid()
3612 il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_TID_DISABLE_TX; in il4965_sta_tx_modify_enable_tid()
3613 il->stations[sta_id].sta.tid_disable_tx &= cpu_to_le16(~(1 << tid)); in il4965_sta_tx_modify_enable_tid()
3614 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; in il4965_sta_tx_modify_enable_tid()
3615 memcpy(&sta_cmd, &il->stations[sta_id].sta, in il4965_sta_tx_modify_enable_tid()
3617 spin_unlock_irqrestore(&il->sta_lock, flags); in il4965_sta_tx_modify_enable_tid()
3619 return il_send_add_sta(il, &sta_cmd, CMD_SYNC); in il4965_sta_tx_modify_enable_tid()
3623 il4965_sta_rx_agg_start(struct il_priv *il, struct ieee80211_sta *sta, int tid, in il4965_sta_rx_agg_start() argument
3630 lockdep_assert_held(&il->mutex); in il4965_sta_rx_agg_start()
3636 spin_lock_irqsave(&il->sta_lock, flags); in il4965_sta_rx_agg_start()
3637 il->stations[sta_id].sta.station_flags_msk = 0; in il4965_sta_rx_agg_start()
3638 il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_ADDBA_TID_MSK; in il4965_sta_rx_agg_start()
3639 il->stations[sta_id].sta.add_immediate_ba_tid = (u8) tid; in il4965_sta_rx_agg_start()
3640 il->stations[sta_id].sta.add_immediate_ba_ssn = cpu_to_le16(ssn); in il4965_sta_rx_agg_start()
3641 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; in il4965_sta_rx_agg_start()
3642 memcpy(&sta_cmd, &il->stations[sta_id].sta, in il4965_sta_rx_agg_start()
3644 spin_unlock_irqrestore(&il->sta_lock, flags); in il4965_sta_rx_agg_start()
3646 return il_send_add_sta(il, &sta_cmd, CMD_SYNC); in il4965_sta_rx_agg_start()
3650 il4965_sta_rx_agg_stop(struct il_priv *il, struct ieee80211_sta *sta, int tid) in il4965_sta_rx_agg_stop() argument
3656 lockdep_assert_held(&il->mutex); in il4965_sta_rx_agg_stop()
3664 spin_lock_irqsave(&il->sta_lock, flags); in il4965_sta_rx_agg_stop()
3665 il->stations[sta_id].sta.station_flags_msk = 0; in il4965_sta_rx_agg_stop()
3666 il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_DELBA_TID_MSK; in il4965_sta_rx_agg_stop()
3667 il->stations[sta_id].sta.remove_immediate_ba_tid = (u8) tid; in il4965_sta_rx_agg_stop()
3668 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; in il4965_sta_rx_agg_stop()
3669 memcpy(&sta_cmd, &il->stations[sta_id].sta, in il4965_sta_rx_agg_stop()
3671 spin_unlock_irqrestore(&il->sta_lock, flags); in il4965_sta_rx_agg_stop()
3673 return il_send_add_sta(il, &sta_cmd, CMD_SYNC); in il4965_sta_rx_agg_stop()
3677 il4965_sta_modify_sleep_tx_count(struct il_priv *il, int sta_id, int cnt) in il4965_sta_modify_sleep_tx_count() argument
3681 spin_lock_irqsave(&il->sta_lock, flags); in il4965_sta_modify_sleep_tx_count()
3682 il->stations[sta_id].sta.station_flags |= STA_FLG_PWR_SAVE_MSK; in il4965_sta_modify_sleep_tx_count()
3683 il->stations[sta_id].sta.station_flags_msk = STA_FLG_PWR_SAVE_MSK; in il4965_sta_modify_sleep_tx_count()
3684 il->stations[sta_id].sta.sta.modify_mask = in il4965_sta_modify_sleep_tx_count()
3686 il->stations[sta_id].sta.sleep_tx_count = cpu_to_le16(cnt); in il4965_sta_modify_sleep_tx_count()
3687 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; in il4965_sta_modify_sleep_tx_count()
3688 il_send_add_sta(il, &il->stations[sta_id].sta, CMD_ASYNC); in il4965_sta_modify_sleep_tx_count()
3689 spin_unlock_irqrestore(&il->sta_lock, flags); in il4965_sta_modify_sleep_tx_count()
3694 il4965_update_chain_flags(struct il_priv *il) in il4965_update_chain_flags() argument
3696 if (il->ops->set_rxon_chain) { in il4965_update_chain_flags()
3697 il->ops->set_rxon_chain(il); in il4965_update_chain_flags()
3698 if (il->active.rx_chain != il->staging.rx_chain) in il4965_update_chain_flags()
3699 il_commit_rxon(il); in il4965_update_chain_flags()
3704 il4965_clear_free_frames(struct il_priv *il) in il4965_clear_free_frames() argument
3708 D_INFO("%d frames on pre-allocated heap on clear.\n", il->frames_count); in il4965_clear_free_frames()
3710 while (!list_empty(&il->free_frames)) { in il4965_clear_free_frames()
3711 element = il->free_frames.next; in il4965_clear_free_frames()
3714 il->frames_count--; in il4965_clear_free_frames()
3717 if (il->frames_count) { in il4965_clear_free_frames()
3719 il->frames_count); in il4965_clear_free_frames()
3720 il->frames_count = 0; in il4965_clear_free_frames()
3725 il4965_get_free_frame(struct il_priv *il) in il4965_get_free_frame() argument
3729 if (list_empty(&il->free_frames)) { in il4965_get_free_frame()
3736 il->frames_count++; in il4965_get_free_frame()
3740 element = il->free_frames.next; in il4965_get_free_frame()
3746 il4965_free_frame(struct il_priv *il, struct il_frame *frame) in il4965_free_frame() argument
3749 list_add(&frame->list, &il->free_frames); in il4965_free_frame()
3753 il4965_fill_beacon_frame(struct il_priv *il, struct ieee80211_hdr *hdr, in il4965_fill_beacon_frame() argument
3756 lockdep_assert_held(&il->mutex); in il4965_fill_beacon_frame()
3758 if (!il->beacon_skb) in il4965_fill_beacon_frame()
3761 if (il->beacon_skb->len > left) in il4965_fill_beacon_frame()
3764 memcpy(hdr, il->beacon_skb->data, il->beacon_skb->len); in il4965_fill_beacon_frame()
3766 return il->beacon_skb->len; in il4965_fill_beacon_frame()
3771 il4965_set_beacon_tim(struct il_priv *il, in il4965_set_beacon_tim() argument
3798 il4965_hw_get_beacon_cmd(struct il_priv *il, struct il_frame *frame) in il4965_hw_get_beacon_cmd() argument
3809 lockdep_assert_held(&il->mutex); in il4965_hw_get_beacon_cmd()
3811 if (!il->beacon_enabled) { in il4965_hw_get_beacon_cmd()
3822 il4965_fill_beacon_frame(il, tx_beacon_cmd->frame, in il4965_hw_get_beacon_cmd()
3831 tx_beacon_cmd->tx.sta_id = il->hw_params.bcast_id; in il4965_hw_get_beacon_cmd()
3838 il4965_set_beacon_tim(il, tx_beacon_cmd, (u8 *) tx_beacon_cmd->frame, in il4965_hw_get_beacon_cmd()
3842 rate = il_get_lowest_plcp(il); in il4965_hw_get_beacon_cmd()
3843 il4965_toggle_tx_ant(il, &il->mgmt_tx_ant, il->hw_params.valid_tx_ant); in il4965_hw_get_beacon_cmd()
3844 rate_flags = BIT(il->mgmt_tx_ant) << RATE_MCS_ANT_POS; in il4965_hw_get_beacon_cmd()
3853 il4965_send_beacon_cmd(struct il_priv *il) in il4965_send_beacon_cmd() argument
3859 frame = il4965_get_free_frame(il); in il4965_send_beacon_cmd()
3866 frame_size = il4965_hw_get_beacon_cmd(il, frame); in il4965_send_beacon_cmd()
3869 il4965_free_frame(il, frame); in il4965_send_beacon_cmd()
3873 rc = il_send_cmd_pdu(il, C_TX_BEACON, frame_size, &frame->u.cmd[0]); in il4965_send_beacon_cmd()
3875 il4965_free_frame(il, frame); in il4965_send_beacon_cmd()
3932 il4965_hw_txq_free_tfd(struct il_priv *il, struct il_tx_queue *txq) in il4965_hw_txq_free_tfd() argument
3936 struct pci_dev *dev = il->pci_dev; in il4965_hw_txq_free_tfd()
3977 il4965_hw_txq_attach_buf_to_tfd(struct il_priv *il, struct il_tx_queue *txq, in il4965_hw_txq_attach_buf_to_tfd() argument
4017 il4965_hw_tx_queue_init(struct il_priv *il, struct il_tx_queue *txq) in il4965_hw_tx_queue_init() argument
4022 il_wr(il, FH49_MEM_CBBC_QUEUE(txq_id), txq->q.dma_addr >> 8); in il4965_hw_tx_queue_init()
4033 il4965_hdl_alive(struct il_priv *il, struct il_rx_buf *rxb) in il4965_hdl_alive() argument
4046 memcpy(&il->card_alive_init, &pkt->u.alive_frame, in il4965_hdl_alive()
4048 pwork = &il->init_alive_start; in il4965_hdl_alive()
4051 memcpy(&il->card_alive, &pkt->u.alive_frame, in il4965_hdl_alive()
4053 pwork = &il->alive_start; in il4965_hdl_alive()
4059 queue_delayed_work(il->workqueue, pwork, msecs_to_jiffies(5)); in il4965_hdl_alive()
4077 struct il_priv *il = (struct il_priv *)data; in il4965_bg_stats_periodic() local
4079 if (test_bit(S_EXIT_PENDING, &il->status)) in il4965_bg_stats_periodic()
4083 if (!il_is_ready_rf(il)) in il4965_bg_stats_periodic()
4086 il_send_stats_request(il, CMD_ASYNC, false); in il4965_bg_stats_periodic()
4090 il4965_hdl_beacon(struct il_priv *il, struct il_rx_buf *rxb) in il4965_hdl_beacon() argument
4104 il->ibss_manager = le32_to_cpu(beacon->ibss_mgr_status); in il4965_hdl_beacon()
4108 il4965_perform_ct_kill_task(struct il_priv *il) in il4965_perform_ct_kill_task() argument
4114 if (il->mac80211_registered) in il4965_perform_ct_kill_task()
4115 ieee80211_stop_queues(il->hw); in il4965_perform_ct_kill_task()
4117 _il_wr(il, CSR_UCODE_DRV_GP1_SET, in il4965_perform_ct_kill_task()
4119 _il_rd(il, CSR_UCODE_DRV_GP1); in il4965_perform_ct_kill_task()
4121 spin_lock_irqsave(&il->reg_lock, flags); in il4965_perform_ct_kill_task()
4122 if (likely(_il_grab_nic_access(il))) in il4965_perform_ct_kill_task()
4123 _il_release_nic_access(il); in il4965_perform_ct_kill_task()
4124 spin_unlock_irqrestore(&il->reg_lock, flags); in il4965_perform_ct_kill_task()
4130 il4965_hdl_card_state(struct il_priv *il, struct il_rx_buf *rxb) in il4965_hdl_card_state() argument
4134 unsigned long status = il->status; in il4965_hdl_card_state()
4143 _il_wr(il, CSR_UCODE_DRV_GP1_SET, in il4965_hdl_card_state()
4146 il_wr(il, HBUS_TARG_MBX_C, HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED); in il4965_hdl_card_state()
4149 _il_wr(il, CSR_UCODE_DRV_GP1_CLR, in il4965_hdl_card_state()
4151 il_wr(il, HBUS_TARG_MBX_C, in il4965_hdl_card_state()
4157 il4965_perform_ct_kill_task(il); in il4965_hdl_card_state()
4160 set_bit(S_RFKILL, &il->status); in il4965_hdl_card_state()
4162 clear_bit(S_RFKILL, &il->status); in il4965_hdl_card_state()
4165 il_scan_cancel(il); in il4965_hdl_card_state()
4168 test_bit(S_RFKILL, &il->status))) in il4965_hdl_card_state()
4169 wiphy_rfkill_set_hw_state(il->hw->wiphy, in il4965_hdl_card_state()
4170 test_bit(S_RFKILL, &il->status)); in il4965_hdl_card_state()
4172 wake_up(&il->wait_command_queue); in il4965_hdl_card_state()
4185 il4965_setup_handlers(struct il_priv *il) in il4965_setup_handlers() argument
4187 il->handlers[N_ALIVE] = il4965_hdl_alive; in il4965_setup_handlers()
4188 il->handlers[N_ERROR] = il_hdl_error; in il4965_setup_handlers()
4189 il->handlers[N_CHANNEL_SWITCH] = il_hdl_csa; in il4965_setup_handlers()
4190 il->handlers[N_SPECTRUM_MEASUREMENT] = il_hdl_spectrum_measurement; in il4965_setup_handlers()
4191 il->handlers[N_PM_SLEEP] = il_hdl_pm_sleep; in il4965_setup_handlers()
4192 il->handlers[N_PM_DEBUG_STATS] = il_hdl_pm_debug_stats; in il4965_setup_handlers()
4193 il->handlers[N_BEACON] = il4965_hdl_beacon; in il4965_setup_handlers()
4200 il->handlers[C_STATS] = il4965_hdl_c_stats; in il4965_setup_handlers()
4201 il->handlers[N_STATS] = il4965_hdl_stats; in il4965_setup_handlers()
4203 il_setup_rx_scan_handlers(il); in il4965_setup_handlers()
4206 il->handlers[N_CARD_STATE] = il4965_hdl_card_state; in il4965_setup_handlers()
4208 il->handlers[N_MISSED_BEACONS] = il4965_hdl_missed_beacon; in il4965_setup_handlers()
4210 il->handlers[N_RX_PHY] = il4965_hdl_rx_phy; in il4965_setup_handlers()
4211 il->handlers[N_RX_MPDU] = il4965_hdl_rx; in il4965_setup_handlers()
4212 il->handlers[N_RX] = il4965_hdl_rx; in il4965_setup_handlers()
4214 il->handlers[N_COMPRESSED_BA] = il4965_hdl_compressed_ba; in il4965_setup_handlers()
4216 il->handlers[C_TX] = il4965_hdl_tx; in il4965_setup_handlers()
4227 il4965_rx_handle(struct il_priv *il) in il4965_rx_handle() argument
4231 struct il_rx_queue *rxq = &il->rxq; in il4965_rx_handle()
4268 pci_unmap_page(il->pci_dev, rxb->page_dma, in il4965_rx_handle()
4269 PAGE_SIZE << il->hw_params.rx_page_order, in il4965_rx_handle()
4276 reclaim = il_need_reclaim(il, pkt); in il4965_rx_handle()
4281 if (il->handlers[pkt->hdr.cmd]) { in il4965_rx_handle()
4284 il->isr_stats.handlers[pkt->hdr.cmd]++; in il4965_rx_handle()
4285 il->handlers[pkt->hdr.cmd] (il, rxb); in il4965_rx_handle()
4304 il_tx_cmd_complete(il, rxb); in il4965_rx_handle()
4315 pci_map_page(il->pci_dev, rxb->page, 0, in il4965_rx_handle()
4316 PAGE_SIZE << il->hw_params. in il4965_rx_handle()
4319 if (unlikely(pci_dma_mapping_error(il->pci_dev, in il4965_rx_handle()
4321 __il_free_pages(il, rxb->page); in il4965_rx_handle()
4340 il4965_rx_replenish_now(il); in il4965_rx_handle()
4349 il4965_rx_replenish_now(il); in il4965_rx_handle()
4351 il4965_rx_queue_restock(il); in il4965_rx_handle()
4356 il4965_synchronize_irq(struct il_priv *il) in il4965_synchronize_irq() argument
4359 synchronize_irq(il->pci_dev->irq); in il4965_synchronize_irq()
4360 tasklet_kill(&il->irq_tasklet); in il4965_synchronize_irq()
4364 il4965_irq_tasklet(struct il_priv *il) in il4965_irq_tasklet() argument
4374 spin_lock_irqsave(&il->lock, flags); in il4965_irq_tasklet()
4379 inta = _il_rd(il, CSR_INT); in il4965_irq_tasklet()
4380 _il_wr(il, CSR_INT, inta); in il4965_irq_tasklet()
4385 inta_fh = _il_rd(il, CSR_FH_INT_STATUS); in il4965_irq_tasklet()
4386 _il_wr(il, CSR_FH_INT_STATUS, inta_fh); in il4965_irq_tasklet()
4389 if (il_get_debug_level(il) & IL_DL_ISR) { in il4965_irq_tasklet()
4391 inta_mask = _il_rd(il, CSR_INT_MASK); in il4965_irq_tasklet()
4397 spin_unlock_irqrestore(&il->lock, flags); in il4965_irq_tasklet()
4413 il_disable_interrupts(il); in il4965_irq_tasklet()
4415 il->isr_stats.hw++; in il4965_irq_tasklet()
4416 il_irq_handle_error(il); in il4965_irq_tasklet()
4423 if (il_get_debug_level(il) & (IL_DL_ISR)) { in il4965_irq_tasklet()
4428 il->isr_stats.sch++; in il4965_irq_tasklet()
4434 il->isr_stats.alive++; in il4965_irq_tasklet()
4445 if (!(_il_rd(il, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)) in il4965_irq_tasklet()
4451 il->isr_stats.rfkill++; in il4965_irq_tasklet()
4459 set_bit(S_RFKILL, &il->status); in il4965_irq_tasklet()
4461 clear_bit(S_RFKILL, &il->status); in il4965_irq_tasklet()
4462 il_force_reset(il, true); in il4965_irq_tasklet()
4464 wiphy_rfkill_set_hw_state(il->hw->wiphy, hw_rf_kill); in il4965_irq_tasklet()
4472 il->isr_stats.ctkill++; in il4965_irq_tasklet()
4480 il->isr_stats.sw++; in il4965_irq_tasklet()
4481 il_irq_handle_error(il); in il4965_irq_tasklet()
4492 il_rx_queue_update_write_ptr(il, &il->rxq); in il4965_irq_tasklet()
4493 for (i = 0; i < il->hw_params.max_txq_num; i++) in il4965_irq_tasklet()
4494 il_txq_update_write_ptr(il, &il->txq[i]); in il4965_irq_tasklet()
4495 il->isr_stats.wakeup++; in il4965_irq_tasklet()
4503 il4965_rx_handle(il); in il4965_irq_tasklet()
4504 il->isr_stats.rx++; in il4965_irq_tasklet()
4511 il->isr_stats.tx++; in il4965_irq_tasklet()
4514 il->ucode_write_complete = 1; in il4965_irq_tasklet()
4515 wake_up(&il->wait_command_queue); in il4965_irq_tasklet()
4520 il->isr_stats.unhandled++; in il4965_irq_tasklet()
4523 if (inta & ~(il->inta_mask)) { in il4965_irq_tasklet()
4525 inta & ~il->inta_mask); in il4965_irq_tasklet()
4531 if (test_bit(S_INT_ENABLED, &il->status)) in il4965_irq_tasklet()
4532 il_enable_interrupts(il); in il4965_irq_tasklet()
4535 il_enable_rfkill_int(il); in il4965_irq_tasklet()
4538 if (il_get_debug_level(il) & (IL_DL_ISR)) { in il4965_irq_tasklet()
4539 inta = _il_rd(il, CSR_INT); in il4965_irq_tasklet()
4540 inta_mask = _il_rd(il, CSR_INT_MASK); in il4965_irq_tasklet()
4541 inta_fh = _il_rd(il, CSR_FH_INT_STATUS); in il4965_irq_tasklet()
4571 struct il_priv *il = dev_get_drvdata(d); in il4965_show_debug_level() local
4572 return sprintf(buf, "0x%08X\n", il_get_debug_level(il)); in il4965_show_debug_level()
4579 struct il_priv *il = dev_get_drvdata(d); in il4965_store_debug_level() local
4587 il->debug_level = val; in il4965_store_debug_level()
4601 struct il_priv *il = dev_get_drvdata(d); in il4965_show_temperature() local
4603 if (!il_is_alive(il)) in il4965_show_temperature()
4606 return sprintf(buf, "%d\n", il->temperature); in il4965_show_temperature()
4614 struct il_priv *il = dev_get_drvdata(d); in il4965_show_tx_power() local
4616 if (!il_is_ready_rf(il)) in il4965_show_tx_power()
4619 return sprintf(buf, "%d\n", il->tx_power_user_lmt); in il4965_show_tx_power()
4626 struct il_priv *il = dev_get_drvdata(d); in il4965_store_tx_power() local
4634 ret = il_set_tx_power(il, val, false); in il4965_store_tx_power()
4667 il4965_dealloc_ucode_pci(struct il_priv *il) in il4965_dealloc_ucode_pci() argument
4669 il_free_fw_desc(il->pci_dev, &il->ucode_code); in il4965_dealloc_ucode_pci()
4670 il_free_fw_desc(il->pci_dev, &il->ucode_data); in il4965_dealloc_ucode_pci()
4671 il_free_fw_desc(il->pci_dev, &il->ucode_data_backup); in il4965_dealloc_ucode_pci()
4672 il_free_fw_desc(il->pci_dev, &il->ucode_init); in il4965_dealloc_ucode_pci()
4673 il_free_fw_desc(il->pci_dev, &il->ucode_init_data); in il4965_dealloc_ucode_pci()
4674 il_free_fw_desc(il->pci_dev, &il->ucode_boot); in il4965_dealloc_ucode_pci()
4678 il4965_nic_start(struct il_priv *il) in il4965_nic_start() argument
4681 _il_wr(il, CSR_RESET, 0); in il4965_nic_start()
4686 static int il4965_mac_setup_register(struct il_priv *il, u32 max_probe_length);
4689 il4965_request_firmware(struct il_priv *il, bool first) in il4965_request_firmware() argument
4691 const char *name_pre = il->cfg->fw_name_pre; in il4965_request_firmware()
4695 il->fw_idx = il->cfg->ucode_api_max; in il4965_request_firmware()
4696 sprintf(tag, "%d", il->fw_idx); in il4965_request_firmware()
4698 il->fw_idx--; in il4965_request_firmware()
4699 sprintf(tag, "%d", il->fw_idx); in il4965_request_firmware()
4702 if (il->fw_idx < il->cfg->ucode_api_min) { in il4965_request_firmware()
4707 sprintf(il->firmware_name, "%s%s%s", name_pre, tag, ".ucode"); in il4965_request_firmware()
4709 D_INFO("attempting to load firmware '%s'\n", il->firmware_name); in il4965_request_firmware()
4711 return request_firmware_nowait(THIS_MODULE, 1, il->firmware_name, in il4965_request_firmware()
4712 &il->pci_dev->dev, GFP_KERNEL, il, in il4965_request_firmware()
4722 il4965_load_firmware(struct il_priv *il, const struct firmware *ucode_raw, in il4965_load_firmware() argument
4729 il->ucode_ver = le32_to_cpu(ucode->ver); in il4965_load_firmware()
4730 api_ver = IL_UCODE_API(il->ucode_ver); in il4965_load_firmware()
4784 struct il_priv *il = context; in il4965_ucode_callback() local
4788 const unsigned int api_max = il->cfg->ucode_api_max; in il4965_ucode_callback()
4789 const unsigned int api_min = il->cfg->ucode_api_min; in il4965_ucode_callback()
4799 if (il->fw_idx <= il->cfg->ucode_api_max) in il4965_ucode_callback()
4801 il->firmware_name); in il4965_ucode_callback()
4805 D_INFO("Loaded firmware file '%s' (%zd bytes).\n", il->firmware_name, in il4965_ucode_callback()
4817 err = il4965_load_firmware(il, ucode_raw, &pieces); in il4965_ucode_callback()
4822 api_ver = IL_UCODE_API(il->ucode_ver); in il4965_ucode_callback()
4843 IL_UCODE_MAJOR(il->ucode_ver), IL_UCODE_MINOR(il->ucode_ver), in il4965_ucode_callback()
4844 IL_UCODE_API(il->ucode_ver), IL_UCODE_SERIAL(il->ucode_ver)); in il4965_ucode_callback()
4846 snprintf(il->hw->wiphy->fw_version, sizeof(il->hw->wiphy->fw_version), in il4965_ucode_callback()
4847 "%u.%u.%u.%u", IL_UCODE_MAJOR(il->ucode_ver), in il4965_ucode_callback()
4848 IL_UCODE_MINOR(il->ucode_ver), IL_UCODE_API(il->ucode_ver), in il4965_ucode_callback()
4849 IL_UCODE_SERIAL(il->ucode_ver)); in il4965_ucode_callback()
4857 D_INFO("f/w package hdr ucode version raw = 0x%x\n", il->ucode_ver); in il4965_ucode_callback()
4865 if (pieces.inst_size > il->hw_params.max_inst_size) { in il4965_ucode_callback()
4871 if (pieces.data_size > il->hw_params.max_data_size) { in il4965_ucode_callback()
4877 if (pieces.init_size > il->hw_params.max_inst_size) { in il4965_ucode_callback()
4883 if (pieces.init_data_size > il->hw_params.max_data_size) { in il4965_ucode_callback()
4889 if (pieces.boot_size > il->hw_params.max_bsm_size) { in il4965_ucode_callback()
4900 il->ucode_code.len = pieces.inst_size; in il4965_ucode_callback()
4901 il_alloc_fw_desc(il->pci_dev, &il->ucode_code); in il4965_ucode_callback()
4903 il->ucode_data.len = pieces.data_size; in il4965_ucode_callback()
4904 il_alloc_fw_desc(il->pci_dev, &il->ucode_data); in il4965_ucode_callback()
4906 il->ucode_data_backup.len = pieces.data_size; in il4965_ucode_callback()
4907 il_alloc_fw_desc(il->pci_dev, &il->ucode_data_backup); in il4965_ucode_callback()
4909 if (!il->ucode_code.v_addr || !il->ucode_data.v_addr || in il4965_ucode_callback()
4910 !il->ucode_data_backup.v_addr) in il4965_ucode_callback()
4915 il->ucode_init.len = pieces.init_size; in il4965_ucode_callback()
4916 il_alloc_fw_desc(il->pci_dev, &il->ucode_init); in il4965_ucode_callback()
4918 il->ucode_init_data.len = pieces.init_data_size; in il4965_ucode_callback()
4919 il_alloc_fw_desc(il->pci_dev, &il->ucode_init_data); in il4965_ucode_callback()
4921 if (!il->ucode_init.v_addr || !il->ucode_init_data.v_addr) in il4965_ucode_callback()
4927 il->ucode_boot.len = pieces.boot_size; in il4965_ucode_callback()
4928 il_alloc_fw_desc(il->pci_dev, &il->ucode_boot); in il4965_ucode_callback()
4930 if (!il->ucode_boot.v_addr) in il4965_ucode_callback()
4936 il->sta_key_max_num = STA_KEY_MAX_NUM; in il4965_ucode_callback()
4943 memcpy(il->ucode_code.v_addr, pieces.inst, pieces.inst_size); in il4965_ucode_callback()
4946 il->ucode_code.v_addr, (u32) il->ucode_code.p_addr); in il4965_ucode_callback()
4954 memcpy(il->ucode_data.v_addr, pieces.data, pieces.data_size); in il4965_ucode_callback()
4955 memcpy(il->ucode_data_backup.v_addr, pieces.data, pieces.data_size); in il4965_ucode_callback()
4961 memcpy(il->ucode_init.v_addr, pieces.init, pieces.init_size); in il4965_ucode_callback()
4968 memcpy(il->ucode_init_data.v_addr, pieces.init_data, in il4965_ucode_callback()
4975 memcpy(il->ucode_boot.v_addr, pieces.boot, pieces.boot_size); in il4965_ucode_callback()
4981 il->_4965.phy_calib_chain_noise_reset_cmd = in il4965_ucode_callback()
4983 il->_4965.phy_calib_chain_noise_gain_cmd = in il4965_ucode_callback()
4991 err = il4965_mac_setup_register(il, max_probe_length); in il4965_ucode_callback()
4995 err = il_dbgfs_register(il, DRV_NAME); in il4965_ucode_callback()
5000 err = sysfs_create_group(&il->pci_dev->dev.kobj, &il_attribute_group); in il4965_ucode_callback()
5008 complete(&il->_4965.firmware_loading_complete); in il4965_ucode_callback()
5013 if (il4965_request_firmware(il, false)) in il4965_ucode_callback()
5020 il4965_dealloc_ucode_pci(il); in il4965_ucode_callback()
5022 complete(&il->_4965.firmware_loading_complete); in il4965_ucode_callback()
5023 device_release_driver(&il->pci_dev->dev); in il4965_ucode_callback()
5101 il4965_dump_nic_error_log(struct il_priv *il) in il4965_dump_nic_error_log() argument
5108 if (il->ucode_type == UCODE_INIT) in il4965_dump_nic_error_log()
5109 base = le32_to_cpu(il->card_alive_init.error_event_table_ptr); in il4965_dump_nic_error_log()
5111 base = le32_to_cpu(il->card_alive.error_event_table_ptr); in il4965_dump_nic_error_log()
5113 if (!il->ops->is_valid_rtc_data_addr(base)) { in il4965_dump_nic_error_log()
5115 base, (il->ucode_type == UCODE_INIT) ? "Init" : "RT"); in il4965_dump_nic_error_log()
5119 count = il_read_targ_mem(il, base); in il4965_dump_nic_error_log()
5123 IL_ERR("Status: 0x%08lX, count: %d\n", il->status, count); in il4965_dump_nic_error_log()
5126 desc = il_read_targ_mem(il, base + 1 * sizeof(u32)); in il4965_dump_nic_error_log()
5127 il->isr_stats.err_code = desc; in il4965_dump_nic_error_log()
5128 pc = il_read_targ_mem(il, base + 2 * sizeof(u32)); in il4965_dump_nic_error_log()
5129 blink1 = il_read_targ_mem(il, base + 3 * sizeof(u32)); in il4965_dump_nic_error_log()
5130 blink2 = il_read_targ_mem(il, base + 4 * sizeof(u32)); in il4965_dump_nic_error_log()
5131 ilink1 = il_read_targ_mem(il, base + 5 * sizeof(u32)); in il4965_dump_nic_error_log()
5132 ilink2 = il_read_targ_mem(il, base + 6 * sizeof(u32)); in il4965_dump_nic_error_log()
5133 data1 = il_read_targ_mem(il, base + 7 * sizeof(u32)); in il4965_dump_nic_error_log()
5134 data2 = il_read_targ_mem(il, base + 8 * sizeof(u32)); in il4965_dump_nic_error_log()
5135 line = il_read_targ_mem(il, base + 9 * sizeof(u32)); in il4965_dump_nic_error_log()
5136 time = il_read_targ_mem(il, base + 11 * sizeof(u32)); in il4965_dump_nic_error_log()
5137 hcmd = il_read_targ_mem(il, base + 22 * sizeof(u32)); in il4965_dump_nic_error_log()
5149 il4965_rf_kill_ct_config(struct il_priv *il) in il4965_rf_kill_ct_config() argument
5155 spin_lock_irqsave(&il->lock, flags); in il4965_rf_kill_ct_config()
5156 _il_wr(il, CSR_UCODE_DRV_GP1_CLR, in il4965_rf_kill_ct_config()
5158 spin_unlock_irqrestore(&il->lock, flags); in il4965_rf_kill_ct_config()
5161 cpu_to_le32(il->hw_params.ct_kill_threshold); in il4965_rf_kill_ct_config()
5163 ret = il_send_cmd_pdu(il, C_CT_KILL_CONFIG, sizeof(cmd), &cmd); in il4965_rf_kill_ct_config()
5169 il->hw_params.ct_kill_threshold); in il4965_rf_kill_ct_config()
5185 il4965_alive_notify(struct il_priv *il) in il4965_alive_notify() argument
5192 spin_lock_irqsave(&il->lock, flags); in il4965_alive_notify()
5195 il->scd_base_addr = il_rd_prph(il, IL49_SCD_SRAM_BASE_ADDR); in il4965_alive_notify()
5196 a = il->scd_base_addr + IL49_SCD_CONTEXT_DATA_OFFSET; in il4965_alive_notify()
5197 for (; a < il->scd_base_addr + IL49_SCD_TX_STTS_BITMAP_OFFSET; a += 4) in il4965_alive_notify()
5198 il_write_targ_mem(il, a, 0); in il4965_alive_notify()
5199 for (; a < il->scd_base_addr + IL49_SCD_TRANSLATE_TBL_OFFSET; a += 4) in il4965_alive_notify()
5200 il_write_targ_mem(il, a, 0); in il4965_alive_notify()
5203 il->scd_base_addr + in il4965_alive_notify()
5204 IL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(il->hw_params.max_txq_num); in il4965_alive_notify()
5206 il_write_targ_mem(il, a, 0); in il4965_alive_notify()
5209 il_wr_prph(il, IL49_SCD_DRAM_BASE_ADDR, il->scd_bc_tbls.dma >> 10); in il4965_alive_notify()
5213 il_wr(il, FH49_TCSR_CHNL_TX_CONFIG_REG(chan), in il4965_alive_notify()
5218 reg_val = il_rd(il, FH49_TX_CHICKEN_BITS_REG); in il4965_alive_notify()
5219 il_wr(il, FH49_TX_CHICKEN_BITS_REG, in il4965_alive_notify()
5223 il_wr_prph(il, IL49_SCD_QUEUECHAIN_SEL, 0); in il4965_alive_notify()
5226 for (i = 0; i < il->hw_params.max_txq_num; i++) { in il4965_alive_notify()
5229 il_wr_prph(il, IL49_SCD_QUEUE_RDPTR(i), 0); in il4965_alive_notify()
5230 il_wr(il, HBUS_TARG_WRPTR, 0 | (i << 8)); in il4965_alive_notify()
5233 il_write_targ_mem(il, in il4965_alive_notify()
5234 il->scd_base_addr + in il4965_alive_notify()
5241 il_write_targ_mem(il, in il4965_alive_notify()
5242 il->scd_base_addr + in il4965_alive_notify()
5250 il_wr_prph(il, IL49_SCD_INTERRUPT_MASK, in il4965_alive_notify()
5251 (1 << il->hw_params.max_txq_num) - 1); in il4965_alive_notify()
5254 il4965_txq_set_sched(il, IL_MASK(0, 6)); in il4965_alive_notify()
5256 il4965_set_wr_ptrs(il, IL_DEFAULT_CMD_QUEUE_NUM, 0); in il4965_alive_notify()
5259 memset(&il->queue_stopped[0], 0, sizeof(il->queue_stopped)); in il4965_alive_notify()
5261 atomic_set(&il->queue_stop_count[i], 0); in il4965_alive_notify()
5264 il->txq_ctx_active_msk = 0; in il4965_alive_notify()
5271 il_txq_ctx_activate(il, i); in il4965_alive_notify()
5276 il4965_tx_queue_set_status(il, &il->txq[i], ac, 0); in il4965_alive_notify()
5279 spin_unlock_irqrestore(&il->lock, flags); in il4965_alive_notify()
5290 il4965_alive_start(struct il_priv *il) in il4965_alive_start() argument
5296 if (il->card_alive.is_valid != UCODE_VALID_OK) { in il4965_alive_start()
5306 if (il4965_verify_ucode(il)) { in il4965_alive_start()
5313 ret = il4965_alive_notify(il); in il4965_alive_start()
5320 set_bit(S_ALIVE, &il->status); in il4965_alive_start()
5323 il_setup_watchdog(il); in il4965_alive_start()
5325 if (il_is_rfkill(il)) in il4965_alive_start()
5328 ieee80211_wake_queues(il->hw); in il4965_alive_start()
5330 il->active_rate = RATES_MASK; in il4965_alive_start()
5332 il_power_update_mode(il, true); in il4965_alive_start()
5335 if (il_is_associated(il)) { in il4965_alive_start()
5337 (struct il_rxon_cmd *)&il->active; in il4965_alive_start()
5339 il->staging.filter_flags |= RXON_FILTER_ASSOC_MSK; in il4965_alive_start()
5343 il_connection_init_rx_config(il); in il4965_alive_start()
5345 if (il->ops->set_rxon_chain) in il4965_alive_start()
5346 il->ops->set_rxon_chain(il); in il4965_alive_start()
5350 il_send_bt_config(il); in il4965_alive_start()
5352 il4965_reset_run_time_calib(il); in il4965_alive_start()
5354 set_bit(S_READY, &il->status); in il4965_alive_start()
5357 il_commit_rxon(il); in il4965_alive_start()
5360 il4965_rf_kill_ct_config(il); in il4965_alive_start()
5363 wake_up(&il->wait_command_queue); in il4965_alive_start()
5368 queue_work(il->workqueue, &il->restart); in il4965_alive_start()
5371 static void il4965_cancel_deferred_work(struct il_priv *il);
5374 __il4965_down(struct il_priv *il) in __il4965_down() argument
5381 il_scan_cancel_timeout(il, 200); in __il4965_down()
5383 exit_pending = test_and_set_bit(S_EXIT_PENDING, &il->status); in __il4965_down()
5387 del_timer_sync(&il->watchdog); in __il4965_down()
5389 il_clear_ucode_stations(il); in __il4965_down()
5392 spin_lock_irq(&il->sta_lock); in __il4965_down()
5400 memset(il->_4965.wep_keys, 0, sizeof(il->_4965.wep_keys)); in __il4965_down()
5401 il->_4965.key_mapping_keys = 0; in __il4965_down()
5402 spin_unlock_irq(&il->sta_lock); in __il4965_down()
5404 il_dealloc_bcast_stations(il); in __il4965_down()
5405 il_clear_driver_stations(il); in __il4965_down()
5408 wake_up_all(&il->wait_command_queue); in __il4965_down()
5413 clear_bit(S_EXIT_PENDING, &il->status); in __il4965_down()
5416 _il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET); in __il4965_down()
5419 spin_lock_irqsave(&il->lock, flags); in __il4965_down()
5420 il_disable_interrupts(il); in __il4965_down()
5421 spin_unlock_irqrestore(&il->lock, flags); in __il4965_down()
5422 il4965_synchronize_irq(il); in __il4965_down()
5424 if (il->mac80211_registered) in __il4965_down()
5425 ieee80211_stop_queues(il->hw); in __il4965_down()
5429 if (!il_is_init(il)) { in __il4965_down()
5430 il->status = in __il4965_down()
5431 test_bit(S_RFKILL, &il->status) << S_RFKILL | in __il4965_down()
5432 test_bit(S_GEO_CONFIGURED, &il->status) << S_GEO_CONFIGURED | in __il4965_down()
5433 test_bit(S_EXIT_PENDING, &il->status) << S_EXIT_PENDING; in __il4965_down()
5439 il->status &= in __il4965_down()
5440 test_bit(S_RFKILL, &il->status) << S_RFKILL | in __il4965_down()
5441 test_bit(S_GEO_CONFIGURED, &il->status) << S_GEO_CONFIGURED | in __il4965_down()
5442 test_bit(S_FW_ERROR, &il->status) << S_FW_ERROR | in __il4965_down()
5443 test_bit(S_EXIT_PENDING, &il->status) << S_EXIT_PENDING; in __il4965_down()
5450 spin_lock_irq(&il->reg_lock); in __il4965_down()
5453 il4965_txq_ctx_stop(il); in __il4965_down()
5454 il4965_rxq_stop(il); in __il4965_down()
5456 _il_wr_prph(il, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT); in __il4965_down()
5459 _il_clear_bit(il, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); in __il4965_down()
5461 _il_apm_stop(il); in __il4965_down()
5463 spin_unlock_irq(&il->reg_lock); in __il4965_down()
5465 il4965_txq_ctx_unmap(il); in __il4965_down()
5467 memset(&il->card_alive, 0, sizeof(struct il_alive_resp)); in __il4965_down()
5469 dev_kfree_skb(il->beacon_skb); in __il4965_down()
5470 il->beacon_skb = NULL; in __il4965_down()
5473 il4965_clear_free_frames(il); in __il4965_down()
5477 il4965_down(struct il_priv *il) in il4965_down() argument
5479 mutex_lock(&il->mutex); in il4965_down()
5480 __il4965_down(il); in il4965_down()
5481 mutex_unlock(&il->mutex); in il4965_down()
5483 il4965_cancel_deferred_work(il); in il4965_down()
5488 il4965_set_hw_ready(struct il_priv *il) in il4965_set_hw_ready() argument
5492 il_set_bit(il, CSR_HW_IF_CONFIG_REG, in il4965_set_hw_ready()
5496 ret = _il_poll_bit(il, CSR_HW_IF_CONFIG_REG, in il4965_set_hw_ready()
5501 il->hw_ready = true; in il4965_set_hw_ready()
5503 D_INFO("hardware %s ready\n", (il->hw_ready) ? "" : "not"); in il4965_set_hw_ready()
5507 il4965_prepare_card_hw(struct il_priv *il) in il4965_prepare_card_hw() argument
5511 il->hw_ready = false; in il4965_prepare_card_hw()
5513 il4965_set_hw_ready(il); in il4965_prepare_card_hw()
5514 if (il->hw_ready) in il4965_prepare_card_hw()
5518 il_set_bit(il, CSR_HW_IF_CONFIG_REG, CSR_HW_IF_CONFIG_REG_PREPARE); in il4965_prepare_card_hw()
5521 _il_poll_bit(il, CSR_HW_IF_CONFIG_REG, in il4965_prepare_card_hw()
5527 il4965_set_hw_ready(il); in il4965_prepare_card_hw()
5533 __il4965_up(struct il_priv *il) in __il4965_up() argument
5538 if (test_bit(S_EXIT_PENDING, &il->status)) { in __il4965_up()
5543 if (!il->ucode_data_backup.v_addr || !il->ucode_data.v_addr) { in __il4965_up()
5548 ret = il4965_alloc_bcast_station(il); in __il4965_up()
5550 il_dealloc_bcast_stations(il); in __il4965_up()
5554 il4965_prepare_card_hw(il); in __il4965_up()
5555 if (!il->hw_ready) { in __il4965_up()
5561 if (_il_rd(il, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW) in __il4965_up()
5562 clear_bit(S_RFKILL, &il->status); in __il4965_up()
5564 set_bit(S_RFKILL, &il->status); in __il4965_up()
5565 wiphy_rfkill_set_hw_state(il->hw->wiphy, true); in __il4965_up()
5567 il_enable_rfkill_int(il); in __il4965_up()
5572 _il_wr(il, CSR_INT, 0xFFFFFFFF); in __il4965_up()
5575 il->cmd_queue = IL_DEFAULT_CMD_QUEUE_NUM; in __il4965_up()
5577 ret = il4965_hw_nic_init(il); in __il4965_up()
5584 _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); in __il4965_up()
5585 _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); in __il4965_up()
5588 _il_wr(il, CSR_INT, 0xFFFFFFFF); in __il4965_up()
5589 il_enable_interrupts(il); in __il4965_up()
5592 _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); in __il4965_up()
5593 _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); in __il4965_up()
5598 memcpy(il->ucode_data_backup.v_addr, il->ucode_data.v_addr, in __il4965_up()
5599 il->ucode_data.len); in __il4965_up()
5606 ret = il->ops->load_ucode(il); in __il4965_up()
5614 il4965_nic_start(il); in __il4965_up()
5621 set_bit(S_EXIT_PENDING, &il->status); in __il4965_up()
5622 __il4965_down(il); in __il4965_up()
5623 clear_bit(S_EXIT_PENDING, &il->status); in __il4965_up()
5640 struct il_priv *il = in il4965_bg_init_alive_start() local
5643 mutex_lock(&il->mutex); in il4965_bg_init_alive_start()
5644 if (test_bit(S_EXIT_PENDING, &il->status)) in il4965_bg_init_alive_start()
5647 il->ops->init_alive_start(il); in il4965_bg_init_alive_start()
5649 mutex_unlock(&il->mutex); in il4965_bg_init_alive_start()
5655 struct il_priv *il = in il4965_bg_alive_start() local
5658 mutex_lock(&il->mutex); in il4965_bg_alive_start()
5659 if (test_bit(S_EXIT_PENDING, &il->status)) in il4965_bg_alive_start()
5662 il4965_alive_start(il); in il4965_bg_alive_start()
5664 mutex_unlock(&il->mutex); in il4965_bg_alive_start()
5670 struct il_priv *il = container_of(work, struct il_priv, in il4965_bg_run_time_calib_work() local
5673 mutex_lock(&il->mutex); in il4965_bg_run_time_calib_work()
5675 if (test_bit(S_EXIT_PENDING, &il->status) || in il4965_bg_run_time_calib_work()
5676 test_bit(S_SCANNING, &il->status)) { in il4965_bg_run_time_calib_work()
5677 mutex_unlock(&il->mutex); in il4965_bg_run_time_calib_work()
5681 if (il->start_calib) { in il4965_bg_run_time_calib_work()
5682 il4965_chain_noise_calibration(il, (void *)&il->_4965.stats); in il4965_bg_run_time_calib_work()
5683 il4965_sensitivity_calibration(il, (void *)&il->_4965.stats); in il4965_bg_run_time_calib_work()
5686 mutex_unlock(&il->mutex); in il4965_bg_run_time_calib_work()
5692 struct il_priv *il = container_of(data, struct il_priv, restart); in il4965_bg_restart() local
5694 if (test_bit(S_EXIT_PENDING, &il->status)) in il4965_bg_restart()
5697 if (test_and_clear_bit(S_FW_ERROR, &il->status)) { in il4965_bg_restart()
5698 mutex_lock(&il->mutex); in il4965_bg_restart()
5699 il->is_open = 0; in il4965_bg_restart()
5701 __il4965_down(il); in il4965_bg_restart()
5703 mutex_unlock(&il->mutex); in il4965_bg_restart()
5704 il4965_cancel_deferred_work(il); in il4965_bg_restart()
5705 ieee80211_restart_hw(il->hw); in il4965_bg_restart()
5707 il4965_down(il); in il4965_bg_restart()
5709 mutex_lock(&il->mutex); in il4965_bg_restart()
5710 if (test_bit(S_EXIT_PENDING, &il->status)) { in il4965_bg_restart()
5711 mutex_unlock(&il->mutex); in il4965_bg_restart()
5715 __il4965_up(il); in il4965_bg_restart()
5716 mutex_unlock(&il->mutex); in il4965_bg_restart()
5723 struct il_priv *il = container_of(data, struct il_priv, rx_replenish); in il4965_bg_rx_replenish() local
5725 if (test_bit(S_EXIT_PENDING, &il->status)) in il4965_bg_rx_replenish()
5728 mutex_lock(&il->mutex); in il4965_bg_rx_replenish()
5729 il4965_rx_replenish(il); in il4965_bg_rx_replenish()
5730 mutex_unlock(&il->mutex); in il4965_bg_rx_replenish()
5746 il4965_mac_setup_register(struct il_priv *il, u32 max_probe_length) in il4965_mac_setup_register() argument
5749 struct ieee80211_hw *hw = il->hw; in il4965_mac_setup_register()
5761 if (il->cfg->sku & IL_SKU_N) in il4965_mac_setup_register()
5790 if (il->bands[IEEE80211_BAND_2GHZ].n_channels) in il4965_mac_setup_register()
5791 il->hw->wiphy->bands[IEEE80211_BAND_2GHZ] = in il4965_mac_setup_register()
5792 &il->bands[IEEE80211_BAND_2GHZ]; in il4965_mac_setup_register()
5793 if (il->bands[IEEE80211_BAND_5GHZ].n_channels) in il4965_mac_setup_register()
5794 il->hw->wiphy->bands[IEEE80211_BAND_5GHZ] = in il4965_mac_setup_register()
5795 &il->bands[IEEE80211_BAND_5GHZ]; in il4965_mac_setup_register()
5797 il_leds_init(il); in il4965_mac_setup_register()
5799 ret = ieee80211_register_hw(il->hw); in il4965_mac_setup_register()
5804 il->mac80211_registered = 1; in il4965_mac_setup_register()
5812 struct il_priv *il = hw->priv; in il4965_mac_start() local
5818 mutex_lock(&il->mutex); in il4965_mac_start()
5819 ret = __il4965_up(il); in il4965_mac_start()
5820 mutex_unlock(&il->mutex); in il4965_mac_start()
5825 if (il_is_rfkill(il)) in il4965_mac_start()
5832 ret = wait_event_timeout(il->wait_command_queue, in il4965_mac_start()
5833 test_bit(S_READY, &il->status), in il4965_mac_start()
5836 if (!test_bit(S_READY, &il->status)) { in il4965_mac_start()
5843 il4965_led_enable(il); in il4965_mac_start()
5846 il->is_open = 1; in il4965_mac_start()
5854 struct il_priv *il = hw->priv; in il4965_mac_stop() local
5858 if (!il->is_open) in il4965_mac_stop()
5861 il->is_open = 0; in il4965_mac_stop()
5863 il4965_down(il); in il4965_mac_stop()
5865 flush_workqueue(il->workqueue); in il4965_mac_stop()
5869 _il_wr(il, CSR_INT, 0xFFFFFFFF); in il4965_mac_stop()
5870 il_enable_rfkill_int(il); in il4965_mac_stop()
5880 struct il_priv *il = hw->priv; in il4965_mac_tx() local
5887 if (il4965_tx_skb(il, control->sta, skb)) in il4965_mac_tx()
5898 struct il_priv *il = hw->priv; in il4965_mac_update_tkip_key() local
5902 il4965_update_tkip_key(il, keyconf, sta, iv32, phase1key); in il4965_mac_update_tkip_key()
5912 struct il_priv *il = hw->priv; in il4965_mac_set_key() local
5919 if (il->cfg->mod_params->sw_crypto) { in il4965_mac_set_key()
5934 sta_id = il_sta_id_or_broadcast(il, sta); in il4965_mac_set_key()
5938 mutex_lock(&il->mutex); in il4965_mac_set_key()
5939 il_scan_cancel_timeout(il, 100); in il4965_mac_set_key()
5950 is_default_wep_key = !il->_4965.key_mapping_keys; in il4965_mac_set_key()
5959 ret = il4965_set_default_wep_key(il, key); in il4965_mac_set_key()
5961 ret = il4965_set_dynamic_key(il, key, sta_id); in il4965_mac_set_key()
5967 ret = il4965_remove_default_wep_key(il, key); in il4965_mac_set_key()
5969 ret = il4965_remove_dynamic_key(il, key, sta_id); in il4965_mac_set_key()
5977 mutex_unlock(&il->mutex); in il4965_mac_set_key()
5989 struct il_priv *il = hw->priv; in il4965_mac_ampdu_action() local
5994 if (!(il->cfg->sku & IL_SKU_N)) in il4965_mac_ampdu_action()
5997 mutex_lock(&il->mutex); in il4965_mac_ampdu_action()
6002 ret = il4965_sta_rx_agg_start(il, sta, tid, *ssn); in il4965_mac_ampdu_action()
6006 ret = il4965_sta_rx_agg_stop(il, sta, tid); in il4965_mac_ampdu_action()
6007 if (test_bit(S_EXIT_PENDING, &il->status)) in il4965_mac_ampdu_action()
6012 ret = il4965_tx_agg_start(il, vif, sta, tid, ssn); in il4965_mac_ampdu_action()
6018 ret = il4965_tx_agg_stop(il, vif, sta, tid); in il4965_mac_ampdu_action()
6019 if (test_bit(S_EXIT_PENDING, &il->status)) in il4965_mac_ampdu_action()
6026 mutex_unlock(&il->mutex); in il4965_mac_ampdu_action()
6035 struct il_priv *il = hw->priv; in il4965_mac_sta_add() local
6042 mutex_lock(&il->mutex); in il4965_mac_sta_add()
6049 il_add_station_common(il, sta->addr, is_ap, sta, &sta_id); in il4965_mac_sta_add()
6053 mutex_unlock(&il->mutex); in il4965_mac_sta_add()
6061 il4965_rs_rate_init(il, sta, sta_id); in il4965_mac_sta_add()
6062 mutex_unlock(&il->mutex); in il4965_mac_sta_add()
6071 struct il_priv *il = hw->priv; in il4965_mac_channel_switch() local
6075 struct il_ht_config *ht_conf = &il->current_ht_config; in il4965_mac_channel_switch()
6080 mutex_lock(&il->mutex); in il4965_mac_channel_switch()
6082 if (il_is_rfkill(il)) in il4965_mac_channel_switch()
6085 if (test_bit(S_EXIT_PENDING, &il->status) || in il4965_mac_channel_switch()
6086 test_bit(S_SCANNING, &il->status) || in il4965_mac_channel_switch()
6087 test_bit(S_CHANNEL_SWITCH_PENDING, &il->status)) in il4965_mac_channel_switch()
6090 if (!il_is_associated(il)) in il4965_mac_channel_switch()
6093 if (!il->ops->set_channel_switch) in il4965_mac_channel_switch()
6097 if (le16_to_cpu(il->active.channel) == ch) in il4965_mac_channel_switch()
6100 ch_info = il_get_channel_info(il, channel->band, ch); in il4965_mac_channel_switch()
6106 spin_lock_irq(&il->lock); in il4965_mac_channel_switch()
6108 il->current_ht_config.smps = conf->smps_mode; in il4965_mac_channel_switch()
6114 il->ht.is_40mhz = false; in il4965_mac_channel_switch()
6115 il->ht.extension_chan_offset = IEEE80211_HT_PARAM_CHA_SEC_NONE; in il4965_mac_channel_switch()
6118 il->ht.extension_chan_offset = IEEE80211_HT_PARAM_CHA_SEC_BELOW; in il4965_mac_channel_switch()
6119 il->ht.is_40mhz = true; in il4965_mac_channel_switch()
6122 il->ht.extension_chan_offset = IEEE80211_HT_PARAM_CHA_SEC_ABOVE; in il4965_mac_channel_switch()
6123 il->ht.is_40mhz = true; in il4965_mac_channel_switch()
6127 if ((le16_to_cpu(il->staging.channel) != ch)) in il4965_mac_channel_switch()
6128 il->staging.flags = 0; in il4965_mac_channel_switch()
6130 il_set_rxon_channel(il, channel); in il4965_mac_channel_switch()
6131 il_set_rxon_ht(il, ht_conf); in il4965_mac_channel_switch()
6132 il_set_flags_for_band(il, channel->band, il->vif); in il4965_mac_channel_switch()
6134 spin_unlock_irq(&il->lock); in il4965_mac_channel_switch()
6136 il_set_rate(il); in il4965_mac_channel_switch()
6141 set_bit(S_CHANNEL_SWITCH_PENDING, &il->status); in il4965_mac_channel_switch()
6142 il->switch_channel = cpu_to_le16(ch); in il4965_mac_channel_switch()
6143 if (il->ops->set_channel_switch(il, ch_switch)) { in il4965_mac_channel_switch()
6144 clear_bit(S_CHANNEL_SWITCH_PENDING, &il->status); in il4965_mac_channel_switch()
6145 il->switch_channel = 0; in il4965_mac_channel_switch()
6146 ieee80211_chswitch_done(il->vif, false); in il4965_mac_channel_switch()
6150 mutex_unlock(&il->mutex); in il4965_mac_channel_switch()
6158 struct il_priv *il = hw->priv; in il4965_configure_filter() local
6178 mutex_lock(&il->mutex); in il4965_configure_filter()
6180 il->staging.filter_flags &= ~filter_nand; in il4965_configure_filter()
6181 il->staging.filter_flags |= filter_or; in il4965_configure_filter()
6188 mutex_unlock(&il->mutex); in il4965_configure_filter()
6210 struct il_priv *il = container_of(work, struct il_priv, in il4965_bg_txpower_work() local
6213 mutex_lock(&il->mutex); in il4965_bg_txpower_work()
6219 if (test_bit(S_EXIT_PENDING, &il->status) || in il4965_bg_txpower_work()
6220 test_bit(S_SCANNING, &il->status)) in il4965_bg_txpower_work()
6226 il->ops->send_tx_power(il); in il4965_bg_txpower_work()
6230 il->last_temperature = il->temperature; in il4965_bg_txpower_work()
6232 mutex_unlock(&il->mutex); in il4965_bg_txpower_work()
6236 il4965_setup_deferred_work(struct il_priv *il) in il4965_setup_deferred_work() argument
6238 il->workqueue = create_singlethread_workqueue(DRV_NAME); in il4965_setup_deferred_work()
6240 init_waitqueue_head(&il->wait_command_queue); in il4965_setup_deferred_work()
6242 INIT_WORK(&il->restart, il4965_bg_restart); in il4965_setup_deferred_work()
6243 INIT_WORK(&il->rx_replenish, il4965_bg_rx_replenish); in il4965_setup_deferred_work()
6244 INIT_WORK(&il->run_time_calib_work, il4965_bg_run_time_calib_work); in il4965_setup_deferred_work()
6245 INIT_DELAYED_WORK(&il->init_alive_start, il4965_bg_init_alive_start); in il4965_setup_deferred_work()
6246 INIT_DELAYED_WORK(&il->alive_start, il4965_bg_alive_start); in il4965_setup_deferred_work()
6248 il_setup_scan_deferred_work(il); in il4965_setup_deferred_work()
6250 INIT_WORK(&il->txpower_work, il4965_bg_txpower_work); in il4965_setup_deferred_work()
6252 setup_timer(&il->stats_periodic, il4965_bg_stats_periodic, in il4965_setup_deferred_work()
6253 (unsigned long)il); in il4965_setup_deferred_work()
6255 setup_timer(&il->watchdog, il_bg_watchdog, (unsigned long)il); in il4965_setup_deferred_work()
6257 tasklet_init(&il->irq_tasklet, in il4965_setup_deferred_work()
6259 (unsigned long)il); in il4965_setup_deferred_work()
6263 il4965_cancel_deferred_work(struct il_priv *il) in il4965_cancel_deferred_work() argument
6265 cancel_work_sync(&il->txpower_work); in il4965_cancel_deferred_work()
6266 cancel_delayed_work_sync(&il->init_alive_start); in il4965_cancel_deferred_work()
6267 cancel_delayed_work(&il->alive_start); in il4965_cancel_deferred_work()
6268 cancel_work_sync(&il->run_time_calib_work); in il4965_cancel_deferred_work()
6270 il_cancel_scan_deferred_work(il); in il4965_cancel_deferred_work()
6272 del_timer_sync(&il->stats_periodic); in il4965_cancel_deferred_work()
6276 il4965_init_hw_rates(struct il_priv *il, struct ieee80211_rate *rates) in il4965_init_hw_rates() argument
6300 il4965_set_wr_ptrs(struct il_priv *il, int txq_id, u32 idx) in il4965_set_wr_ptrs() argument
6302 il_wr(il, HBUS_TARG_WRPTR, (idx & 0xff) | (txq_id << 8)); in il4965_set_wr_ptrs()
6303 il_wr_prph(il, IL49_SCD_QUEUE_RDPTR(txq_id), idx); in il4965_set_wr_ptrs()
6307 il4965_tx_queue_set_status(struct il_priv *il, struct il_tx_queue *txq, in il4965_tx_queue_set_status() argument
6313 int active = test_bit(txq_id, &il->txq_ctx_active_msk) ? 1 : 0; in il4965_tx_queue_set_status()
6316 il_wr_prph(il, IL49_SCD_QUEUE_STATUS_BITS(txq_id), in il4965_tx_queue_set_status()
6353 il4965_init_drv(struct il_priv *il) in il4965_init_drv() argument
6357 spin_lock_init(&il->sta_lock); in il4965_init_drv()
6358 spin_lock_init(&il->hcmd_lock); in il4965_init_drv()
6360 INIT_LIST_HEAD(&il->free_frames); in il4965_init_drv()
6362 mutex_init(&il->mutex); in il4965_init_drv()
6364 il->ieee_channels = NULL; in il4965_init_drv()
6365 il->ieee_rates = NULL; in il4965_init_drv()
6366 il->band = IEEE80211_BAND_2GHZ; in il4965_init_drv()
6368 il->iw_mode = NL80211_IFTYPE_STATION; in il4965_init_drv()
6369 il->current_ht_config.smps = IEEE80211_SMPS_STATIC; in il4965_init_drv()
6370 il->missed_beacon_threshold = IL_MISSED_BEACON_THRESHOLD_DEF; in il4965_init_drv()
6373 il->force_reset.reset_duration = IL_DELAY_NEXT_FORCE_FW_RELOAD; in il4965_init_drv()
6376 if (il->ops->set_rxon_chain) in il4965_init_drv()
6377 il->ops->set_rxon_chain(il); in il4965_init_drv()
6379 il_init_scan_params(il); in il4965_init_drv()
6381 ret = il_init_channel_map(il); in il4965_init_drv()
6387 ret = il_init_geos(il); in il4965_init_drv()
6392 il4965_init_hw_rates(il, il->ieee_rates); in il4965_init_drv()
6397 il_free_channel_map(il); in il4965_init_drv()
6403 il4965_uninit_drv(struct il_priv *il) in il4965_uninit_drv() argument
6405 il_free_geos(il); in il4965_uninit_drv()
6406 il_free_channel_map(il); in il4965_uninit_drv()
6407 kfree(il->scan_cmd); in il4965_uninit_drv()
6411 il4965_hw_detect(struct il_priv *il) in il4965_hw_detect() argument
6413 il->hw_rev = _il_rd(il, CSR_HW_REV); in il4965_hw_detect()
6414 il->hw_wa_rev = _il_rd(il, CSR_HW_REV_WA_REG); in il4965_hw_detect()
6415 il->rev_id = il->pci_dev->revision; in il4965_hw_detect()
6416 D_INFO("HW Revision ID = 0x%X\n", il->rev_id); in il4965_hw_detect()
6447 il4965_set_hw_params(struct il_priv *il) in il4965_set_hw_params() argument
6449 il->hw_params.bcast_id = IL4965_BROADCAST_ID; in il4965_set_hw_params()
6450 il->hw_params.max_rxq_size = RX_QUEUE_SIZE; in il4965_set_hw_params()
6451 il->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG; in il4965_set_hw_params()
6452 if (il->cfg->mod_params->amsdu_size_8K) in il4965_set_hw_params()
6453 il->hw_params.rx_page_order = get_order(IL_RX_BUF_SIZE_8K); in il4965_set_hw_params()
6455 il->hw_params.rx_page_order = get_order(IL_RX_BUF_SIZE_4K); in il4965_set_hw_params()
6457 il->hw_params.max_beacon_itrvl = IL_MAX_UCODE_BEACON_INTERVAL; in il4965_set_hw_params()
6459 if (il->cfg->mod_params->disable_11n) in il4965_set_hw_params()
6460 il->cfg->sku &= ~IL_SKU_N; in il4965_set_hw_params()
6462 if (il->cfg->mod_params->num_of_queues >= IL_MIN_NUM_QUEUES && in il4965_set_hw_params()
6463 il->cfg->mod_params->num_of_queues <= IL49_NUM_QUEUES) in il4965_set_hw_params()
6464 il->cfg->num_of_queues = in il4965_set_hw_params()
6465 il->cfg->mod_params->num_of_queues; in il4965_set_hw_params()
6467 il->hw_params.max_txq_num = il->cfg->num_of_queues; in il4965_set_hw_params()
6468 il->hw_params.dma_chnl_num = FH49_TCSR_CHNL_NUM; in il4965_set_hw_params()
6469 il->hw_params.scd_bc_tbls_size = in il4965_set_hw_params()
6470 il->cfg->num_of_queues * in il4965_set_hw_params()
6473 il->hw_params.tfd_size = sizeof(struct il_tfd); in il4965_set_hw_params()
6474 il->hw_params.max_stations = IL4965_STATION_COUNT; in il4965_set_hw_params()
6475 il->hw_params.max_data_size = IL49_RTC_DATA_SIZE; in il4965_set_hw_params()
6476 il->hw_params.max_inst_size = IL49_RTC_INST_SIZE; in il4965_set_hw_params()
6477 il->hw_params.max_bsm_size = BSM_SRAM_SIZE; in il4965_set_hw_params()
6478 il->hw_params.ht40_channel = BIT(IEEE80211_BAND_5GHZ); in il4965_set_hw_params()
6480 il->hw_params.rx_wrt_ptr_reg = FH49_RSCSR_CHNL0_WPTR; in il4965_set_hw_params()
6482 il->hw_params.tx_chains_num = il4965_num_of_ant(il->cfg->valid_tx_ant); in il4965_set_hw_params()
6483 il->hw_params.rx_chains_num = il4965_num_of_ant(il->cfg->valid_rx_ant); in il4965_set_hw_params()
6484 il->hw_params.valid_tx_ant = il->cfg->valid_tx_ant; in il4965_set_hw_params()
6485 il->hw_params.valid_rx_ant = il->cfg->valid_rx_ant; in il4965_set_hw_params()
6487 il->hw_params.ct_kill_threshold = in il4965_set_hw_params()
6490 il->hw_params.sens = &il4965_sensitivity; in il4965_set_hw_params()
6491 il->hw_params.beacon_time_tsf_bits = IL4965_EXT_BEACON_TIME_POS; in il4965_set_hw_params()
6498 struct il_priv *il; in il4965_pci_probe() local
6513 il = hw->priv; in il4965_pci_probe()
6514 il->hw = hw; in il4965_pci_probe()
6518 il->cfg = cfg; in il4965_pci_probe()
6519 il->ops = &il4965_ops; in il4965_pci_probe()
6521 il->debugfs_ops = &il4965_debugfs_ops; in il4965_pci_probe()
6523 il->pci_dev = pdev; in il4965_pci_probe()
6524 il->inta_mask = CSR_INI_SET_MASK; in il4965_pci_probe()
6559 pci_set_drvdata(pdev, il); in il4965_pci_probe()
6564 il->hw_base = pci_ioremap_bar(pdev, 0); in il4965_pci_probe()
6565 if (!il->hw_base) { in il4965_pci_probe()
6572 D_INFO("pci_resource_base = %p\n", il->hw_base); in il4965_pci_probe()
6577 spin_lock_init(&il->reg_lock); in il4965_pci_probe()
6578 spin_lock_init(&il->lock); in il4965_pci_probe()
6585 _il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET); in il4965_pci_probe()
6587 il4965_hw_detect(il); in il4965_pci_probe()
6588 IL_INFO("Detected %s, REV=0x%X\n", il->cfg->name, il->hw_rev); in il4965_pci_probe()
6594 il4965_prepare_card_hw(il); in il4965_pci_probe()
6595 if (!il->hw_ready) { in il4965_pci_probe()
6605 err = il_eeprom_init(il); in il4965_pci_probe()
6610 err = il4965_eeprom_check_version(il); in il4965_pci_probe()
6615 il4965_eeprom_get_mac(il, il->addresses[0].addr); in il4965_pci_probe()
6616 D_INFO("MAC address: %pM\n", il->addresses[0].addr); in il4965_pci_probe()
6617 il->hw->wiphy->addresses = il->addresses; in il4965_pci_probe()
6618 il->hw->wiphy->n_addresses = 1; in il4965_pci_probe()
6623 il4965_set_hw_params(il); in il4965_pci_probe()
6629 err = il4965_init_drv(il); in il4965_pci_probe()
6637 spin_lock_irqsave(&il->lock, flags); in il4965_pci_probe()
6638 il_disable_interrupts(il); in il4965_pci_probe()
6639 spin_unlock_irqrestore(&il->lock, flags); in il4965_pci_probe()
6641 pci_enable_msi(il->pci_dev); in il4965_pci_probe()
6643 err = request_irq(il->pci_dev->irq, il_isr, IRQF_SHARED, DRV_NAME, il); in il4965_pci_probe()
6645 IL_ERR("Error allocating IRQ %d\n", il->pci_dev->irq); in il4965_pci_probe()
6649 il4965_setup_deferred_work(il); in il4965_pci_probe()
6650 il4965_setup_handlers(il); in il4965_pci_probe()
6657 pci_read_config_word(il->pci_dev, PCI_COMMAND, &pci_cmd); in il4965_pci_probe()
6660 pci_write_config_word(il->pci_dev, PCI_COMMAND, pci_cmd); in il4965_pci_probe()
6663 il_enable_rfkill_int(il); in il4965_pci_probe()
6666 if (_il_rd(il, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW) in il4965_pci_probe()
6667 clear_bit(S_RFKILL, &il->status); in il4965_pci_probe()
6669 set_bit(S_RFKILL, &il->status); in il4965_pci_probe()
6671 wiphy_rfkill_set_hw_state(il->hw->wiphy, in il4965_pci_probe()
6672 test_bit(S_RFKILL, &il->status)); in il4965_pci_probe()
6674 il_power_initialize(il); in il4965_pci_probe()
6676 init_completion(&il->_4965.firmware_loading_complete); in il4965_pci_probe()
6678 err = il4965_request_firmware(il, true); in il4965_pci_probe()
6685 destroy_workqueue(il->workqueue); in il4965_pci_probe()
6686 il->workqueue = NULL; in il4965_pci_probe()
6687 free_irq(il->pci_dev->irq, il); in il4965_pci_probe()
6689 pci_disable_msi(il->pci_dev); in il4965_pci_probe()
6690 il4965_uninit_drv(il); in il4965_pci_probe()
6692 il_eeprom_free(il); in il4965_pci_probe()
6694 iounmap(il->hw_base); in il4965_pci_probe()
6700 ieee80211_free_hw(il->hw); in il4965_pci_probe()
6708 struct il_priv *il = pci_get_drvdata(pdev); in il4965_pci_remove() local
6711 if (!il) in il4965_pci_remove()
6714 wait_for_completion(&il->_4965.firmware_loading_complete); in il4965_pci_remove()
6718 il_dbgfs_unregister(il); in il4965_pci_remove()
6725 set_bit(S_EXIT_PENDING, &il->status); in il4965_pci_remove()
6727 il_leds_exit(il); in il4965_pci_remove()
6729 if (il->mac80211_registered) { in il4965_pci_remove()
6730 ieee80211_unregister_hw(il->hw); in il4965_pci_remove()
6731 il->mac80211_registered = 0; in il4965_pci_remove()
6733 il4965_down(il); in il4965_pci_remove()
6743 il_apm_stop(il); in il4965_pci_remove()
6748 spin_lock_irqsave(&il->lock, flags); in il4965_pci_remove()
6749 il_disable_interrupts(il); in il4965_pci_remove()
6750 spin_unlock_irqrestore(&il->lock, flags); in il4965_pci_remove()
6752 il4965_synchronize_irq(il); in il4965_pci_remove()
6754 il4965_dealloc_ucode_pci(il); in il4965_pci_remove()
6756 if (il->rxq.bd) in il4965_pci_remove()
6757 il4965_rx_queue_free(il, &il->rxq); in il4965_pci_remove()
6758 il4965_hw_txq_ctx_free(il); in il4965_pci_remove()
6760 il_eeprom_free(il); in il4965_pci_remove()
6763 flush_workqueue(il->workqueue); in il4965_pci_remove()
6768 destroy_workqueue(il->workqueue); in il4965_pci_remove()
6769 il->workqueue = NULL; in il4965_pci_remove()
6771 free_irq(il->pci_dev->irq, il); in il4965_pci_remove()
6772 pci_disable_msi(il->pci_dev); in il4965_pci_remove()
6773 iounmap(il->hw_base); in il4965_pci_remove()
6777 il4965_uninit_drv(il); in il4965_pci_remove()
6779 dev_kfree_skb(il->beacon_skb); in il4965_pci_remove()
6781 ieee80211_free_hw(il->hw); in il4965_pci_remove()
6789 il4965_txq_set_sched(struct il_priv *il, u32 mask) in il4965_txq_set_sched() argument
6791 il_wr_prph(il, IL49_SCD_TXFACT, mask); in il4965_txq_set_sched()