Lines Matching refs:il
46 il3945_send_led_cmd(struct il_priv *il, struct il_led_cmd *led_cmd) in il3945_send_led_cmd() argument
56 return il_send_cmd(il, &cmd); in il3945_send_led_cmd()
118 il3945_disable_events(struct il_priv *il) in il3945_disable_events() argument
174 base = le32_to_cpu(il->card_alive.log_event_table_ptr); in il3945_disable_events()
180 disable_ptr = il_read_targ_mem(il, base + (4 * sizeof(u32))); in il3945_disable_events()
181 array_size = il_read_targ_mem(il, base + (5 * sizeof(u32))); in il3945_disable_events()
187 il_write_targ_mem(il, disable_ptr + (i * sizeof(u32)), in il3945_disable_events()
253 il3945_rs_next_rate(struct il_priv *il, int rate) in il3945_rs_next_rate() argument
257 switch (il->band) { in il3945_rs_next_rate()
265 if (!(il->_3945.sta_supp_rates & IL_OFDM_RATES_MASK) && in il3945_rs_next_rate()
266 il_is_associated(il)) { in il3945_rs_next_rate()
287 il3945_tx_queue_reclaim(struct il_priv *il, int txq_id, int idx) in il3945_tx_queue_reclaim() argument
289 struct il_tx_queue *txq = &il->txq[txq_id]; in il3945_tx_queue_reclaim()
299 ieee80211_tx_status_irqsafe(il->hw, skb); in il3945_tx_queue_reclaim()
301 il->ops->txq_free_tfd(il, txq); in il3945_tx_queue_reclaim()
305 txq_id != IL39_CMD_QUEUE_NUM && il->mac80211_registered) in il3945_tx_queue_reclaim()
306 il_wake_queue(il, txq); in il3945_tx_queue_reclaim()
313 il3945_hdl_tx(struct il_priv *il, struct il_rx_buf *rxb) in il3945_hdl_tx() argument
319 struct il_tx_queue *txq = &il->txq[txq_id]; in il3945_hdl_tx()
341 il->iw_mode == NL80211_IFTYPE_STATION) { in il3945_hdl_tx()
342 il_stop_queues_by_reason(il, IL_STOP_REASON_PASSIVE); in il3945_hdl_tx()
370 il3945_tx_queue_reclaim(il, txq_id, idx); in il3945_hdl_tx()
385 il3945_accumulative_stats(struct il_priv *il, __le32 * stats) in il3945_accumulative_stats() argument
392 prev_stats = (__le32 *) &il->_3945.stats; in il3945_accumulative_stats()
393 accum_stats = (u32 *) &il->_3945.accum_stats; in il3945_accumulative_stats()
394 delta = (u32 *) &il->_3945.delta_stats; in il3945_accumulative_stats()
395 max_delta = (u32 *) &il->_3945.max_delta; in il3945_accumulative_stats()
411 il->_3945.accum_stats.general.temperature = in il3945_accumulative_stats()
412 il->_3945.stats.general.temperature; in il3945_accumulative_stats()
413 il->_3945.accum_stats.general.ttl_timestamp = in il3945_accumulative_stats()
414 il->_3945.stats.general.ttl_timestamp; in il3945_accumulative_stats()
419 il3945_hdl_stats(struct il_priv *il, struct il_rx_buf *rxb) in il3945_hdl_stats() argument
427 il3945_accumulative_stats(il, (__le32 *) &pkt->u.raw); in il3945_hdl_stats()
430 memcpy(&il->_3945.stats, pkt->u.raw, sizeof(il->_3945.stats)); in il3945_hdl_stats()
434 il3945_hdl_c_stats(struct il_priv *il, struct il_rx_buf *rxb) in il3945_hdl_c_stats() argument
441 memset(&il->_3945.accum_stats, 0, in il3945_hdl_c_stats()
443 memset(&il->_3945.delta_stats, 0, in il3945_hdl_c_stats()
445 memset(&il->_3945.max_delta, 0, in il3945_hdl_c_stats()
450 il3945_hdl_stats(il, rxb); in il3945_hdl_c_stats()
461 il3945_is_network_packet(struct il_priv *il, struct ieee80211_hdr *header) in il3945_is_network_packet() argument
465 switch (il->iw_mode) { in il3945_is_network_packet()
468 return ether_addr_equal_64bits(header->addr3, il->bssid); in il3945_is_network_packet()
471 return ether_addr_equal_64bits(header->addr2, il->bssid); in il3945_is_network_packet()
480 il3945_pass_packet_to_mac80211(struct il_priv *il, struct il_rx_buf *rxb, in il3945_pass_packet_to_mac80211() argument
490 u32 fraglen = PAGE_SIZE << il->hw_params.rx_page_order; in il3945_pass_packet_to_mac80211()
499 if (unlikely(!il->is_open)) { in il3945_pass_packet_to_mac80211()
504 if (unlikely(test_bit(IL_STOP_REASON_PASSIVE, &il->stop_reason))) { in il3945_pass_packet_to_mac80211()
505 il_wake_queues_by_reason(il, IL_STOP_REASON_PASSIVE); in il3945_pass_packet_to_mac80211()
516 il_set_decrypted_flag(il, (struct ieee80211_hdr *)pkt, in il3945_pass_packet_to_mac80211()
528 il->alloc_rxb_page--; in il3945_pass_packet_to_mac80211()
531 il_update_stats(il, false, fc, len); in il3945_pass_packet_to_mac80211()
534 ieee80211_rx(il->hw, skb); in il3945_pass_packet_to_mac80211()
540 il3945_hdl_rx(struct il_priv *il, struct il_rx_buf *rxb) in il3945_hdl_rx() argument
595 network_packet = il3945_is_network_packet(il, header); in il3945_hdl_rx()
602 il->_3945.last_beacon_time = in il3945_hdl_rx()
604 il->_3945.last_tsf = le64_to_cpu(rx_end->timestamp); in il3945_hdl_rx()
605 il->_3945.last_rx_rssi = rx_status.signal; in il3945_hdl_rx()
608 il3945_pass_packet_to_mac80211(il, rxb, &rx_status); in il3945_hdl_rx()
612 il3945_hw_txq_attach_buf_to_tfd(struct il_priv *il, struct il_tx_queue *txq, in il3945_hw_txq_attach_buf_to_tfd() argument
651 il3945_hw_txq_free_tfd(struct il_priv *il, struct il_tx_queue *txq) in il3945_hw_txq_free_tfd() argument
656 struct pci_dev *dev = il->pci_dev; in il3945_hw_txq_free_tfd()
698 il3945_hw_build_tx_cmd_rate(struct il_priv *il, struct il_device_cmd *cmd, in il3945_hw_build_tx_cmd_rate() argument
702 u16 hw_value = ieee80211_get_tx_rate(il->hw, info)->hw_value; in il3945_hw_build_tx_cmd_rate()
745 il3945_sync_sta(struct il_priv *il, int sta_id, u16 tx_rate) in il3945_sync_sta() argument
753 spin_lock_irqsave(&il->sta_lock, flags_spin); in il3945_sync_sta()
754 station = &il->stations[sta_id]; in il3945_sync_sta()
759 il_send_add_sta(il, &station->sta, CMD_ASYNC); in il3945_sync_sta()
760 spin_unlock_irqrestore(&il->sta_lock, flags_spin); in il3945_sync_sta()
767 il3945_set_pwr_vmain(struct il_priv *il) in il3945_set_pwr_vmain() argument
784 il_set_bits_mask_prph(il, APMG_PS_CTRL_REG, in il3945_set_pwr_vmain()
788 _il_poll_bit(il, CSR_GPIO_IN, CSR_GPIO_IN_VAL_VMAIN_PWR_SRC, in il3945_set_pwr_vmain()
793 il3945_rx_init(struct il_priv *il, struct il_rx_queue *rxq) in il3945_rx_init() argument
795 il_wr(il, FH39_RCSR_RBD_BASE(0), rxq->bd_dma); in il3945_rx_init()
796 il_wr(il, FH39_RCSR_RPTR_ADDR(0), rxq->rb_stts_dma); in il3945_rx_init()
797 il_wr(il, FH39_RCSR_WPTR(0), 0); in il3945_rx_init()
798 il_wr(il, FH39_RCSR_CONFIG(0), in il3945_rx_init()
810 il_rd(il, FH39_RSSR_CTRL); in il3945_rx_init()
816 il3945_tx_reset(struct il_priv *il) in il3945_tx_reset() argument
819 il_wr_prph(il, ALM_SCD_MODE_REG, 0x2); in il3945_tx_reset()
822 il_wr_prph(il, ALM_SCD_ARASTAT_REG, 0x01); in il3945_tx_reset()
825 il_wr_prph(il, ALM_SCD_TXFACT_REG, 0x3f); in il3945_tx_reset()
827 il_wr_prph(il, ALM_SCD_SBYP_MODE_1_REG, 0x010000); in il3945_tx_reset()
828 il_wr_prph(il, ALM_SCD_SBYP_MODE_2_REG, 0x030002); in il3945_tx_reset()
829 il_wr_prph(il, ALM_SCD_TXF4MF_REG, 0x000004); in il3945_tx_reset()
830 il_wr_prph(il, ALM_SCD_TXF5MF_REG, 0x000005); in il3945_tx_reset()
832 il_wr(il, FH39_TSSR_CBB_BASE, il->_3945.shared_phys); in il3945_tx_reset()
834 il_wr(il, FH39_TSSR_MSG_CONFIG, in il3945_tx_reset()
852 il3945_txq_ctx_reset(struct il_priv *il) in il3945_txq_ctx_reset() argument
856 il3945_hw_txq_ctx_free(il); in il3945_txq_ctx_reset()
859 rc = il_alloc_txq_mem(il); in il3945_txq_ctx_reset()
864 rc = il3945_tx_reset(il); in il3945_txq_ctx_reset()
869 for (txq_id = 0; txq_id < il->hw_params.max_txq_num; txq_id++) { in il3945_txq_ctx_reset()
870 rc = il_tx_queue_init(il, txq_id); in il3945_txq_ctx_reset()
880 il3945_hw_txq_ctx_free(il); in il3945_txq_ctx_reset()
890 il3945_apm_init(struct il_priv *il) in il3945_apm_init() argument
892 int ret = il_apm_init(il); in il3945_apm_init()
895 il_wr_prph(il, APMG_RTC_INT_MSK_REG, 0x0); in il3945_apm_init()
896 il_wr_prph(il, APMG_RTC_INT_STT_REG, 0xFFFFFFFF); in il3945_apm_init()
899 il_set_bits_prph(il, APMG_PS_CTRL_REG, APMG_PS_CTRL_VAL_RESET_REQ); in il3945_apm_init()
901 il_clear_bits_prph(il, APMG_PS_CTRL_REG, APMG_PS_CTRL_VAL_RESET_REQ); in il3945_apm_init()
907 il3945_nic_config(struct il_priv *il) in il3945_nic_config() argument
909 struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom; in il3945_nic_config()
911 u8 rev_id = il->pci_dev->revision; in il3945_nic_config()
913 spin_lock_irqsave(&il->lock, flags); in il3945_nic_config()
922 il_set_bit(il, CSR_HW_IF_CONFIG_REG, in il3945_nic_config()
926 il_set_bit(il, CSR_HW_IF_CONFIG_REG, in il3945_nic_config()
932 il_set_bit(il, CSR_HW_IF_CONFIG_REG, in il3945_nic_config()
939 il_set_bit(il, CSR_HW_IF_CONFIG_REG, in il3945_nic_config()
943 il_clear_bit(il, CSR_HW_IF_CONFIG_REG, in il3945_nic_config()
948 il_set_bit(il, CSR_HW_IF_CONFIG_REG, in il3945_nic_config()
955 il_set_bit(il, CSR_HW_IF_CONFIG_REG, in il3945_nic_config()
958 spin_unlock_irqrestore(&il->lock, flags); in il3945_nic_config()
968 il3945_hw_nic_init(struct il_priv *il) in il3945_hw_nic_init() argument
972 struct il_rx_queue *rxq = &il->rxq; in il3945_hw_nic_init()
974 spin_lock_irqsave(&il->lock, flags); in il3945_hw_nic_init()
975 il3945_apm_init(il); in il3945_hw_nic_init()
976 spin_unlock_irqrestore(&il->lock, flags); in il3945_hw_nic_init()
978 il3945_set_pwr_vmain(il); in il3945_hw_nic_init()
979 il3945_nic_config(il); in il3945_hw_nic_init()
983 rc = il_rx_queue_alloc(il); in il3945_hw_nic_init()
989 il3945_rx_queue_reset(il, rxq); in il3945_hw_nic_init()
991 il3945_rx_replenish(il); in il3945_hw_nic_init()
993 il3945_rx_init(il, rxq); in il3945_hw_nic_init()
1000 il_wr(il, FH39_RCSR_WPTR(0), rxq->write & ~7); in il3945_hw_nic_init()
1002 rc = il3945_txq_ctx_reset(il); in il3945_hw_nic_init()
1006 set_bit(S_INIT, &il->status); in il3945_hw_nic_init()
1017 il3945_hw_txq_ctx_free(struct il_priv *il) in il3945_hw_txq_ctx_free() argument
1022 if (il->txq) in il3945_hw_txq_ctx_free()
1023 for (txq_id = 0; txq_id < il->hw_params.max_txq_num; txq_id++) in il3945_hw_txq_ctx_free()
1025 il_cmd_queue_free(il); in il3945_hw_txq_ctx_free()
1027 il_tx_queue_free(il, txq_id); in il3945_hw_txq_ctx_free()
1030 il_free_txq_mem(il); in il3945_hw_txq_ctx_free()
1034 il3945_hw_txq_ctx_stop(struct il_priv *il) in il3945_hw_txq_ctx_stop() argument
1039 _il_wr_prph(il, ALM_SCD_MODE_REG, 0); in il3945_hw_txq_ctx_stop()
1040 _il_wr_prph(il, ALM_SCD_TXFACT_REG, 0); in il3945_hw_txq_ctx_stop()
1043 for (txq_id = 0; txq_id < il->hw_params.max_txq_num; txq_id++) { in il3945_hw_txq_ctx_stop()
1044 _il_wr(il, FH39_TCSR_CONFIG(txq_id), 0x0); in il3945_hw_txq_ctx_stop()
1045 _il_poll_bit(il, FH39_TSSR_TX_STATUS, in il3945_hw_txq_ctx_stop()
1072 il3945_hw_get_temperature(struct il_priv *il) in il3945_hw_get_temperature() argument
1074 return _il_rd(il, CSR_UCODE_DRV_GP2); in il3945_hw_get_temperature()
1082 il3945_hw_reg_txpower_get_temperature(struct il_priv *il) in il3945_hw_reg_txpower_get_temperature() argument
1084 struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom; in il3945_hw_reg_txpower_get_temperature()
1087 temperature = il3945_hw_get_temperature(il); in il3945_hw_reg_txpower_get_temperature()
1099 if (il->last_temperature > 100) in il3945_hw_reg_txpower_get_temperature()
1102 temperature = il->last_temperature; in il3945_hw_reg_txpower_get_temperature()
1120 il3945_is_temp_calib_needed(struct il_priv *il) in il3945_is_temp_calib_needed() argument
1124 il->temperature = il3945_hw_reg_txpower_get_temperature(il); in il3945_is_temp_calib_needed()
1125 temp_diff = il->temperature - il->last_temperature; in il3945_is_temp_calib_needed()
1146 il->last_temperature = il->temperature; in il3945_is_temp_calib_needed()
1339 il3945_hw_reg_set_scan_power(struct il_priv *il, u32 scan_tbl_idx, s32 rate_idx, in il3945_hw_reg_set_scan_power() argument
1354 power = min(power, il->tx_power_user_lmt); in il3945_hw_reg_set_scan_power()
1396 il3945_send_tx_power(struct il_priv *il) in il3945_send_tx_power() argument
1401 .channel = il->active.channel, in il3945_send_tx_power()
1406 (test_bit(S_SCAN_HW, &il->status), in il3945_send_tx_power()
1410 chan = le16_to_cpu(il->active.channel); in il3945_send_tx_power()
1412 txpower.band = (il->band == IEEE80211_BAND_5GHZ) ? 0 : 1; in il3945_send_tx_power()
1413 ch_info = il_get_channel_info(il, il->band, chan); in il3945_send_tx_power()
1416 il->band); in il3945_send_tx_power()
1450 return il_send_cmd_pdu(il, C_TX_PWR_TBL, in il3945_send_tx_power()
1473 il3945_hw_reg_set_new_power(struct il_priv *il, struct il_channel_info *ch_info) in il3945_hw_reg_set_new_power() argument
1482 clip_pwrs = il->_3945.clip_groups[ch_info->group_idx].clip_powers; in il3945_hw_reg_set_new_power()
1565 il3945_hw_reg_comp_txpower_temp(struct il_priv *il) in il3945_hw_reg_comp_txpower_temp() argument
1568 struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom; in il3945_hw_reg_comp_txpower_temp()
1576 int temperature = il->temperature; in il3945_hw_reg_comp_txpower_temp()
1578 if (il->disable_tx_power_cal || test_bit(S_SCANNING, &il->status)) { in il3945_hw_reg_comp_txpower_temp()
1583 for (i = 0; i < il->channel_count; i++) { in il3945_hw_reg_comp_txpower_temp()
1584 ch_info = &il->channel_info[i]; in il3945_hw_reg_comp_txpower_temp()
1613 il->_3945.clip_groups[ch_info->group_idx].clip_powers; in il3945_hw_reg_comp_txpower_temp()
1621 il3945_hw_reg_set_scan_power(il, scan_tbl_idx, in il3945_hw_reg_comp_txpower_temp()
1628 return il->ops->send_tx_power(il); in il3945_hw_reg_comp_txpower_temp()
1632 il3945_hw_reg_set_txpower(struct il_priv *il, s8 power) in il3945_hw_reg_set_txpower() argument
1639 if (il->tx_power_user_lmt == power) { in il3945_hw_reg_set_txpower()
1646 il->tx_power_user_lmt = power; in il3945_hw_reg_set_txpower()
1650 for (i = 0; i < il->channel_count; i++) { in il3945_hw_reg_set_txpower()
1651 ch_info = &il->channel_info[i]; in il3945_hw_reg_set_txpower()
1662 il3945_hw_reg_set_new_power(il, ch_info); in il3945_hw_reg_set_txpower()
1668 il3945_is_temp_calib_needed(il); in il3945_hw_reg_set_txpower()
1669 il3945_hw_reg_comp_txpower_temp(il); in il3945_hw_reg_set_txpower()
1675 il3945_send_rxon_assoc(struct il_priv *il) in il3945_send_rxon_assoc() argument
1686 const struct il_rxon_cmd *rxon1 = &il->staging; in il3945_send_rxon_assoc()
1687 const struct il_rxon_cmd *rxon2 = &il->active; in il3945_send_rxon_assoc()
1697 rxon_assoc.flags = il->staging.flags; in il3945_send_rxon_assoc()
1698 rxon_assoc.filter_flags = il->staging.filter_flags; in il3945_send_rxon_assoc()
1699 rxon_assoc.ofdm_basic_rates = il->staging.ofdm_basic_rates; in il3945_send_rxon_assoc()
1700 rxon_assoc.cck_basic_rates = il->staging.cck_basic_rates; in il3945_send_rxon_assoc()
1703 rc = il_send_cmd_sync(il, &cmd); in il3945_send_rxon_assoc()
1713 il_free_pages(il, cmd.reply_page); in il3945_send_rxon_assoc()
1727 il3945_commit_rxon(struct il_priv *il) in il3945_commit_rxon() argument
1730 struct il3945_rxon_cmd *active_rxon = (void *)&il->active; in il3945_commit_rxon()
1731 struct il3945_rxon_cmd *staging_rxon = (void *)&il->staging; in il3945_commit_rxon()
1735 if (test_bit(S_EXIT_PENDING, &il->status)) in il3945_commit_rxon()
1738 if (!il_is_alive(il)) in il3945_commit_rxon()
1746 staging_rxon->flags |= il3945_get_antenna_flags(il); in il3945_commit_rxon()
1748 rc = il_check_rxon_cmd(il); in il3945_commit_rxon()
1757 if (!il_full_rxon_required(il)) { in il3945_commit_rxon()
1758 rc = il_send_rxon_assoc(il); in il3945_commit_rxon()
1770 il_set_tx_power(il, il->tx_power_next, false); in il3945_commit_rxon()
1778 if (il_is_associated(il) && new_assoc) { in il3945_commit_rxon()
1788 rc = il_send_cmd_pdu(il, C_RXON, sizeof(struct il3945_rxon_cmd), in il3945_commit_rxon()
1789 &il->active); in il3945_commit_rxon()
1799 il_clear_ucode_stations(il); in il3945_commit_rxon()
1800 il_restore_stations(il); in il3945_commit_rxon()
1814 il_set_rxon_hwcrypto(il, !il3945_mod_params.sw_crypto); in il3945_commit_rxon()
1817 rc = il_send_cmd_pdu(il, C_RXON, sizeof(struct il3945_rxon_cmd), in il3945_commit_rxon()
1827 il_clear_ucode_stations(il); in il3945_commit_rxon()
1828 il_restore_stations(il); in il3945_commit_rxon()
1833 rc = il_set_tx_power(il, il->tx_power_next, true); in il3945_commit_rxon()
1840 rc = il3945_init_hw_rate_table(il); in il3945_commit_rxon()
1860 il3945_reg_txpower_periodic(struct il_priv *il) in il3945_reg_txpower_periodic() argument
1864 if (!il3945_is_temp_calib_needed(il)) in il3945_reg_txpower_periodic()
1870 il3945_hw_reg_comp_txpower_temp(il); in il3945_reg_txpower_periodic()
1873 queue_delayed_work(il->workqueue, &il->_3945.thermal_periodic, in il3945_reg_txpower_periodic()
1880 struct il_priv *il = container_of(work, struct il_priv, in il3945_bg_reg_txpower_periodic() local
1883 mutex_lock(&il->mutex); in il3945_bg_reg_txpower_periodic()
1884 if (test_bit(S_EXIT_PENDING, &il->status) || il->txq == NULL) in il3945_bg_reg_txpower_periodic()
1887 il3945_reg_txpower_periodic(il); in il3945_bg_reg_txpower_periodic()
1889 mutex_unlock(&il->mutex); in il3945_bg_reg_txpower_periodic()
1903 il3945_hw_reg_get_ch_grp_idx(struct il_priv *il, in il3945_hw_reg_get_ch_grp_idx() argument
1906 struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom; in il3945_hw_reg_get_ch_grp_idx()
1938 il3945_hw_reg_get_matched_power_idx(struct il_priv *il, s8 requested_power, in il3945_hw_reg_get_matched_power_idx() argument
1942 struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom; in il3945_hw_reg_get_matched_power_idx()
1988 il3945_hw_reg_init_channel_groups(struct il_priv *il) in il3945_hw_reg_init_channel_groups() argument
1992 struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom; in il3945_hw_reg_init_channel_groups()
2019 clip_pwrs = (s8 *) il->_3945.clip_groups[i].clip_powers; in il3945_hw_reg_init_channel_groups()
2070 il3945_txpower_set_from_eeprom(struct il_priv *il) in il3945_txpower_set_from_eeprom() argument
2074 struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom; in il3945_txpower_set_from_eeprom()
2087 temperature = il3945_hw_reg_txpower_get_temperature(il); in il3945_txpower_set_from_eeprom()
2088 il->last_temperature = temperature; in il3945_txpower_set_from_eeprom()
2090 il3945_hw_reg_init_channel_groups(il); in il3945_txpower_set_from_eeprom()
2093 for (i = 0, ch_info = il->channel_info; i < il->channel_count; in il3945_txpower_set_from_eeprom()
2100 ch_info->group_idx = il3945_hw_reg_get_ch_grp_idx(il, ch_info); in il3945_txpower_set_from_eeprom()
2104 il->_3945.clip_groups[ch_info->group_idx].clip_powers; in il3945_txpower_set_from_eeprom()
2131 rc = il3945_hw_reg_get_matched_power_idx(il, pwr, in il3945_txpower_set_from_eeprom()
2187 il3945_hw_reg_set_scan_power(il, scan_tbl_idx, in il3945_txpower_set_from_eeprom()
2197 il3945_hw_rxq_stop(struct il_priv *il) in il3945_hw_rxq_stop() argument
2201 _il_wr(il, FH39_RCSR_CONFIG(0), 0); in il3945_hw_rxq_stop()
2202 ret = _il_poll_bit(il, FH39_RSSR_STATUS, in il3945_hw_rxq_stop()
2213 il3945_hw_tx_queue_init(struct il_priv *il, struct il_tx_queue *txq) in il3945_hw_tx_queue_init() argument
2217 struct il3945_shared *shared_data = il->_3945.shared_virt; in il3945_hw_tx_queue_init()
2221 il_wr(il, FH39_CBCC_CTRL(txq_id), 0); in il3945_hw_tx_queue_init()
2222 il_wr(il, FH39_CBCC_BASE(txq_id), 0); in il3945_hw_tx_queue_init()
2224 il_wr(il, FH39_TCSR_CONFIG(txq_id), in il3945_hw_tx_queue_init()
2232 _il_rd(il, FH39_TSSR_CBB_BASE); in il3945_hw_tx_queue_init()
2272 il3945_add_bssid_station(struct il_priv *il, const u8 * addr, u8 * sta_id_r) in il3945_add_bssid_station() argument
2281 ret = il_add_station_common(il, addr, 0, NULL, &sta_id); in il3945_add_bssid_station()
2290 spin_lock_irqsave(&il->sta_lock, flags); in il3945_add_bssid_station()
2291 il->stations[sta_id].used |= IL_STA_LOCAL; in il3945_add_bssid_station()
2292 spin_unlock_irqrestore(&il->sta_lock, flags); in il3945_add_bssid_station()
2298 il3945_manage_ibss_station(struct il_priv *il, struct ieee80211_vif *vif, in il3945_manage_ibss_station() argument
2306 il3945_add_bssid_station(il, vif->bss_conf.bssid, in il3945_manage_ibss_station()
2311 il3945_sync_sta(il, vif_priv->ibss_bssid_sta_id, in il3945_manage_ibss_station()
2312 (il->band == in il3945_manage_ibss_station()
2315 il3945_rate_scale_init(il->hw, vif_priv->ibss_bssid_sta_id); in il3945_manage_ibss_station()
2320 return il_remove_station(il, vif_priv->ibss_bssid_sta_id, in il3945_manage_ibss_station()
2328 il3945_init_hw_rate_table(struct il_priv *il) in il3945_init_hw_rate_table() argument
2340 table[idx].try_cnt = il->retry_rate; in il3945_init_hw_rate_table()
2345 switch (il->band) { in il3945_init_hw_rate_table()
2367 if (!(il->_3945.sta_supp_rates & IL_OFDM_RATES_MASK) && in il3945_init_hw_rate_table()
2368 il_is_associated(il)) { in il3945_init_hw_rate_table()
2388 rc = il_send_cmd_pdu(il, C_RATE_SCALE, sizeof(rate_cmd), &rate_cmd); in il3945_init_hw_rate_table()
2394 return il_send_cmd_pdu(il, C_RATE_SCALE, sizeof(rate_cmd), &rate_cmd); in il3945_init_hw_rate_table()
2399 il3945_hw_set_hw_params(struct il_priv *il) in il3945_hw_set_hw_params() argument
2401 memset((void *)&il->hw_params, 0, sizeof(struct il_hw_params)); in il3945_hw_set_hw_params()
2403 il->_3945.shared_virt = in il3945_hw_set_hw_params()
2404 dma_alloc_coherent(&il->pci_dev->dev, sizeof(struct il3945_shared), in il3945_hw_set_hw_params()
2405 &il->_3945.shared_phys, GFP_KERNEL); in il3945_hw_set_hw_params()
2406 if (!il->_3945.shared_virt) in il3945_hw_set_hw_params()
2409 il->hw_params.bcast_id = IL3945_BROADCAST_ID; in il3945_hw_set_hw_params()
2412 il->hw_params.max_txq_num = il->cfg->num_of_queues; in il3945_hw_set_hw_params()
2414 il->hw_params.tfd_size = sizeof(struct il3945_tfd); in il3945_hw_set_hw_params()
2415 il->hw_params.rx_page_order = get_order(IL_RX_BUF_SIZE_3K); in il3945_hw_set_hw_params()
2416 il->hw_params.max_rxq_size = RX_QUEUE_SIZE; in il3945_hw_set_hw_params()
2417 il->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG; in il3945_hw_set_hw_params()
2418 il->hw_params.max_stations = IL3945_STATION_COUNT; in il3945_hw_set_hw_params()
2420 il->sta_key_max_num = STA_KEY_MAX_NUM; in il3945_hw_set_hw_params()
2422 il->hw_params.rx_wrt_ptr_reg = FH39_RSCSR_CHNL0_WPTR; in il3945_hw_set_hw_params()
2423 il->hw_params.max_beacon_itrvl = IL39_MAX_UCODE_BEACON_INTERVAL; in il3945_hw_set_hw_params()
2424 il->hw_params.beacon_time_tsf_bits = IL3945_EXT_BEACON_TIME_POS; in il3945_hw_set_hw_params()
2430 il3945_hw_get_beacon_cmd(struct il_priv *il, struct il3945_frame *frame, in il3945_hw_get_beacon_cmd() argument
2439 tx_beacon_cmd->tx.sta_id = il->hw_params.bcast_id; in il3945_hw_get_beacon_cmd()
2443 il3945_fill_beacon_frame(il, tx_beacon_cmd->frame, in il3945_hw_get_beacon_cmd()
2463 il3945_hw_handler_setup(struct il_priv *il) in il3945_hw_handler_setup() argument
2465 il->handlers[C_TX] = il3945_hdl_tx; in il3945_hw_handler_setup()
2466 il->handlers[N_3945_RX] = il3945_hdl_rx; in il3945_hw_handler_setup()
2470 il3945_hw_setup_deferred_work(struct il_priv *il) in il3945_hw_setup_deferred_work() argument
2472 INIT_DELAYED_WORK(&il->_3945.thermal_periodic, in il3945_hw_setup_deferred_work()
2477 il3945_hw_cancel_deferred_work(struct il_priv *il) in il3945_hw_cancel_deferred_work() argument
2479 cancel_delayed_work(&il->_3945.thermal_periodic); in il3945_hw_cancel_deferred_work()
2484 il3945_verify_bsm(struct il_priv *il) in il3945_verify_bsm() argument
2486 __le32 *image = il->ucode_boot.v_addr; in il3945_verify_bsm()
2487 u32 len = il->ucode_boot.len; in il3945_verify_bsm()
2494 val = il_rd_prph(il, BSM_WR_DWCOUNT_REG); in il3945_verify_bsm()
2497 val = il_rd_prph(il, reg); in il3945_verify_bsm()
2527 il3945_eeprom_acquire_semaphore(struct il_priv *il) in il3945_eeprom_acquire_semaphore() argument
2529 _il_clear_bit(il, CSR_EEPROM_GP, CSR_EEPROM_GP_IF_OWNER_MSK); in il3945_eeprom_acquire_semaphore()
2534 il3945_eeprom_release_semaphore(struct il_priv *il) in il3945_eeprom_release_semaphore() argument
2572 il3945_load_bsm(struct il_priv *il) in il3945_load_bsm() argument
2574 __le32 *image = il->ucode_boot.v_addr; in il3945_load_bsm()
2575 u32 len = il->ucode_boot.len; in il3945_load_bsm()
2596 pinst = il->ucode_init.p_addr; in il3945_load_bsm()
2597 pdata = il->ucode_init_data.p_addr; in il3945_load_bsm()
2598 inst_len = il->ucode_init.len; in il3945_load_bsm()
2599 data_len = il->ucode_init_data.len; in il3945_load_bsm()
2601 il_wr_prph(il, BSM_DRAM_INST_PTR_REG, pinst); in il3945_load_bsm()
2602 il_wr_prph(il, BSM_DRAM_DATA_PTR_REG, pdata); in il3945_load_bsm()
2603 il_wr_prph(il, BSM_DRAM_INST_BYTECOUNT_REG, inst_len); in il3945_load_bsm()
2604 il_wr_prph(il, BSM_DRAM_DATA_BYTECOUNT_REG, data_len); in il3945_load_bsm()
2610 _il_wr_prph(il, reg_offset, le32_to_cpu(*image)); in il3945_load_bsm()
2612 rc = il3945_verify_bsm(il); in il3945_load_bsm()
2617 il_wr_prph(il, BSM_WR_MEM_SRC_REG, 0x0); in il3945_load_bsm()
2618 il_wr_prph(il, BSM_WR_MEM_DST_REG, IL39_RTC_INST_LOWER_BOUND); in il3945_load_bsm()
2619 il_wr_prph(il, BSM_WR_DWCOUNT_REG, len / sizeof(u32)); in il3945_load_bsm()
2623 il_wr_prph(il, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START); in il3945_load_bsm()
2627 done = il_rd_prph(il, BSM_WR_CTRL_REG); in il3945_load_bsm()
2641 il_wr_prph(il, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START_EN); in il3945_load_bsm()