Lines Matching refs:ipw_write_reg32
332 static inline void ipw_write_reg32(struct ipw_priv *a, u32 b, u32 c) in ipw_write_reg32() function
901 ipw_write_reg32(priv, IPW_EVENT_REG, led); in ipw_led_link_on()
941 ipw_write_reg32(priv, IPW_EVENT_REG, led); in ipw_led_link_off()
985 ipw_write_reg32(priv, IPW_EVENT_REG, led); in __ipw_led_activity_on()
1027 ipw_write_reg32(priv, IPW_EVENT_REG, led); in ipw_led_activity_off()
1076 ipw_write_reg32(priv, IPW_EVENT_REG, led); in ipw_led_band_on()
1099 ipw_write_reg32(priv, IPW_EVENT_REG, led); in ipw_led_band_off()
1655 ipw_write_reg32(p, IPW_INTERNAL_CMD_EVENT, reg); in store_command_event_reg()
1679 ipw_write_reg32(p, 0x301100, reg); in store_mem_gpio_reg()
2624 ipw_write_reg32(p, FW_MEM_REG_EEPROM_ACCESS, data); in eeprom_write_reg()
2782 ipw_write_reg32(priv, IPW_DMA_I_CB_BASE, IPW_SHARED_SRAM_DMA_CONTROL); in ipw_fw_dma_enable()
2796 ipw_write_reg32(priv, IPW_DMA_I_DMA_CONTROL, control); in ipw_fw_dma_abort()
2836 ipw_write_reg32(priv, IPW_DMA_I_DMA_CONTROL, control); in ipw_fw_dma_kick()
3121 ipw_write_reg32(priv, IPW_MEM_HALT_AND_RESET, IPW_BIT_HALT_RESET_ON); in ipw_load_ucode()
3123 ipw_write_reg32(priv, IPW_MEM_HALT_AND_RESET, IPW_BIT_HALT_RESET_OFF); in ipw_load_ucode()
3127 ipw_write_reg32(priv, IPW_INTERNAL_CMD_EVENT, IPW_BASEBAND_POWER_DOWN); in ipw_load_ucode()
3130 ipw_write_reg32(priv, IPW_INTERNAL_CMD_EVENT, 0); in ipw_load_ucode()
6160 ipw_write_reg32(priv, reg, *(u32 *) & fr); in ipw_set_fixed_rate()