Lines Matching refs:u16
266 u16 crsminpwrthld_40_stored;
267 u16 crsminpwrthld_20L_stored;
268 u16 crsminpwrthld_20U_stored;
269 u16 init_gain_code_core1_stored;
270 u16 init_gain_code_core2_stored;
271 u16 init_gain_codeb_core1_stored;
272 u16 init_gain_codeb_core2_stored;
273 u16 init_gain_table_stored[4];
275 u16 clip1_hi_gain_code_core1_stored;
276 u16 clip1_hi_gain_code_core2_stored;
277 u16 clip1_hi_gain_codeb_core1_stored;
278 u16 clip1_hi_gain_codeb_core2_stored;
279 u16 nb_clip_thresh_core1_stored;
280 u16 nb_clip_thresh_core2_stored;
281 u16 init_ofdmlna2gainchange_stored[4];
282 u16 init_ccklna2gainchange_stored[4];
283 u16 clip1_lo_gain_code_core1_stored;
284 u16 clip1_lo_gain_code_core2_stored;
285 u16 clip1_lo_gain_codeb_core1_stored;
286 u16 clip1_lo_gain_codeb_core2_stored;
287 u16 w1_clip_thresh_core1_stored;
288 u16 w1_clip_thresh_core2_stored;
289 u16 radio_2056_core1_rssi_gain_stored;
290 u16 radio_2056_core2_rssi_gain_stored;
291 u16 energy_drop_timeout_len_stored;
293 u16 ed_crs40_assertthld0_stored;
294 u16 ed_crs40_assertthld1_stored;
295 u16 ed_crs40_deassertthld0_stored;
296 u16 ed_crs40_deassertthld1_stored;
297 u16 ed_crs20L_assertthld0_stored;
298 u16 ed_crs20L_assertthld1_stored;
299 u16 ed_crs20L_deassertthld0_stored;
300 u16 ed_crs20L_deassertthld1_stored;
301 u16 ed_crs20U_assertthld0_stored;
302 u16 ed_crs20U_assertthld1_stored;
303 u16 ed_crs20U_deassertthld0_stored;
304 u16 ed_crs20U_deassertthld1_stored;
306 u16 badplcp_ma;
307 u16 badplcp_ma_previous;
308 u16 badplcp_ma_total;
309 u16 badplcp_ma_list[MA_WINDOW_SZ];
314 u16 init_gain_core1;
315 u16 init_gain_core2;
316 u16 init_gainb_core1;
317 u16 init_gainb_core2;
318 u16 init_gain_rfseq[4];
320 u16 crsminpwr0;
321 u16 crsminpwrl0;
322 u16 crsminpwru0;
326 u16 radio_2057_core1_rssi_wb1a_gc_stored;
327 u16 radio_2057_core2_rssi_wb1a_gc_stored;
328 u16 radio_2057_core1_rssi_wb1g_gc_stored;
329 u16 radio_2057_core2_rssi_wb1g_gc_stored;
330 u16 radio_2057_core1_rssi_wb2_gc_stored;
331 u16 radio_2057_core2_rssi_wb2_gc_stored;
332 u16 radio_2057_core1_rssi_nb_gc_stored;
333 u16 radio_2057_core2_rssi_nb_gc_stored;
337 u16 rc_cal_ovr;
338 u16 phycrsth1;
339 u16 phycrsth2;
340 u16 init_n1p1_gain;
341 u16 p1_p2_gain;
342 u16 n1_n2_gain;
343 u16 n1_p1_gain;
344 u16 div_search_gain;
345 u16 div_p1_p2_gain;
346 u16 div_search_gn_change;
347 u16 table_7_2;
348 u16 table_7_3;
349 u16 cckshbits_gnref;
350 u16 clip_thresh;
351 u16 clip2_thresh;
352 u16 clip3_thresh;
353 u16 clip_p2_thresh;
354 u16 clip_pwdn_thresh;
355 u16 clip_n1p1_thresh;
356 u16 clip_n1_pwdn_thresh;
357 u16 bbconfig;
358 u16 cthr_sthr_shdin;
359 u16 energy;
360 u16 clip_p1_p2_thresh;
361 u16 threshold;
362 u16 reg15;
363 u16 reg16;
364 u16 reg17;
365 u16 div_srch_idx;
366 u16 div_srch_p1_p2;
367 u16 div_srch_gn_back;
368 u16 ant_dwell;
369 u16 ant_wr_settle;
388 u16 AfectrlOverride;
389 u16 AfeCtrlDacGain;
390 u16 rad_gain;
392 u16 iqcomp_a;
393 u16 iqcomp_b;
394 u16 locomp;
399 u16 txcal_coeffs_2G[8];
400 u16 txcal_radio_regs_2G[8];
403 u16 txcal_coeffs_5G[8];
404 u16 txcal_radio_regs_5G[8];
438 u16 txlpf[2];
439 u16 txgm[2];
440 u16 pga[2];
441 u16 pad[2];
442 u16 ipa[2];
455 u16 rssical_radio_regs_2G[2];
456 u16 rssical_phyregs_2G[12];
458 u16 rssical_radio_regs_5G[2];
459 u16 rssical_phyregs_5G[12];
464 u16 txiqlocal_a;
465 u16 txiqlocal_b;
466 u16 txiqlocal_didq;
472 u16 txiqlocal_bestcoeffs[11];
473 u16 txiqlocal_bestcoeffs_valid;
476 u16 analog_gain_ref;
477 u16 lut_begin;
478 u16 lut_end;
479 u16 lut_step;
480 u16 rxcompdbm;
481 u16 papdctrl;
482 u16 sslpnCalibClkEnCtrl;
484 u16 rxiqcal_coeff_a0;
485 u16 rxiqcal_coeff_b0;
497 u16 vid;
498 u16 did;
525 u16 radioid;
537 void (*chanset)(struct brcms_phy *, u16 chanspec);
540 void (*txiqccget)(struct brcms_phy *, u16 *, u16 *);
541 void (*txiqccset)(struct brcms_phy *, u16, u16);
542 u16 (*txloccget)(struct brcms_phy *);
567 u16 radio_chanspec;
569 u16 bw;
614 u16 phy_wreg;
615 u16 phy_wreg_limit;
634 u16 hwpwr_txcur;
646 u16 extlna_type;
649 u16 crsglitch_prev;
670 u16 radiopwr;
671 u16 bb_atten;
672 u16 txctl1;
674 u16 mintxbias;
675 u16 mintxmag;
679 u16 gain_table[TX_GAIN_TABLE_LENGTH];
685 u16 rc_cal;
697 u16 tx_vos;
698 u16 global_tx_bb_dc_bias_loft;
704 u16 *rf_attn_list;
705 u16 *bb_attn_list;
706 u16 padmix_mask;
707 u16 padmix_reg;
708 u16 *txmag_list;
718 u16 freqtrack_saved_regs[2];
733 u16 nphy_txiqlocal_bestc[11];
737 u16 cck2gpo;
758 u16 mcs2gpo[8];
759 u16 mcs5gpo[8];
760 u16 mcs5glpo[8];
761 u16 mcs5ghpo[8];
776 u16 old_bphy_test;
777 u16 old_bphy_testcontrol;
788 u16 mphase_txcal_bestcoeffs[11];
789 u16 nphy_txiqlocal_chanspec;
790 u16 nphy_iqcal_chanspec_2G;
791 u16 nphy_iqcal_chanspec_5G;
792 u16 nphy_rssical_chanspec_2G;
793 u16 nphy_rssical_chanspec_5G;
805 u16 nphy_papd_tx_gain_at_last_cal[2];
815 u16 classifier_state;
816 u16 clip_state[2];
821 u16 rfctrlIntc1_save;
822 u16 rfctrlIntc2_save;
824 u16 tx_rx_cal_radio_saveregs[22];
825 u16 tx_rx_cal_phy_saveregs[15];
830 u16 nphy_cal_orig_tx_gain[2];
832 u16 nphy_txcal_bbmult;
833 u16 nphy_gmval;
835 u16 nphy_saved_bbconf;
840 u16 nphy_rccal_value;
841 u16 nphy_crsminpwr[3];
848 u16 radar_percal_mask;
851 u16 nphy_fineclockgatecontrol;
855 u16 crsminpwr0;
856 u16 crsminpwrl0;
857 u16 crsminpwru0;
859 u16 init_gain_core1;
860 u16 init_gain_core2;
861 u16 init_gainb_core1;
862 u16 init_gainb_core2;
864 u16 init_gain_rfseq[4];
870 u16 tbl_data_hi;
871 u16 tbl_data_lo;
872 u16 tbl_addr;
892 u16 address;
900 u16 address;
906 u16 address;
913 u16 read_phy_reg(struct brcms_phy *pi, u16 addr);
914 void write_phy_reg(struct brcms_phy *pi, u16 addr, u16 val);
915 void and_phy_reg(struct brcms_phy *pi, u16 addr, u16 val);
916 void or_phy_reg(struct brcms_phy *pi, u16 addr, u16 val);
917 void mod_phy_reg(struct brcms_phy *pi, u16 addr, u16 mask, u16 val);
919 u16 read_radio_reg(struct brcms_phy *pi, u16 addr);
920 void or_radio_reg(struct brcms_phy *pi, u16 addr, u16 val);
921 void and_radio_reg(struct brcms_phy *pi, u16 addr, u16 val);
922 void mod_radio_reg(struct brcms_phy *pi, u16 addr, u16 mask, u16 val);
923 void xor_radio_reg(struct brcms_phy *pi, u16 addr, u16 mask);
925 void write_radio_reg(struct brcms_phy *pi, u16 addr, u16 val);
934 u16 tblAddr, u16 tblDataHi, u16 tblDatalo);
937 u16 tblAddr, u16 tblDataHi, u16 tblDatalo);
939 u16 tblAddr, u16 tblDataHi, u16 tblDataLo);
952 u16 core_offset);
973 void wlc_phy_chanspec_set_nphy(struct brcms_phy *pi, u16 chanspec);
974 void wlc_phy_chanspec_set_lcnphy(struct brcms_phy *pi, u16 chanspec);
975 void wlc_phy_chanspec_set_fixup_lcnphy(struct brcms_phy *pi, u16 chanspec);
978 int wlc_phy_chanspec_bandrange_get(struct brcms_phy *, u16 chanspec);
980 void wlc_lcnphy_set_tx_pwr_ctrl(struct brcms_phy *pi, u16 mode);
990 void wlc_lcnphy_start_tx_tone(struct brcms_phy *pi, s32 f_kHz, u16 max_val,
1000 u16 wlc_lcnphy_tempsense(struct brcms_phy *pi, bool mode);
1026 void wlc_lcnphy_set_tx_iqcc(struct brcms_phy *pi, u16 a, u16 b);
1027 void wlc_lcnphy_set_tx_locc(struct brcms_phy *pi, u16 didq);
1028 void wlc_lcnphy_get_tx_iqcc(struct brcms_phy *pi, u16 *a, u16 *b);
1029 u16 wlc_lcnphy_get_tx_locc(struct brcms_phy *pi);
1091 u16 wlc_phy_classifier_nphy(struct brcms_phy *pi, u16 mask, u16 val);
1094 u16 num_samps, u8 wait_time, u8 wait_for_crs);
1107 u16 wlc_phy_txpwr_idx_get_nphy(struct brcms_phy *pi);
1123 int wlc_phy_tx_tone_nphy(struct brcms_phy *pi, u32 f_kHz, u16 max_val, u8 mode,
1139 s8 wlc_phy_upd_rssi_offset(struct brcms_phy *pi, s8 rssi, u16 chanspec);