221 	b43_phy_set(dev, B43_LPPHY_AFE_DAC_CTL, 0x0004);  in lpphy_baseband_rev0_1_init()
323 		b43_phy_set(dev, B43_LPPHY_CRSGAIN_CTL, 0x0006);  in lpphy_baseband_rev0_1_init()
330 		b43_phy_set(dev, B43_LPPHY_LP_PHY_CTL, 0x8000);  in lpphy_baseband_rev0_1_init()
331 		b43_phy_set(dev, B43_LPPHY_CRSGAIN_CTL, 0x0040);  in lpphy_baseband_rev0_1_init()
420 	b43_phy_set(dev, B43_LPPHY_ADC_COMPENSATION_CTL, 0x10);  in lpphy_baseband_rev2plus_init()
428 	b43_phy_set(dev, B43_PHY_OFDM(0x10A), 0x1);  in lpphy_baseband_rev2plus_init()
470 		b43_phy_set(dev, B43_LPPHY_CRSGAIN_CTL, 0x40);  in lpphy_baseband_rev2plus_init()
482 	b43_phy_set(dev, B43_LPPHY_RESET_CTL, 0x44);  in lpphy_baseband_rev2plus_init()
490 		b43_phy_set(dev, B43_LPPHY_AFE_ADC_CTL_0, 0x1C);  in lpphy_baseband_rev2plus_init()
682 	b43_phy_set(dev, B43_LPPHY_FOURWIRE_CTL, 0x2);  in lpphy_radio_init()
762 	b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x3);  in lpphy_set_trsw_over()
770 	b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x4);  in lpphy_disable_crs()
772 	b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x8);  in lpphy_disable_crs()
773 	b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_VAL_0, 0x10);  in lpphy_disable_crs()
774 	b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x10);  in lpphy_disable_crs()
776 	b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x20);  in lpphy_disable_crs()
778 	b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x40);  in lpphy_disable_crs()
779 	b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_2_VAL, 0x7);  in lpphy_disable_crs()
780 	b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_2_VAL, 0x38);  in lpphy_disable_crs()
782 	b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_2_VAL, 0x100);  in lpphy_disable_crs()
821 	b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x1);  in lpphy_enable_rx_gain_override()
822 	b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x10);  in lpphy_enable_rx_gain_override()
823 	b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x40);  in lpphy_enable_rx_gain_override()
825 		b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_2, 0x100);  in lpphy_enable_rx_gain_override()
827 			b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_2, 0x400);  in lpphy_enable_rx_gain_override()
828 			b43_phy_set(dev, B43_PHY_OFDM(0xE5), 0x8);  in lpphy_enable_rx_gain_override()
831 		b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_2, 0x200);  in lpphy_enable_rx_gain_override()
849 		b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_2, 0x100);  in lpphy_enable_tx_gain_override()
851 		b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_2, 0x80);  in lpphy_enable_tx_gain_override()
852 		b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_2, 0x4000);  in lpphy_enable_tx_gain_override()
854 	b43_phy_set(dev, B43_LPPHY_AFE_CTL_OVR, 0x40);  in lpphy_enable_tx_gain_override()
995 	b43_phy_set(dev, B43_LPPHY_AFE_DDFS, 0x2);  in lpphy_run_ddfs()
996 	b43_phy_set(dev, B43_LPPHY_LP_PHY_CTL, 0x20);  in lpphy_run_ddfs()
1008 	b43_phy_set(dev, B43_LPPHY_IQ_ENABLE_WAIT_TIME_ADDR, 0x200);  in lpphy_rx_iq_est()
1018 		b43_phy_set(dev, B43_LPPHY_CRSGAIN_CTL, 0x8);  in lpphy_rx_iq_est()
1034 	b43_phy_set(dev, B43_LPPHY_CRSGAIN_CTL, 0x8);  in lpphy_rx_iq_est()
1047 	b43_phy_set(dev, B43_LPPHY_AFE_CTL_OVR, 1);  in lpphy_loopback()
1049 	b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x800);  in lpphy_loopback()
1050 	b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_VAL_0, 0x800);  in lpphy_loopback()
1051 	b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x8);  in lpphy_loopback()
1052 	b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_VAL_0, 0x8);  in lpphy_loopback()
1054 	b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x80);  in lpphy_loopback()
1055 	b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_VAL_0, 0x80);  in lpphy_loopback()
1174 			b43_phy_set(dev, B43_PHY_OFDM(0xD0), 0x2);  in lpphy_set_tx_power_control()
1436 			b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x1F00);  in b43_lpphy_op_software_rfkill()
1439 			b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_2, 0x0808);  in b43_lpphy_op_software_rfkill()
1442 			b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x1F00);  in b43_lpphy_op_software_rfkill()
1444 			b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_2, 0x0018);  in b43_lpphy_op_software_rfkill()
1474 		b43_phy_set(dev, B43_PHY_OFDM(0xF3), 0x1000);  in lpphy_set_tssi_mux()
1775 	b43_phy_set(dev, B43_LPPHY_A_PHY_CTL_ADDR, 0x1);  in lpphy_run_samples()
1906 		b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x8);  in lpphy_rx_iq_cal()
1910 		b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x20);  in lpphy_rx_iq_cal()
1929 	b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x800);  in lpphy_rx_iq_cal()
1930 	b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_VAL_0, 0x800);  in lpphy_rx_iq_cal()
2689                b43_phy_set(dev, B43_LPPHY_AFE_CTL_OVRVAL, 0x0007);  in b43_lpphy_op_switch_analog()
2690                b43_phy_set(dev, B43_LPPHY_AFE_CTL_OVR, 0x0007);  in b43_lpphy_op_switch_analog()