206 	b43_phy_write(dev, B43_PHY_HT_RF_SEQ_MODE, save_seq_mode);  in b43_phy_ht_force_rf_sequence()
219 			b43_phy_write(dev, regs[i], htphy->rf_ctl_int_save[i]);  in b43_phy_ht_pa_override()
225 			b43_phy_write(dev, regs[i], 0x0400);  in b43_phy_ht_pa_override()
255 	b43_phy_write(dev, B43_PHY_HT_BBCFG, bbcfg | B43_PHY_HT_BBCFG_RSTCCA);  in b43_phy_ht_reset_cca()
257 	b43_phy_write(dev, B43_PHY_HT_BBCFG, bbcfg & ~B43_PHY_HT_BBCFG_RSTCCA);  in b43_phy_ht_reset_cca()
270 			b43_phy_write(dev, B43_PHY_EXTG(base[i] + j), 0);  in b43_phy_ht_zero_extg()
274 		b43_phy_write(dev, B43_PHY_EXTG(base[i] + 0xc), 0);  in b43_phy_ht_zero_extg()
313 		b43_phy_write(dev, B43_PHY_N_BMODE(0x88 + i), val);  in b43_phy_ht_bphy_init()
318 		b43_phy_write(dev, B43_PHY_N_BMODE(0x98 + i), val);  in b43_phy_ht_bphy_init()
321 	b43_phy_write(dev, B43_PHY_N_BMODE(0x38), 0x668);  in b43_phy_ht_bphy_init()
377 	b43_phy_write(dev, B43_PHY_HT_TABLE_ADDR, 0x4400);  in b43_phy_ht_load_samples()
380 		b43_phy_write(dev, B43_PHY_HT_TABLE_DATAHI, 0);  in b43_phy_ht_load_samples()
381 		b43_phy_write(dev, B43_PHY_HT_TABLE_DATALO, 0);  in b43_phy_ht_load_samples()
399 	b43_phy_write(dev, B43_PHY_HT_SAMP_DEP_CNT, samps - 1);  in b43_phy_ht_run_samples()
402 	b43_phy_write(dev, B43_PHY_HT_SAMP_LOOP_CNT, loops);  in b43_phy_ht_run_samples()
403 	b43_phy_write(dev, B43_PHY_HT_SAMP_WAIT_CNT, wait);  in b43_phy_ht_run_samples()
425 	b43_phy_write(dev, B43_PHY_HT_RF_SEQ_MODE, save_seq_mode);  in b43_phy_ht_run_samples()
517 		b43_phy_write(dev, phy_regs_to_save[i], phy_regs_values[i]);  in b43_phy_ht_poll_rssi()
573 				b43_phy_write(dev, cmd_regs[i], 0x32);  in b43_phy_ht_tx_power_ctl()
579 				b43_phy_write(dev, cmd_regs[i],  in b43_phy_ht_tx_power_ctl()
599 		b43_phy_write(dev, base[core] + 6, 0);  in b43_phy_ht_tx_power_ctl_idle_tssi()
616 		b43_phy_write(dev, base[core] + 0, save_regs[core][0]);  in b43_phy_ht_tx_power_ctl_idle_tssi()
617 		b43_phy_write(dev, base[core] + 6, save_regs[core][1]);  in b43_phy_ht_tx_power_ctl_idle_tssi()
618 		b43_phy_write(dev, base[core] + 7, save_regs[core][2]);  in b43_phy_ht_tx_power_ctl_idle_tssi()
795 	b43_phy_write(dev, B43_PHY_HT_BW1, e->bw1);  in b43_phy_ht_channel_setup()
796 	b43_phy_write(dev, B43_PHY_HT_BW2, e->bw2);  in b43_phy_ht_channel_setup()
797 	b43_phy_write(dev, B43_PHY_HT_BW3, e->bw3);  in b43_phy_ht_channel_setup()
798 	b43_phy_write(dev, B43_PHY_HT_BW4, e->bw4);  in b43_phy_ht_channel_setup()
799 	b43_phy_write(dev, B43_PHY_HT_BW5, e->bw5);  in b43_phy_ht_channel_setup()
800 	b43_phy_write(dev, B43_PHY_HT_BW6, e->bw6);  in b43_phy_ht_channel_setup()
817 	b43_phy_write(dev, 0x017e, 0x3830);  in b43_phy_ht_channel_setup()
905 	b43_phy_write(dev, B43_PHY_HT_AFE_C1_OVER, 0);  in b43_phy_ht_op_init()
906 	b43_phy_write(dev, B43_PHY_HT_AFE_C2_OVER, 0);  in b43_phy_ht_op_init()
907 	b43_phy_write(dev, B43_PHY_HT_AFE_C3_OVER, 0);  in b43_phy_ht_op_init()
909 	b43_phy_write(dev, B43_PHY_EXTG(0x103), 0x20);  in b43_phy_ht_op_init()
910 	b43_phy_write(dev, B43_PHY_EXTG(0x101), 0x20);  in b43_phy_ht_op_init()
911 	b43_phy_write(dev, 0x20d, 0xb8);  in b43_phy_ht_op_init()
912 	b43_phy_write(dev, B43_PHY_EXTG(0x14f), 0xc8);  in b43_phy_ht_op_init()
913 	b43_phy_write(dev, 0x70, 0x50);  in b43_phy_ht_op_init()
914 	b43_phy_write(dev, 0x1ff, 0x30);  in b43_phy_ht_op_init()
926 	b43_phy_write(dev, 0x32f, 0x0003);  in b43_phy_ht_op_init()
927 	b43_phy_write(dev, 0x077, 0x0010);  in b43_phy_ht_op_init()
928 	b43_phy_write(dev, 0x0b4, 0x0258);  in b43_phy_ht_op_init()
931 	b43_phy_write(dev, 0x0b9, 0x0072);  in b43_phy_ht_op_init()
993 	b43_phy_write(dev, B43_PHY_HT_BBCFG, tmp | B43_PHY_HT_BBCFG_RSTCCA);  in b43_phy_ht_op_init()
994 	b43_phy_write(dev, B43_PHY_HT_BBCFG, tmp & ~B43_PHY_HT_BBCFG_RSTCCA);  in b43_phy_ht_op_init()
1057 		b43_phy_write(dev, B43_PHY_HT_AFE_C1, 0x00cd);  in b43_phy_ht_op_switch_analog()
1058 		b43_phy_write(dev, B43_PHY_HT_AFE_C1_OVER, 0x0000);  in b43_phy_ht_op_switch_analog()
1059 		b43_phy_write(dev, B43_PHY_HT_AFE_C2, 0x00cd);  in b43_phy_ht_op_switch_analog()
1060 		b43_phy_write(dev, B43_PHY_HT_AFE_C2_OVER, 0x0000);  in b43_phy_ht_op_switch_analog()
1061 		b43_phy_write(dev, B43_PHY_HT_AFE_C3, 0x00cd);  in b43_phy_ht_op_switch_analog()
1062 		b43_phy_write(dev, B43_PHY_HT_AFE_C3_OVER, 0x0000);  in b43_phy_ht_op_switch_analog()
1064 		b43_phy_write(dev, B43_PHY_HT_AFE_C1_OVER, 0x07ff);  in b43_phy_ht_op_switch_analog()
1065 		b43_phy_write(dev, B43_PHY_HT_AFE_C1, 0x00fd);  in b43_phy_ht_op_switch_analog()
1066 		b43_phy_write(dev, B43_PHY_HT_AFE_C2_OVER, 0x07ff);  in b43_phy_ht_op_switch_analog()
1067 		b43_phy_write(dev, B43_PHY_HT_AFE_C2, 0x00fd);  in b43_phy_ht_op_switch_analog()
1068 		b43_phy_write(dev, B43_PHY_HT_AFE_C3_OVER, 0x07ff);  in b43_phy_ht_op_switch_analog()
1069 		b43_phy_write(dev, B43_PHY_HT_AFE_C3, 0x00fd);  in b43_phy_ht_op_switch_analog()