Lines Matching refs:wil_dbg_irq
97 wil_dbg_irq(wil, "%s()\n", __func__); in wil6210_mask_irq_pseudo()
124 wil_dbg_irq(wil, "%s()\n", __func__); in wil6210_unmask_irq_pseudo()
133 wil_dbg_irq(wil, "%s()\n", __func__); in wil_mask_irq()
143 wil_dbg_irq(wil, "%s()\n", __func__); in wil_unmask_irq()
160 wil_dbg_irq(wil, "%s()\n", __func__); in wil_configure_interrupt_moderation()
214 wil_dbg_irq(wil, "ISR RX 0x%08x\n", isr); in wil6210_irq_rx()
231 wil_dbg_irq(wil, "RX done\n"); in wil6210_irq_rx()
275 wil_dbg_irq(wil, "ISR TX 0x%08x\n", isr); in wil6210_irq_tx()
285 wil_dbg_irq(wil, "TX done\n"); in wil6210_irq_tx()
340 wil_dbg_irq(wil, "ISR MISC 0x%08x\n", isr); in wil6210_irq_misc()
365 wil_dbg_irq(wil, "IRQ: FW ready\n"); in wil6210_irq_misc()
391 wil_dbg_irq(wil, "Thread ISR MISC 0x%08x\n", isr); in wil6210_irq_misc_thread()
401 wil_dbg_irq(wil, "MBOX event\n"); in wil6210_irq_misc_thread()
407 wil_dbg_irq(wil, "un-handled MISC ISR bits 0x%08x\n", isr); in wil6210_irq_misc_thread()
423 wil_dbg_irq(wil, "Thread IRQ\n"); in wil6210_thread_irq()
498 wil_dbg_irq(wil, "Pseudo IRQ 0x%08x\n", pseudo_cause); in wil6210_hardirq()