1095 	struct ath_hw *ah = sc->sc_ah;  in ath_get_rate_txpower()  local
1097 	if (sc->tx99_state || !ah->tpc_enabled)  in ath_get_rate_txpower()
1104 	if (!AR_SREV_9300_20_OR_LATER(ah)) {  in ath_get_rate_txpower()
1109 			struct ar5416_eeprom_def *eep = &ah->eeprom.def;  in ath_get_rate_txpower()
1124 		if (AR_SREV_9287(ah) || AR_SREV_9285(ah) ||  in ath_get_rate_txpower()
1125 		    AR_SREV_9271(ah)) {  in ath_get_rate_txpower()
1127 		} else if (AR_SREV_9280_20_OR_LATER(ah)) {  in ath_get_rate_txpower()
1130 			power_offset = ah->eep_ops->get_eeprom(ah,  in ath_get_rate_txpower()
1139 		max_power = min_t(u8, ah->tx_power[rateidx], txpower);  in ath_get_rate_txpower()
1145 		if (!max_power && !AR_SREV_9280_20_OR_LATER(ah))  in ath_get_rate_txpower()
1149 			max_power = min_t(u8, ah->tx_power_stbc[rateidx],  in ath_get_rate_txpower()
1152 			max_power = min_t(u8, ah->tx_power[rateidx],  in ath_get_rate_txpower()
1155 		max_power = ah->paprd_training_power;  in ath_get_rate_txpower()
1164 	struct ath_hw *ah = sc->sc_ah;  in ath_buf_set_rate()  local
1165 	struct ath_common *common = ath9k_hw_common(ah);  in ath_buf_set_rate()
1226 					ah->txchainmask, info->rates[i].Rate);  in ath_buf_set_rate()
1254 			info->rates[i].ChSel = ah->txchainmask;  in ath_buf_set_rate()
1257 					ah->txchainmask, info->rates[i].Rate);  in ath_buf_set_rate()
1302 	struct ath_hw *ah = sc->sc_ah;  in ath_tx_fill_desc()  local
1386 		ath9k_hw_set_txdesc(ah, bf->bf_desc, &info);  in ath_tx_fill_desc()
1673 	struct ath_hw *ah = sc->sc_ah;  in ath_txq_setup()  local
1705 	if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {  in ath_txq_setup()
1714 	axq_qnum = ath9k_hw_setuptxqueue(ah, qtype, &qi);  in ath_txq_setup()
1746 	struct ath_hw *ah = sc->sc_ah;  in ath_txq_update()  local
1752 	ath9k_hw_get_txq_props(ah, qnum, &qi);  in ath_txq_update()
1759 	if (!ath9k_hw_set_txq_props(ah, qnum, &qi)) {  in ath_txq_update()
1764 		ath9k_hw_resettxqueue(ah, qnum);  in ath_txq_update()
1842 	struct ath_hw *ah = sc->sc_ah;  in ath_drain_all_txq()  local
1851 	ath9k_hw_abort_tx_dma(ah);  in ath_drain_all_txq()
1861 		if (ath9k_hw_numtxpending(ah, sc->tx.txq[i].axq_qnum))  in ath_drain_all_txq()
1982 	struct ath_hw *ah = sc->sc_ah;  in ath_tx_txqaddbuf()  local
1983 	struct ath_common *common = ath9k_hw_common(ah);  in ath_tx_txqaddbuf()
1996 	edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA);  in ath_tx_txqaddbuf()
2011 			ath9k_hw_set_desc_link(ah, txq->axq_link, bf->bf_daddr);  in ath_tx_txqaddbuf()
2023 		ath9k_hw_puttxbuf(ah, txq->axq_qnum, bf->bf_daddr);  in ath_tx_txqaddbuf()
2030 		ath9k_hw_txstart(ah, txq->axq_qnum);  in ath_tx_txqaddbuf()
2130 	struct ath_hw *ah = sc->sc_ah;  in ath_txchainmask_reduction()  local
2131 	struct ath9k_channel *curchan = ah->curchan;  in ath_txchainmask_reduction()
2133 	if ((ah->caps.hw_caps & ATH9K_HW_CAP_APM) && IS_CHAN_5GHZ(curchan) &&  in ath_txchainmask_reduction()
2136 	else if (AR_SREV_9462(ah) && ath9k_hw_btcoex_is_enabled(ah) &&  in ath_txchainmask_reduction()
2554 	struct ath_hw *ah = sc->sc_ah;  in ath_tx_rc_status()  local
2588 		    ah->tx_trig_level >= sc->sc_ah->config.max_txtrig_level)  in ath_tx_rc_status()
2603 	struct ath_hw *ah = sc->sc_ah;  in ath_tx_processq()  local
2604 	struct ath_common *common = ath9k_hw_common(ah);  in ath_tx_processq()
2649 		status = ath9k_hw_txprocdesc(ah, ds, &ts);  in ath_tx_processq()
2678 	struct ath_hw *ah = sc->sc_ah;  in ath_tx_tasklet()  local
2679 	u32 qcumask = ((1 << ATH9K_NUM_TX_QUEUES) - 1) & ah->intr_txqs;  in ath_tx_tasklet()
2692 	struct ath_hw *ah = sc->sc_ah;  in ath_tx_edma_tasklet()  local
2703 		status = ath9k_hw_txprocdesc(ah, NULL, (void *)&ts);  in ath_tx_edma_tasklet()