Lines Matching defs:ath9k_ops_config
332 struct ath9k_ops_config { struct
333 int dma_beacon_response_time;
334 int sw_beacon_response_time;
335 bool cwm_ignore_extcca;
336 u32 pcie_waen;
337 u8 analog_shiftreg;
338 u32 ofdm_trig_low;
339 u32 ofdm_trig_high;
340 u32 cck_trig_high;
341 u32 cck_trig_low;
342 bool enable_paprd;
343 int serialize_regmode;
344 bool rx_intr_mitigation;
345 bool tx_intr_mitigation;
346 u8 max_txtrig_level;
347 u16 ani_poll_interval; /* ANI poll interval in ms */
348 u16 hw_hang_checks;
349 u16 rimt_first;
350 u16 rimt_last;
353 u32 aspm_l1_fix;
354 u32 xlna_gpio;
355 u32 ant_ctrl_comm2g_switch_enable;
356 bool xatten_margin_cfg;
357 bool alt_mingainidx;
358 u8 pll_pwrsave;
359 bool tx_gain_buffalo;
360 bool led_active_high;