1500 	struct ath9k_hw_capabilities *pCap = &ah->caps;  in ath9k_hw_channel_change()  local
1506 	if (pCap->hw_caps & ATH9K_HW_CAP_FCC_BAND_SWITCH) {  in ath9k_hw_channel_change()
1739 	struct ath9k_hw_capabilities *pCap = &ah->caps;  in ath9k_hw_do_fastcc()  local
1761 	if (!(pCap->hw_caps & ATH9K_HW_CAP_FCC_BAND_SWITCH) &&  in ath9k_hw_do_fastcc()
2089 	struct ath9k_hw_capabilities *pCap = &ah->caps;  in ath9k_set_power_network_sleep()  local
2093 	if (!(pCap->hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {  in ath9k_set_power_network_sleep()
2274 	struct ath9k_hw_capabilities *pCap = &ah->caps;  in ath9k_hw_set_sta_beacon_timers()  local
2316 	if (pCap->hw_caps & ATH9K_HW_CAP_AUTOSLEEP)  in ath9k_hw_set_sta_beacon_timers()
2380 	struct ath9k_hw_capabilities *pCap = &ah->caps;  in ath9k_hw_fill_cap_info()  local
2407 			pCap->hw_caps |= ATH9K_HW_CAP_5GHZ;  in ath9k_hw_fill_cap_info()
2414 			pCap->hw_caps |= ATH9K_HW_CAP_2GHZ;  in ath9k_hw_fill_cap_info()
2417 	if ((pCap->hw_caps & (ATH9K_HW_CAP_2GHZ | ATH9K_HW_CAP_5GHZ)) == 0) {  in ath9k_hw_fill_cap_info()
2426 		pCap->chip_chainmask = 1;  in ath9k_hw_fill_cap_info()
2428 		pCap->chip_chainmask = 7;  in ath9k_hw_fill_cap_info()
2433 		pCap->chip_chainmask = 3;  in ath9k_hw_fill_cap_info()
2435 		pCap->chip_chainmask = 7;  in ath9k_hw_fill_cap_info()
2437 	pCap->tx_chainmask = ah->eep_ops->get_eeprom(ah, EEP_TX_MASK);  in ath9k_hw_fill_cap_info()
2446 		pCap->rx_chainmask = ath9k_hw_gpio_get(ah, 0) ? 0x5 : 0x7;  in ath9k_hw_fill_cap_info()
2448 		pCap->rx_chainmask = 0x7;  in ath9k_hw_fill_cap_info()
2451 		pCap->rx_chainmask = ah->eep_ops->get_eeprom(ah, EEP_RX_MASK);  in ath9k_hw_fill_cap_info()
2453 	pCap->tx_chainmask = fixup_chainmask(pCap->chip_chainmask, pCap->tx_chainmask);  in ath9k_hw_fill_cap_info()
2454 	pCap->rx_chainmask = fixup_chainmask(pCap->chip_chainmask, pCap->rx_chainmask);  in ath9k_hw_fill_cap_info()
2455 	ah->txchainmask = pCap->tx_chainmask;  in ath9k_hw_fill_cap_info()
2456 	ah->rxchainmask = pCap->rx_chainmask;  in ath9k_hw_fill_cap_info()
2467 		pCap->hw_caps |= ATH9K_HW_CAP_HT;  in ath9k_hw_fill_cap_info()
2469 		pCap->hw_caps &= ~ATH9K_HW_CAP_HT;  in ath9k_hw_fill_cap_info()
2472 		pCap->num_gpio_pins = AR9271_NUM_GPIO;  in ath9k_hw_fill_cap_info()
2474 		pCap->num_gpio_pins = AR7010_NUM_GPIO;  in ath9k_hw_fill_cap_info()
2476 		pCap->num_gpio_pins = AR9300_NUM_GPIO;  in ath9k_hw_fill_cap_info()
2478 		pCap->num_gpio_pins = AR9287_NUM_GPIO;  in ath9k_hw_fill_cap_info()
2480 		pCap->num_gpio_pins = AR9285_NUM_GPIO;  in ath9k_hw_fill_cap_info()
2482 		pCap->num_gpio_pins = AR928X_NUM_GPIO;  in ath9k_hw_fill_cap_info()
2484 		pCap->num_gpio_pins = AR_NUM_GPIO;  in ath9k_hw_fill_cap_info()
2487 		pCap->rts_aggr_limit = ATH_AMPDU_LIMIT_MAX;  in ath9k_hw_fill_cap_info()
2489 		pCap->rts_aggr_limit = (8 * 1024);  in ath9k_hw_fill_cap_info()
2499 		pCap->hw_caps |= ATH9K_HW_CAP_RFSILENT;  in ath9k_hw_fill_cap_info()
2503 		pCap->hw_caps |= ATH9K_HW_CAP_AUTOSLEEP;  in ath9k_hw_fill_cap_info()
2505 		pCap->hw_caps &= ~ATH9K_HW_CAP_AUTOSLEEP;  in ath9k_hw_fill_cap_info()
2508 		pCap->hw_caps &= ~ATH9K_HW_CAP_4KB_SPLITTRANS;  in ath9k_hw_fill_cap_info()
2510 		pCap->hw_caps |= ATH9K_HW_CAP_4KB_SPLITTRANS;  in ath9k_hw_fill_cap_info()
2513 		pCap->hw_caps |= ATH9K_HW_CAP_EDMA | ATH9K_HW_CAP_FASTCLOCK;  in ath9k_hw_fill_cap_info()
2516 			pCap->hw_caps |= ATH9K_HW_CAP_LDPC;  in ath9k_hw_fill_cap_info()
2518 		pCap->rx_hp_qdepth = ATH9K_HW_RX_HP_QDEPTH;  in ath9k_hw_fill_cap_info()
2519 		pCap->rx_lp_qdepth = ATH9K_HW_RX_LP_QDEPTH;  in ath9k_hw_fill_cap_info()
2520 		pCap->rx_status_len = sizeof(struct ar9003_rxs);  in ath9k_hw_fill_cap_info()
2521 		pCap->tx_desc_len = sizeof(struct ar9003_txc);  in ath9k_hw_fill_cap_info()
2522 		pCap->txs_len = sizeof(struct ar9003_txs);  in ath9k_hw_fill_cap_info()
2524 		pCap->tx_desc_len = sizeof(struct ath_desc);  in ath9k_hw_fill_cap_info()
2526 			pCap->hw_caps |= ATH9K_HW_CAP_FASTCLOCK;  in ath9k_hw_fill_cap_info()
2530 		pCap->hw_caps |= ATH9K_HW_CAP_RAC_SUPPORTED;  in ath9k_hw_fill_cap_info()
2538 		pCap->hw_caps |= ATH9K_HW_CAP_SGI_20;  in ath9k_hw_fill_cap_info()
2545 				pCap->hw_caps |= ATH9K_HW_CAP_ANT_DIV_COMB;  in ath9k_hw_fill_cap_info()
2553 			pCap->hw_caps |= ATH9K_HW_CAP_APM;  in ath9k_hw_fill_cap_info()
2559 			pCap->hw_caps |= ATH9K_HW_CAP_ANT_DIV_COMB;  in ath9k_hw_fill_cap_info()
2565 		pCap->hw_caps |= ATH9K_HW_CAP_DFS;  in ath9k_hw_fill_cap_info()
2567 	tx_chainmask = pCap->tx_chainmask;  in ath9k_hw_fill_cap_info()
2568 	rx_chainmask = pCap->rx_chainmask;  in ath9k_hw_fill_cap_info()
2571 			pCap->max_txchains++;  in ath9k_hw_fill_cap_info()
2573 			pCap->max_rxchains++;  in ath9k_hw_fill_cap_info()
2581 			pCap->hw_caps |= ATH9K_HW_CAP_MCI;  in ath9k_hw_fill_cap_info()
2584 			pCap->hw_caps |= ATH9K_HW_CAP_RTT;  in ath9k_hw_fill_cap_info()
2589 			pCap->hw_caps |= ATH9K_HW_CAP_PAPRD;  in ath9k_hw_fill_cap_info()