Lines Matching refs:pBase
125 struct base_eep_ar9287_header *pBase = &eep->baseEepHeader; in ath9k_hw_ar9287_dump_eeprom() local
135 PR_EEP("Major Version", pBase->version >> 12); in ath9k_hw_ar9287_dump_eeprom()
136 PR_EEP("Minor Version", pBase->version & 0xFFF); in ath9k_hw_ar9287_dump_eeprom()
137 PR_EEP("Checksum", pBase->checksum); in ath9k_hw_ar9287_dump_eeprom()
138 PR_EEP("Length", pBase->length); in ath9k_hw_ar9287_dump_eeprom()
139 PR_EEP("RegDomain1", pBase->regDmn[0]); in ath9k_hw_ar9287_dump_eeprom()
140 PR_EEP("RegDomain2", pBase->regDmn[1]); in ath9k_hw_ar9287_dump_eeprom()
141 PR_EEP("TX Mask", pBase->txMask); in ath9k_hw_ar9287_dump_eeprom()
142 PR_EEP("RX Mask", pBase->rxMask); in ath9k_hw_ar9287_dump_eeprom()
143 PR_EEP("Allow 5GHz", !!(pBase->opCapFlags & AR5416_OPFLAGS_11A)); in ath9k_hw_ar9287_dump_eeprom()
144 PR_EEP("Allow 2GHz", !!(pBase->opCapFlags & AR5416_OPFLAGS_11G)); in ath9k_hw_ar9287_dump_eeprom()
145 PR_EEP("Disable 2GHz HT20", !!(pBase->opCapFlags & in ath9k_hw_ar9287_dump_eeprom()
147 PR_EEP("Disable 2GHz HT40", !!(pBase->opCapFlags & in ath9k_hw_ar9287_dump_eeprom()
149 PR_EEP("Disable 5Ghz HT20", !!(pBase->opCapFlags & in ath9k_hw_ar9287_dump_eeprom()
151 PR_EEP("Disable 5Ghz HT40", !!(pBase->opCapFlags & in ath9k_hw_ar9287_dump_eeprom()
153 PR_EEP("Big Endian", !!(pBase->eepMisc & 0x01)); in ath9k_hw_ar9287_dump_eeprom()
154 PR_EEP("Cal Bin Major Ver", (pBase->binBuildNumber >> 24) & 0xFF); in ath9k_hw_ar9287_dump_eeprom()
155 PR_EEP("Cal Bin Minor Ver", (pBase->binBuildNumber >> 16) & 0xFF); in ath9k_hw_ar9287_dump_eeprom()
156 PR_EEP("Cal Bin Build", (pBase->binBuildNumber >> 8) & 0xFF); in ath9k_hw_ar9287_dump_eeprom()
157 PR_EEP("Power Table Offset", pBase->pwrTableOffset); in ath9k_hw_ar9287_dump_eeprom()
158 PR_EEP("OpenLoop Power Ctrl", pBase->openLoopPwrCntl); in ath9k_hw_ar9287_dump_eeprom()
161 pBase->macAddr); in ath9k_hw_ar9287_dump_eeprom()
288 struct base_eep_ar9287_header *pBase = &eep->baseEepHeader; in ath9k_hw_ar9287_get_eeprom() local
291 ver_minor = pBase->version & AR9287_EEP_VER_MINOR_MASK; in ath9k_hw_ar9287_get_eeprom()
297 return get_unaligned_be16(pBase->macAddr); in ath9k_hw_ar9287_get_eeprom()
299 return get_unaligned_be16(pBase->macAddr + 2); in ath9k_hw_ar9287_get_eeprom()
301 return get_unaligned_be16(pBase->macAddr + 4); in ath9k_hw_ar9287_get_eeprom()
303 return pBase->regDmn[0]; in ath9k_hw_ar9287_get_eeprom()
305 return pBase->deviceCap; in ath9k_hw_ar9287_get_eeprom()
307 return pBase->opCapFlags; in ath9k_hw_ar9287_get_eeprom()
309 return pBase->rfSilent; in ath9k_hw_ar9287_get_eeprom()
313 return pBase->txMask; in ath9k_hw_ar9287_get_eeprom()
315 return pBase->rxMask; in ath9k_hw_ar9287_get_eeprom()
317 return pBase->deviceType; in ath9k_hw_ar9287_get_eeprom()
319 return pBase->openLoopPwrCntl; in ath9k_hw_ar9287_get_eeprom()
322 return pBase->tempSensSlope; in ath9k_hw_ar9287_get_eeprom()
327 return pBase->tempSensSlopePalOn; in ath9k_hw_ar9287_get_eeprom()