Lines Matching refs:REG_WRITE
416 REG_WRITE(ah, AR_PHY_TPCRG5 + regChainOffset, in ath9k_hw_set_4k_power_cal_table()
431 REG_WRITE(ah, regOffset, reg32); in ath9k_hw_set_4k_power_cal_table()
691 REG_WRITE(ah, AR_PHY_POWER_TX_RATE1, in ath9k_hw_4k_set_txpower()
696 REG_WRITE(ah, AR_PHY_POWER_TX_RATE2, in ath9k_hw_4k_set_txpower()
703 REG_WRITE(ah, AR_PHY_POWER_TX_RATE3, in ath9k_hw_4k_set_txpower()
708 REG_WRITE(ah, AR_PHY_POWER_TX_RATE4, in ath9k_hw_4k_set_txpower()
715 REG_WRITE(ah, AR_PHY_POWER_TX_RATE5, in ath9k_hw_4k_set_txpower()
720 REG_WRITE(ah, AR_PHY_POWER_TX_RATE6, in ath9k_hw_4k_set_txpower()
728 REG_WRITE(ah, AR_PHY_POWER_TX_RATE7, in ath9k_hw_4k_set_txpower()
737 REG_WRITE(ah, AR_PHY_POWER_TX_RATE8, in ath9k_hw_4k_set_txpower()
746 REG_WRITE(ah, AR_PHY_POWER_TX_RATE9, in ath9k_hw_4k_set_txpower()
760 REG_WRITE(ah, AR_PHY_POWER_TX_RATE_MAX, in ath9k_hw_4k_set_txpower()
764 REG_WRITE(ah, AR_PHY_POWER_TX_RATE_MAX, MAX_RATE_POWER); in ath9k_hw_4k_set_txpower()
844 REG_WRITE(ah, AR_PHY_SWITCH_COM, pModal->antCtrlCommon); in ath9k_hw_4k_set_board_values()
869 REG_WRITE(ah, AR_PHY_MULTICHAIN_GAIN_CTL, regVal); in ath9k_hw_4k_set_board_values()
876 REG_WRITE(ah, AR_PHY_CCK_DETECT, regVal); in ath9k_hw_4k_set_board_values()
894 REG_WRITE(ah, AR_PHY_MULTICHAIN_GAIN_CTL, regVal); in ath9k_hw_4k_set_board_values()