2978 	struct ar9300_base_eep_hdr *pBase = &eep->baseEepHeader;  in ath9k_hw_ar9300_get_eeprom()  local
2988 		return le16_to_cpu(pBase->regDmn[0]);  in ath9k_hw_ar9300_get_eeprom()
2990 		return pBase->deviceCap;  in ath9k_hw_ar9300_get_eeprom()
2992 		return pBase->opCapFlags.opFlags;  in ath9k_hw_ar9300_get_eeprom()
2994 		return pBase->rfSilent;  in ath9k_hw_ar9300_get_eeprom()
2996 		return (pBase->txrxMask >> 4) & 0xf;  in ath9k_hw_ar9300_get_eeprom()
2998 		return pBase->txrxMask & 0xf;  in ath9k_hw_ar9300_get_eeprom()
3000 		return !!(pBase->featureEnable & BIT(5));  in ath9k_hw_ar9300_get_eeprom()
3002 		return (pBase->miscConfiguration >> 0x3) & 0x1;  in ath9k_hw_ar9300_get_eeprom()
3437 	struct ar9300_base_eep_hdr *pBase;  in ath9k_hw_ar9003_dump_eeprom()  local
3451 	pBase = &eep->baseEepHeader;  in ath9k_hw_ar9003_dump_eeprom()
3454 	PR_EEP("RegDomain1", le16_to_cpu(pBase->regDmn[0]));  in ath9k_hw_ar9003_dump_eeprom()
3455 	PR_EEP("RegDomain2", le16_to_cpu(pBase->regDmn[1]));  in ath9k_hw_ar9003_dump_eeprom()
3456 	PR_EEP("TX Mask", (pBase->txrxMask >> 4));  in ath9k_hw_ar9003_dump_eeprom()
3457 	PR_EEP("RX Mask", (pBase->txrxMask & 0x0f));  in ath9k_hw_ar9003_dump_eeprom()
3458 	PR_EEP("Allow 5GHz", !!(pBase->opCapFlags.opFlags &  in ath9k_hw_ar9003_dump_eeprom()
3460 	PR_EEP("Allow 2GHz", !!(pBase->opCapFlags.opFlags &  in ath9k_hw_ar9003_dump_eeprom()
3462 	PR_EEP("Disable 2GHz HT20", !!(pBase->opCapFlags.opFlags &  in ath9k_hw_ar9003_dump_eeprom()
3464 	PR_EEP("Disable 2GHz HT40", !!(pBase->opCapFlags.opFlags &  in ath9k_hw_ar9003_dump_eeprom()
3466 	PR_EEP("Disable 5Ghz HT20", !!(pBase->opCapFlags.opFlags &  in ath9k_hw_ar9003_dump_eeprom()
3468 	PR_EEP("Disable 5Ghz HT40", !!(pBase->opCapFlags.opFlags &  in ath9k_hw_ar9003_dump_eeprom()
3470 	PR_EEP("Big Endian", !!(pBase->opCapFlags.eepMisc & 0x01));  in ath9k_hw_ar9003_dump_eeprom()
3471 	PR_EEP("RF Silent", pBase->rfSilent);  in ath9k_hw_ar9003_dump_eeprom()
3472 	PR_EEP("BT option", pBase->blueToothOptions);  in ath9k_hw_ar9003_dump_eeprom()
3473 	PR_EEP("Device Cap", pBase->deviceCap);  in ath9k_hw_ar9003_dump_eeprom()
3474 	PR_EEP("Device Type", pBase->deviceType);  in ath9k_hw_ar9003_dump_eeprom()
3475 	PR_EEP("Power Table Offset", pBase->pwrTableOffset);  in ath9k_hw_ar9003_dump_eeprom()
3476 	PR_EEP("Tuning Caps1", pBase->params_for_tuning_caps[0]);  in ath9k_hw_ar9003_dump_eeprom()
3477 	PR_EEP("Tuning Caps2", pBase->params_for_tuning_caps[1]);  in ath9k_hw_ar9003_dump_eeprom()
3478 	PR_EEP("Enable Tx Temp Comp", !!(pBase->featureEnable & BIT(0)));  in ath9k_hw_ar9003_dump_eeprom()
3479 	PR_EEP("Enable Tx Volt Comp", !!(pBase->featureEnable & BIT(1)));  in ath9k_hw_ar9003_dump_eeprom()
3480 	PR_EEP("Enable fast clock", !!(pBase->featureEnable & BIT(2)));  in ath9k_hw_ar9003_dump_eeprom()
3481 	PR_EEP("Enable doubling", !!(pBase->featureEnable & BIT(3)));  in ath9k_hw_ar9003_dump_eeprom()
3482 	PR_EEP("Internal regulator", !!(pBase->featureEnable & BIT(4)));  in ath9k_hw_ar9003_dump_eeprom()
3483 	PR_EEP("Enable Paprd", !!(pBase->featureEnable & BIT(5)));  in ath9k_hw_ar9003_dump_eeprom()
3484 	PR_EEP("Driver Strength", !!(pBase->miscConfiguration & BIT(0)));  in ath9k_hw_ar9003_dump_eeprom()
3485 	PR_EEP("Quick Drop", !!(pBase->miscConfiguration & BIT(1)));  in ath9k_hw_ar9003_dump_eeprom()
3486 	PR_EEP("Chain mask Reduce", (pBase->miscConfiguration >> 0x3) & 0x1);  in ath9k_hw_ar9003_dump_eeprom()
3487 	PR_EEP("Write enable Gpio", pBase->eepromWriteEnableGpio);  in ath9k_hw_ar9003_dump_eeprom()
3488 	PR_EEP("WLAN Disable Gpio", pBase->wlanDisableGpio);  in ath9k_hw_ar9003_dump_eeprom()
3489 	PR_EEP("WLAN LED Gpio", pBase->wlanLedGpio);  in ath9k_hw_ar9003_dump_eeprom()
3490 	PR_EEP("Rx Band Select Gpio", pBase->rxBandSelectGpio);  in ath9k_hw_ar9003_dump_eeprom()
3491 	PR_EEP("Tx Gain", pBase->txrxgain >> 4);  in ath9k_hw_ar9003_dump_eeprom()
3492 	PR_EEP("Rx Gain", pBase->txrxgain & 0xf);  in ath9k_hw_ar9003_dump_eeprom()
3493 	PR_EEP("SW Reg", le32_to_cpu(pBase->swreg));  in ath9k_hw_ar9003_dump_eeprom()
3729 	struct ar9300_base_eep_hdr *pBase = &eep->baseEepHeader;  in ar9003_hw_drive_strength_apply()  local
3733 	drive_strength = pBase->miscConfiguration & BIT(0);  in ar9003_hw_drive_strength_apply()
3886 	struct ar9300_base_eep_hdr *pBase = &eep->baseEepHeader;  in ar9003_hw_internal_regulator_apply()  local
3889 	if (pBase->featureEnable & BIT(4)) {  in ar9003_hw_internal_regulator_apply()
3934 			reg_val = le32_to_cpu(pBase->swreg);  in ar9003_hw_internal_regulator_apply()
3941 			reg_val = le32_to_cpu(pBase->swreg);  in ar9003_hw_internal_regulator_apply()
3998 	struct ar9300_base_eep_hdr *pBase = &eep->baseEepHeader;  in ar9003_hw_quick_drop_apply()  local
4002 	if (!(pBase->miscConfiguration & BIT(4)))  in ar9003_hw_quick_drop_apply()
4079 	struct ar9300_base_eep_hdr *pBase = &eep->baseEepHeader;  in ar9003_hw_get_thermometer()  local
4080 	int thermometer =  (pBase->miscConfiguration >> 1) & 0x3;  in ar9003_hw_get_thermometer()