Lines Matching refs:s8
89 #define AR5K_EEPROM_ANT_GAIN_5GHZ(_v) ((s8)(((_v) >> 8) & 0xff))
90 #define AR5K_EEPROM_ANT_GAIN_2GHZ(_v) ((s8)((_v) & 0xff))
290 s8 pwr_x0[AR5K_EEPROM_N_XPD0_POINTS];
291 s8 pwr_x3[AR5K_EEPROM_N_XPD3_POINTS];
300 s8 pwr_i[AR5K_EEPROM_N_PD_GAINS];
304 s8 pwr[AR5K_EEPROM_N_PD_GAINS]
484 s8 ee_adc_desired_size[AR5K_EEPROM_N_MODES];
485 s8 ee_pga_desired_size[AR5K_EEPROM_N_MODES];
486 s8 ee_adc_desired_size_turbo[AR5K_EEPROM_N_MODES];
487 s8 ee_pga_desired_size_turbo[AR5K_EEPROM_N_MODES];
488 s8 ee_pd_gain_overlap;