Lines Matching refs:ar
94 static void ath10k_pci_buffer_cleanup(struct ath10k *ar);
95 static int ath10k_pci_cold_reset(struct ath10k *ar);
96 static int ath10k_pci_safe_chip_reset(struct ath10k *ar);
97 static int ath10k_pci_wait_for_target_init(struct ath10k *ar);
98 static int ath10k_pci_init_irq(struct ath10k *ar);
99 static int ath10k_pci_deinit_irq(struct ath10k *ar);
100 static int ath10k_pci_request_irq(struct ath10k *ar);
101 static void ath10k_pci_free_irq(struct ath10k *ar);
105 static int ath10k_pci_qca99x0_chip_reset(struct ath10k *ar);
421 static bool ath10k_pci_is_awake(struct ath10k *ar) in ath10k_pci_is_awake() argument
423 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_is_awake()
430 static void __ath10k_pci_wake(struct ath10k *ar) in __ath10k_pci_wake() argument
432 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in __ath10k_pci_wake()
436 ath10k_dbg(ar, ATH10K_DBG_PCI_PS, "pci ps wake reg refcount %lu awake %d\n", in __ath10k_pci_wake()
444 static void __ath10k_pci_sleep(struct ath10k *ar) in __ath10k_pci_sleep() argument
446 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in __ath10k_pci_sleep()
450 ath10k_dbg(ar, ATH10K_DBG_PCI_PS, "pci ps sleep reg refcount %lu awake %d\n", in __ath10k_pci_sleep()
459 static int ath10k_pci_wake_wait(struct ath10k *ar) in ath10k_pci_wake_wait() argument
465 if (ath10k_pci_is_awake(ar)) { in ath10k_pci_wake_wait()
467 … ath10k_warn(ar, "device wakeup took %d ms which is unusally long, otherwise it works normally.\n", in ath10k_pci_wake_wait()
482 static int ath10k_pci_force_wake(struct ath10k *ar) in ath10k_pci_force_wake() argument
484 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_force_wake()
495 ret = ath10k_pci_wake_wait(ar); in ath10k_pci_force_wake()
505 static void ath10k_pci_force_sleep(struct ath10k *ar) in ath10k_pci_force_sleep() argument
507 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_force_sleep()
520 static int ath10k_pci_wake(struct ath10k *ar) in ath10k_pci_wake() argument
522 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_wake()
531 ath10k_dbg(ar, ATH10K_DBG_PCI_PS, "pci ps wake refcount %lu awake %d\n", in ath10k_pci_wake()
538 __ath10k_pci_wake(ar); in ath10k_pci_wake()
540 ret = ath10k_pci_wake_wait(ar); in ath10k_pci_wake()
555 static void ath10k_pci_sleep(struct ath10k *ar) in ath10k_pci_sleep() argument
557 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_sleep()
565 ath10k_dbg(ar, ATH10K_DBG_PCI_PS, "pci ps sleep refcount %lu awake %d\n", in ath10k_pci_sleep()
582 struct ath10k *ar = (void *)ptr; in ath10k_pci_ps_timer() local
583 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_ps_timer()
588 ath10k_dbg(ar, ATH10K_DBG_PCI_PS, "pci ps timer refcount %lu awake %d\n", in ath10k_pci_ps_timer()
594 __ath10k_pci_sleep(ar); in ath10k_pci_ps_timer()
600 static void ath10k_pci_sleep_sync(struct ath10k *ar) in ath10k_pci_sleep_sync() argument
602 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_sleep_sync()
606 ath10k_pci_force_sleep(ar); in ath10k_pci_sleep_sync()
614 __ath10k_pci_sleep(ar); in ath10k_pci_sleep_sync()
618 void ath10k_pci_write32(struct ath10k *ar, u32 offset, u32 value) in ath10k_pci_write32() argument
620 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_write32()
624 ath10k_warn(ar, "refusing to write mmio out of bounds at 0x%08x - 0x%08zx (max 0x%08zx)\n", in ath10k_pci_write32()
629 ret = ath10k_pci_wake(ar); in ath10k_pci_write32()
631 ath10k_warn(ar, "failed to wake target for write32 of 0x%08x at 0x%08x: %d\n", in ath10k_pci_write32()
637 ath10k_pci_sleep(ar); in ath10k_pci_write32()
640 u32 ath10k_pci_read32(struct ath10k *ar, u32 offset) in ath10k_pci_read32() argument
642 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_read32()
647 ath10k_warn(ar, "refusing to read mmio out of bounds at 0x%08x - 0x%08zx (max 0x%08zx)\n", in ath10k_pci_read32()
652 ret = ath10k_pci_wake(ar); in ath10k_pci_read32()
654 ath10k_warn(ar, "failed to wake target for read32 at 0x%08x: %d\n", in ath10k_pci_read32()
660 ath10k_pci_sleep(ar); in ath10k_pci_read32()
665 u32 ath10k_pci_soc_read32(struct ath10k *ar, u32 addr) in ath10k_pci_soc_read32() argument
667 return ath10k_pci_read32(ar, RTC_SOC_BASE_ADDRESS + addr); in ath10k_pci_soc_read32()
670 void ath10k_pci_soc_write32(struct ath10k *ar, u32 addr, u32 val) in ath10k_pci_soc_write32() argument
672 ath10k_pci_write32(ar, RTC_SOC_BASE_ADDRESS + addr, val); in ath10k_pci_soc_write32()
675 u32 ath10k_pci_reg_read32(struct ath10k *ar, u32 addr) in ath10k_pci_reg_read32() argument
677 return ath10k_pci_read32(ar, PCIE_LOCAL_BASE_ADDRESS + addr); in ath10k_pci_reg_read32()
680 void ath10k_pci_reg_write32(struct ath10k *ar, u32 addr, u32 val) in ath10k_pci_reg_write32() argument
682 ath10k_pci_write32(ar, PCIE_LOCAL_BASE_ADDRESS + addr, val); in ath10k_pci_reg_write32()
685 static bool ath10k_pci_irq_pending(struct ath10k *ar) in ath10k_pci_irq_pending() argument
690 cause = ath10k_pci_read32(ar, SOC_CORE_BASE_ADDRESS + in ath10k_pci_irq_pending()
698 static void ath10k_pci_disable_and_clear_legacy_irq(struct ath10k *ar) in ath10k_pci_disable_and_clear_legacy_irq() argument
703 ath10k_pci_write32(ar, SOC_CORE_BASE_ADDRESS + PCIE_INTR_ENABLE_ADDRESS, in ath10k_pci_disable_and_clear_legacy_irq()
705 ath10k_pci_write32(ar, SOC_CORE_BASE_ADDRESS + PCIE_INTR_CLR_ADDRESS, in ath10k_pci_disable_and_clear_legacy_irq()
710 (void)ath10k_pci_read32(ar, SOC_CORE_BASE_ADDRESS + in ath10k_pci_disable_and_clear_legacy_irq()
714 static void ath10k_pci_enable_legacy_irq(struct ath10k *ar) in ath10k_pci_enable_legacy_irq() argument
716 ath10k_pci_write32(ar, SOC_CORE_BASE_ADDRESS + in ath10k_pci_enable_legacy_irq()
722 (void)ath10k_pci_read32(ar, SOC_CORE_BASE_ADDRESS + in ath10k_pci_enable_legacy_irq()
726 static inline const char *ath10k_pci_get_irq_method(struct ath10k *ar) in ath10k_pci_get_irq_method() argument
728 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_get_irq_method()
741 struct ath10k *ar = pipe->hif_ce_state; in __ath10k_pci_rx_post_buf() local
742 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in __ath10k_pci_rx_post_buf()
754 paddr = dma_map_single(ar->dev, skb->data, in __ath10k_pci_rx_post_buf()
757 if (unlikely(dma_mapping_error(ar->dev, paddr))) { in __ath10k_pci_rx_post_buf()
758 ath10k_warn(ar, "failed to dma map pci rx buf\n"); in __ath10k_pci_rx_post_buf()
769 dma_unmap_single(ar->dev, paddr, skb->len + skb_tailroom(skb), in __ath10k_pci_rx_post_buf()
780 struct ath10k *ar = pipe->hif_ce_state; in ath10k_pci_rx_post_pipe() local
781 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_rx_post_pipe()
799 ath10k_warn(ar, "failed to post pci rx buf: %d\n", ret); in ath10k_pci_rx_post_pipe()
807 static void ath10k_pci_rx_post(struct ath10k *ar) in ath10k_pci_rx_post() argument
809 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_rx_post()
818 struct ath10k *ar = (void *)ptr; in ath10k_pci_rx_replenish_retry() local
820 ath10k_pci_rx_post(ar); in ath10k_pci_rx_replenish_retry()
823 static u32 ath10k_pci_targ_cpu_to_ce_addr(struct ath10k *ar, u32 addr) in ath10k_pci_targ_cpu_to_ce_addr() argument
827 switch (ar->hw_rev) { in ath10k_pci_targ_cpu_to_ce_addr()
831 val = (ath10k_pci_read32(ar, SOC_CORE_BASE_ADDRESS + in ath10k_pci_targ_cpu_to_ce_addr()
836 val = ath10k_pci_read32(ar, PCIE_BAR_REG_ADDRESS); in ath10k_pci_targ_cpu_to_ce_addr()
849 static int ath10k_pci_diag_read_mem(struct ath10k *ar, u32 address, void *data, in ath10k_pci_diag_read_mem() argument
852 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_diag_read_mem()
876 data_buf = (unsigned char *)dma_alloc_coherent(ar->dev, in ath10k_pci_diag_read_mem()
906 address = ath10k_pci_targ_cpu_to_ce_addr(ar, address); in ath10k_pci_diag_read_mem()
954 ath10k_warn(ar, "failed to read diag value at 0x%x: %d\n", in ath10k_pci_diag_read_mem()
958 dma_free_coherent(ar->dev, orig_nbytes, data_buf, in ath10k_pci_diag_read_mem()
966 static int ath10k_pci_diag_read32(struct ath10k *ar, u32 address, u32 *value) in ath10k_pci_diag_read32() argument
971 ret = ath10k_pci_diag_read_mem(ar, address, &val, sizeof(val)); in ath10k_pci_diag_read32()
977 static int __ath10k_pci_diag_read_hi(struct ath10k *ar, void *dest, in __ath10k_pci_diag_read_hi() argument
985 ret = ath10k_pci_diag_read32(ar, host_addr, &addr); in __ath10k_pci_diag_read_hi()
987 ath10k_warn(ar, "failed to get memcpy hi address for firmware address %d: %d\n", in __ath10k_pci_diag_read_hi()
992 ret = ath10k_pci_diag_read_mem(ar, addr, dest, len); in __ath10k_pci_diag_read_hi()
994 ath10k_warn(ar, "failed to memcpy firmware memory from %d (%d B): %d\n", in __ath10k_pci_diag_read_hi()
1002 #define ath10k_pci_diag_read_hi(ar, dest, src, len) \ argument
1003 __ath10k_pci_diag_read_hi(ar, dest, HI_ITEM(src), len)
1005 static int ath10k_pci_diag_write_mem(struct ath10k *ar, u32 address, in ath10k_pci_diag_write_mem() argument
1008 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_diag_write_mem()
1031 data_buf = (unsigned char *)dma_alloc_coherent(ar->dev, in ath10k_pci_diag_write_mem()
1053 address = ath10k_pci_targ_cpu_to_ce_addr(ar, address); in ath10k_pci_diag_write_mem()
1115 dma_free_coherent(ar->dev, orig_nbytes, data_buf, in ath10k_pci_diag_write_mem()
1120 ath10k_warn(ar, "failed to write diag value at 0x%x: %d\n", in ath10k_pci_diag_write_mem()
1128 static int ath10k_pci_diag_write32(struct ath10k *ar, u32 address, u32 value) in ath10k_pci_diag_write32() argument
1132 return ath10k_pci_diag_write_mem(ar, address, &val, sizeof(val)); in ath10k_pci_diag_write32()
1138 struct ath10k *ar = ce_state->ar; in ath10k_pci_htc_tx_cb() local
1152 ath10k_htc_tx_completion_handler(ar, skb); in ath10k_pci_htc_tx_cb()
1156 void (*callback)(struct ath10k *ar, in ath10k_pci_process_rx_cb() argument
1159 struct ath10k *ar = ce_state->ar; in ath10k_pci_process_rx_cb() local
1160 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_process_rx_cb()
1176 dma_unmap_single(ar->dev, ATH10K_SKB_RXCB(skb)->paddr, in ath10k_pci_process_rx_cb()
1180 ath10k_warn(ar, "rxed more than expected (nbytes %d, max %d)", in ath10k_pci_process_rx_cb()
1191 ath10k_dbg(ar, ATH10K_DBG_PCI, "pci rx ce pipe %d len %d\n", in ath10k_pci_process_rx_cb()
1193 ath10k_dbg_dump(ar, ATH10K_DBG_PCI_DUMP, NULL, "pci rx: ", in ath10k_pci_process_rx_cb()
1196 callback(ar, skb); in ath10k_pci_process_rx_cb()
1213 ath10k_ce_per_engine_service(ce_state->ar, 4); in ath10k_pci_htt_htc_rx_cb()
1221 struct ath10k *ar = ce_state->ar; in ath10k_pci_htt_tx_cb() local
1229 dma_unmap_single(ar->dev, ATH10K_SKB_CB(skb)->paddr, in ath10k_pci_htt_tx_cb()
1231 ath10k_htt_hif_tx_complete(ar, skb); in ath10k_pci_htt_tx_cb()
1235 static void ath10k_pci_htt_rx_deliver(struct ath10k *ar, struct sk_buff *skb) in ath10k_pci_htt_rx_deliver() argument
1238 ath10k_htt_t2h_msg_handler(ar, skb); in ath10k_pci_htt_rx_deliver()
1247 ath10k_ce_per_engine_service(ce_state->ar, 4); in ath10k_pci_htt_rx_cb()
1252 static int ath10k_pci_hif_tx_sg(struct ath10k *ar, u8 pipe_id, in ath10k_pci_hif_tx_sg() argument
1255 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_hif_tx_sg()
1277 ath10k_dbg(ar, ATH10K_DBG_PCI, in ath10k_pci_hif_tx_sg()
1280 ath10k_dbg_dump(ar, ATH10K_DBG_PCI_DUMP, NULL, "pci tx data: ", in ath10k_pci_hif_tx_sg()
1295 ath10k_dbg(ar, ATH10K_DBG_PCI, in ath10k_pci_hif_tx_sg()
1298 ath10k_dbg_dump(ar, ATH10K_DBG_PCI_DUMP, NULL, "pci tx data: ", in ath10k_pci_hif_tx_sg()
1321 static int ath10k_pci_hif_diag_read(struct ath10k *ar, u32 address, void *buf, in ath10k_pci_hif_diag_read() argument
1324 return ath10k_pci_diag_read_mem(ar, address, buf, buf_len); in ath10k_pci_hif_diag_read()
1327 static u16 ath10k_pci_hif_get_free_queue_number(struct ath10k *ar, u8 pipe) in ath10k_pci_hif_get_free_queue_number() argument
1329 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_hif_get_free_queue_number()
1331 ath10k_dbg(ar, ATH10K_DBG_PCI, "pci hif get free queue number\n"); in ath10k_pci_hif_get_free_queue_number()
1336 static void ath10k_pci_dump_registers(struct ath10k *ar, in ath10k_pci_dump_registers() argument
1342 lockdep_assert_held(&ar->data_lock); in ath10k_pci_dump_registers()
1344 ret = ath10k_pci_diag_read_hi(ar, ®_dump_values[0], in ath10k_pci_dump_registers()
1348 ath10k_err(ar, "failed to read firmware dump area: %d\n", ret); in ath10k_pci_dump_registers()
1354 ath10k_err(ar, "firmware register dump:\n"); in ath10k_pci_dump_registers()
1356 ath10k_err(ar, "[%02d]: 0x%08X 0x%08X 0x%08X 0x%08X\n", in ath10k_pci_dump_registers()
1370 static void ath10k_pci_fw_crashed_dump(struct ath10k *ar) in ath10k_pci_fw_crashed_dump() argument
1375 spin_lock_bh(&ar->data_lock); in ath10k_pci_fw_crashed_dump()
1377 ar->stats.fw_crash_counter++; in ath10k_pci_fw_crashed_dump()
1379 crash_data = ath10k_debug_get_new_fw_crash_data(ar); in ath10k_pci_fw_crashed_dump()
1386 ath10k_err(ar, "firmware crashed! (uuid %s)\n", uuid); in ath10k_pci_fw_crashed_dump()
1387 ath10k_print_driver_info(ar); in ath10k_pci_fw_crashed_dump()
1388 ath10k_pci_dump_registers(ar, crash_data); in ath10k_pci_fw_crashed_dump()
1390 spin_unlock_bh(&ar->data_lock); in ath10k_pci_fw_crashed_dump()
1392 queue_work(ar->workqueue, &ar->restart_work); in ath10k_pci_fw_crashed_dump()
1395 static void ath10k_pci_hif_send_complete_check(struct ath10k *ar, u8 pipe, in ath10k_pci_hif_send_complete_check() argument
1398 ath10k_dbg(ar, ATH10K_DBG_PCI, "pci hif send complete check\n"); in ath10k_pci_hif_send_complete_check()
1409 resources = ath10k_pci_hif_get_free_queue_number(ar, pipe); in ath10k_pci_hif_send_complete_check()
1418 ath10k_ce_per_engine_service(ar, pipe); in ath10k_pci_hif_send_complete_check()
1421 static void ath10k_pci_kill_tasklet(struct ath10k *ar) in ath10k_pci_kill_tasklet() argument
1423 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_kill_tasklet()
1435 static int ath10k_pci_hif_map_service_to_pipe(struct ath10k *ar, u16 service_id, in ath10k_pci_hif_map_service_to_pipe() argument
1442 ath10k_dbg(ar, ATH10K_DBG_PCI, "pci hif map service\n"); in ath10k_pci_hif_map_service_to_pipe()
1480 static void ath10k_pci_hif_get_default_pipe(struct ath10k *ar, in ath10k_pci_hif_get_default_pipe() argument
1483 ath10k_dbg(ar, ATH10K_DBG_PCI, "pci hif get default pipe\n"); in ath10k_pci_hif_get_default_pipe()
1485 (void)ath10k_pci_hif_map_service_to_pipe(ar, in ath10k_pci_hif_get_default_pipe()
1490 static void ath10k_pci_irq_msi_fw_mask(struct ath10k *ar) in ath10k_pci_irq_msi_fw_mask() argument
1494 switch (ar->hw_rev) { in ath10k_pci_irq_msi_fw_mask()
1498 val = ath10k_pci_read32(ar, SOC_CORE_BASE_ADDRESS + in ath10k_pci_irq_msi_fw_mask()
1501 ath10k_pci_write32(ar, SOC_CORE_BASE_ADDRESS + in ath10k_pci_irq_msi_fw_mask()
1512 static void ath10k_pci_irq_msi_fw_unmask(struct ath10k *ar) in ath10k_pci_irq_msi_fw_unmask() argument
1516 switch (ar->hw_rev) { in ath10k_pci_irq_msi_fw_unmask()
1520 val = ath10k_pci_read32(ar, SOC_CORE_BASE_ADDRESS + in ath10k_pci_irq_msi_fw_unmask()
1523 ath10k_pci_write32(ar, SOC_CORE_BASE_ADDRESS + in ath10k_pci_irq_msi_fw_unmask()
1534 static void ath10k_pci_irq_disable(struct ath10k *ar) in ath10k_pci_irq_disable() argument
1536 ath10k_ce_disable_interrupts(ar); in ath10k_pci_irq_disable()
1537 ath10k_pci_disable_and_clear_legacy_irq(ar); in ath10k_pci_irq_disable()
1538 ath10k_pci_irq_msi_fw_mask(ar); in ath10k_pci_irq_disable()
1541 static void ath10k_pci_irq_sync(struct ath10k *ar) in ath10k_pci_irq_sync() argument
1543 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_irq_sync()
1550 static void ath10k_pci_irq_enable(struct ath10k *ar) in ath10k_pci_irq_enable() argument
1552 ath10k_ce_enable_interrupts(ar); in ath10k_pci_irq_enable()
1553 ath10k_pci_enable_legacy_irq(ar); in ath10k_pci_irq_enable()
1554 ath10k_pci_irq_msi_fw_unmask(ar); in ath10k_pci_irq_enable()
1557 static int ath10k_pci_hif_start(struct ath10k *ar) in ath10k_pci_hif_start() argument
1559 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_hif_start()
1561 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot hif start\n"); in ath10k_pci_hif_start()
1563 ath10k_pci_irq_enable(ar); in ath10k_pci_hif_start()
1564 ath10k_pci_rx_post(ar); in ath10k_pci_hif_start()
1574 struct ath10k *ar; in ath10k_pci_rx_pipe_cleanup() local
1580 ar = pci_pipe->hif_ce_state; in ath10k_pci_rx_pipe_cleanup()
1597 dma_unmap_single(ar->dev, ATH10K_SKB_RXCB(skb)->paddr, in ath10k_pci_rx_pipe_cleanup()
1606 struct ath10k *ar; in ath10k_pci_tx_pipe_cleanup() local
1613 ar = pci_pipe->hif_ce_state; in ath10k_pci_tx_pipe_cleanup()
1614 ar_pci = ath10k_pci_priv(ar); in ath10k_pci_tx_pipe_cleanup()
1631 ath10k_htc_tx_completion_handler(ar, skb); in ath10k_pci_tx_pipe_cleanup()
1643 static void ath10k_pci_buffer_cleanup(struct ath10k *ar) in ath10k_pci_buffer_cleanup() argument
1645 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_buffer_cleanup()
1657 static void ath10k_pci_ce_deinit(struct ath10k *ar) in ath10k_pci_ce_deinit() argument
1662 ath10k_ce_deinit_pipe(ar, i); in ath10k_pci_ce_deinit()
1665 static void ath10k_pci_flush(struct ath10k *ar) in ath10k_pci_flush() argument
1667 ath10k_pci_kill_tasklet(ar); in ath10k_pci_flush()
1668 ath10k_pci_buffer_cleanup(ar); in ath10k_pci_flush()
1671 static void ath10k_pci_hif_stop(struct ath10k *ar) in ath10k_pci_hif_stop() argument
1673 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_hif_stop()
1676 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot hif stop\n"); in ath10k_pci_hif_stop()
1689 ath10k_pci_safe_chip_reset(ar); in ath10k_pci_hif_stop()
1691 ath10k_pci_irq_disable(ar); in ath10k_pci_hif_stop()
1692 ath10k_pci_irq_sync(ar); in ath10k_pci_hif_stop()
1693 ath10k_pci_flush(ar); in ath10k_pci_hif_stop()
1700 static int ath10k_pci_hif_exchange_bmi_msg(struct ath10k *ar, in ath10k_pci_hif_exchange_bmi_msg() argument
1704 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_hif_exchange_bmi_msg()
1727 req_paddr = dma_map_single(ar->dev, treq, req_len, DMA_TO_DEVICE); in ath10k_pci_hif_exchange_bmi_msg()
1728 ret = dma_mapping_error(ar->dev, req_paddr); in ath10k_pci_hif_exchange_bmi_msg()
1741 resp_paddr = dma_map_single(ar->dev, tresp, *resp_len, in ath10k_pci_hif_exchange_bmi_msg()
1743 ret = dma_mapping_error(ar->dev, resp_paddr); in ath10k_pci_hif_exchange_bmi_msg()
1777 dma_unmap_single(ar->dev, resp_paddr, in ath10k_pci_hif_exchange_bmi_msg()
1781 dma_unmap_single(ar->dev, req_paddr, req_len, DMA_TO_DEVICE); in ath10k_pci_hif_exchange_bmi_msg()
1806 struct ath10k *ar = ce_state->ar; in ath10k_pci_bmi_recv_data() local
1821 ath10k_warn(ar, "unexpected: BMI data received; ignoring\n"); in ath10k_pci_bmi_recv_data()
1852 static int ath10k_pci_wake_target_cpu(struct ath10k *ar) in ath10k_pci_wake_target_cpu() argument
1857 val = ath10k_pci_read32(ar, addr); in ath10k_pci_wake_target_cpu()
1859 ath10k_pci_write32(ar, addr, val); in ath10k_pci_wake_target_cpu()
1864 static int ath10k_pci_get_num_banks(struct ath10k *ar) in ath10k_pci_get_num_banks() argument
1866 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_get_num_banks()
1874 switch (MS(ar->chip_id, SOC_CHIP_ID_REV)) { in ath10k_pci_get_num_banks()
1892 ath10k_warn(ar, "unknown number of banks, assuming 1\n"); in ath10k_pci_get_num_banks()
1896 static int ath10k_pci_init_config(struct ath10k *ar) in ath10k_pci_init_config() argument
1914 ret = ath10k_pci_diag_read32(ar, interconnect_targ_addr, in ath10k_pci_init_config()
1917 ath10k_err(ar, "Failed to get pcie state addr: %d\n", ret); in ath10k_pci_init_config()
1923 ath10k_err(ar, "Invalid pcie state addr\n"); in ath10k_pci_init_config()
1927 ret = ath10k_pci_diag_read32(ar, (pcie_state_targ_addr + in ath10k_pci_init_config()
1932 ath10k_err(ar, "Failed to get pipe cfg addr: %d\n", ret); in ath10k_pci_init_config()
1938 ath10k_err(ar, "Invalid pipe cfg addr\n"); in ath10k_pci_init_config()
1942 ret = ath10k_pci_diag_write_mem(ar, pipe_cfg_targ_addr, in ath10k_pci_init_config()
1948 ath10k_err(ar, "Failed to write pipe cfg: %d\n", ret); in ath10k_pci_init_config()
1952 ret = ath10k_pci_diag_read32(ar, (pcie_state_targ_addr + in ath10k_pci_init_config()
1957 ath10k_err(ar, "Failed to get svc/pipe map: %d\n", ret); in ath10k_pci_init_config()
1963 ath10k_err(ar, "Invalid svc_to_pipe map\n"); in ath10k_pci_init_config()
1967 ret = ath10k_pci_diag_write_mem(ar, svc_to_pipe_map, in ath10k_pci_init_config()
1971 ath10k_err(ar, "Failed to write svc/pipe map: %d\n", ret); in ath10k_pci_init_config()
1975 ret = ath10k_pci_diag_read32(ar, (pcie_state_targ_addr + in ath10k_pci_init_config()
1980 ath10k_err(ar, "Failed to get pcie config_flags: %d\n", ret); in ath10k_pci_init_config()
1986 ret = ath10k_pci_diag_write32(ar, (pcie_state_targ_addr + in ath10k_pci_init_config()
1991 ath10k_err(ar, "Failed to write pcie config_flags: %d\n", ret); in ath10k_pci_init_config()
1998 ret = ath10k_pci_diag_read32(ar, ealloc_targ_addr, &ealloc_value); in ath10k_pci_init_config()
2000 ath10k_err(ar, "Faile to get early alloc val: %d\n", ret); in ath10k_pci_init_config()
2007 ealloc_value |= ((ath10k_pci_get_num_banks(ar) << in ath10k_pci_init_config()
2011 ret = ath10k_pci_diag_write32(ar, ealloc_targ_addr, ealloc_value); in ath10k_pci_init_config()
2013 ath10k_err(ar, "Failed to set early alloc val: %d\n", ret); in ath10k_pci_init_config()
2020 ret = ath10k_pci_diag_read32(ar, flag2_targ_addr, &flag2_value); in ath10k_pci_init_config()
2022 ath10k_err(ar, "Failed to get option val: %d\n", ret); in ath10k_pci_init_config()
2028 ret = ath10k_pci_diag_write32(ar, flag2_targ_addr, flag2_value); in ath10k_pci_init_config()
2030 ath10k_err(ar, "Failed to set option val: %d\n", ret); in ath10k_pci_init_config()
2037 static void ath10k_pci_override_ce_config(struct ath10k *ar) in ath10k_pci_override_ce_config() argument
2060 static int ath10k_pci_alloc_pipes(struct ath10k *ar) in ath10k_pci_alloc_pipes() argument
2062 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_alloc_pipes()
2070 pipe->hif_ce_state = ar; in ath10k_pci_alloc_pipes()
2072 ret = ath10k_ce_alloc_pipe(ar, i, &host_ce_config_wlan[i]); in ath10k_pci_alloc_pipes()
2074 ath10k_err(ar, "failed to allocate copy engine pipe %d: %d\n", in ath10k_pci_alloc_pipes()
2091 static void ath10k_pci_free_pipes(struct ath10k *ar) in ath10k_pci_free_pipes() argument
2096 ath10k_ce_free_pipe(ar, i); in ath10k_pci_free_pipes()
2099 static int ath10k_pci_init_pipes(struct ath10k *ar) in ath10k_pci_init_pipes() argument
2104 ret = ath10k_ce_init_pipe(ar, i, &host_ce_config_wlan[i]); in ath10k_pci_init_pipes()
2106 ath10k_err(ar, "failed to initialize copy engine pipe %d: %d\n", in ath10k_pci_init_pipes()
2115 static bool ath10k_pci_has_fw_crashed(struct ath10k *ar) in ath10k_pci_has_fw_crashed() argument
2117 return ath10k_pci_read32(ar, FW_INDICATOR_ADDRESS) & in ath10k_pci_has_fw_crashed()
2121 static void ath10k_pci_fw_crashed_clear(struct ath10k *ar) in ath10k_pci_fw_crashed_clear() argument
2125 val = ath10k_pci_read32(ar, FW_INDICATOR_ADDRESS); in ath10k_pci_fw_crashed_clear()
2127 ath10k_pci_write32(ar, FW_INDICATOR_ADDRESS, val); in ath10k_pci_fw_crashed_clear()
2131 static void ath10k_pci_warm_reset_si0(struct ath10k *ar) in ath10k_pci_warm_reset_si0() argument
2135 val = ath10k_pci_soc_read32(ar, SOC_RESET_CONTROL_ADDRESS); in ath10k_pci_warm_reset_si0()
2136 ath10k_pci_soc_write32(ar, SOC_RESET_CONTROL_ADDRESS, in ath10k_pci_warm_reset_si0()
2138 val = ath10k_pci_soc_read32(ar, SOC_RESET_CONTROL_ADDRESS); in ath10k_pci_warm_reset_si0()
2142 val = ath10k_pci_soc_read32(ar, SOC_RESET_CONTROL_ADDRESS); in ath10k_pci_warm_reset_si0()
2143 ath10k_pci_soc_write32(ar, SOC_RESET_CONTROL_ADDRESS, in ath10k_pci_warm_reset_si0()
2145 val = ath10k_pci_soc_read32(ar, SOC_RESET_CONTROL_ADDRESS); in ath10k_pci_warm_reset_si0()
2150 static void ath10k_pci_warm_reset_cpu(struct ath10k *ar) in ath10k_pci_warm_reset_cpu() argument
2154 ath10k_pci_write32(ar, FW_INDICATOR_ADDRESS, 0); in ath10k_pci_warm_reset_cpu()
2156 val = ath10k_pci_read32(ar, RTC_SOC_BASE_ADDRESS + in ath10k_pci_warm_reset_cpu()
2158 ath10k_pci_write32(ar, RTC_SOC_BASE_ADDRESS + SOC_RESET_CONTROL_ADDRESS, in ath10k_pci_warm_reset_cpu()
2162 static void ath10k_pci_warm_reset_ce(struct ath10k *ar) in ath10k_pci_warm_reset_ce() argument
2166 val = ath10k_pci_read32(ar, RTC_SOC_BASE_ADDRESS + in ath10k_pci_warm_reset_ce()
2169 ath10k_pci_write32(ar, RTC_SOC_BASE_ADDRESS + SOC_RESET_CONTROL_ADDRESS, in ath10k_pci_warm_reset_ce()
2172 ath10k_pci_write32(ar, RTC_SOC_BASE_ADDRESS + SOC_RESET_CONTROL_ADDRESS, in ath10k_pci_warm_reset_ce()
2176 static void ath10k_pci_warm_reset_clear_lf(struct ath10k *ar) in ath10k_pci_warm_reset_clear_lf() argument
2180 val = ath10k_pci_read32(ar, RTC_SOC_BASE_ADDRESS + in ath10k_pci_warm_reset_clear_lf()
2182 ath10k_pci_write32(ar, RTC_SOC_BASE_ADDRESS + in ath10k_pci_warm_reset_clear_lf()
2187 static int ath10k_pci_warm_reset(struct ath10k *ar) in ath10k_pci_warm_reset() argument
2191 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot warm reset\n"); in ath10k_pci_warm_reset()
2193 spin_lock_bh(&ar->data_lock); in ath10k_pci_warm_reset()
2194 ar->stats.fw_warm_reset_counter++; in ath10k_pci_warm_reset()
2195 spin_unlock_bh(&ar->data_lock); in ath10k_pci_warm_reset()
2197 ath10k_pci_irq_disable(ar); in ath10k_pci_warm_reset()
2204 ath10k_pci_warm_reset_si0(ar); in ath10k_pci_warm_reset()
2205 ath10k_pci_warm_reset_cpu(ar); in ath10k_pci_warm_reset()
2206 ath10k_pci_init_pipes(ar); in ath10k_pci_warm_reset()
2207 ath10k_pci_wait_for_target_init(ar); in ath10k_pci_warm_reset()
2209 ath10k_pci_warm_reset_clear_lf(ar); in ath10k_pci_warm_reset()
2210 ath10k_pci_warm_reset_ce(ar); in ath10k_pci_warm_reset()
2211 ath10k_pci_warm_reset_cpu(ar); in ath10k_pci_warm_reset()
2212 ath10k_pci_init_pipes(ar); in ath10k_pci_warm_reset()
2214 ret = ath10k_pci_wait_for_target_init(ar); in ath10k_pci_warm_reset()
2216 ath10k_warn(ar, "failed to wait for target init: %d\n", ret); in ath10k_pci_warm_reset()
2220 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot warm reset complete\n"); in ath10k_pci_warm_reset()
2225 static int ath10k_pci_safe_chip_reset(struct ath10k *ar) in ath10k_pci_safe_chip_reset() argument
2227 if (QCA_REV_988X(ar) || QCA_REV_6174(ar)) { in ath10k_pci_safe_chip_reset()
2228 return ath10k_pci_warm_reset(ar); in ath10k_pci_safe_chip_reset()
2229 } else if (QCA_REV_99X0(ar)) { in ath10k_pci_safe_chip_reset()
2230 ath10k_pci_irq_disable(ar); in ath10k_pci_safe_chip_reset()
2231 return ath10k_pci_qca99x0_chip_reset(ar); in ath10k_pci_safe_chip_reset()
2237 static int ath10k_pci_qca988x_chip_reset(struct ath10k *ar) in ath10k_pci_qca988x_chip_reset() argument
2242 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot 988x chip reset\n"); in ath10k_pci_qca988x_chip_reset()
2252 ret = ath10k_pci_warm_reset(ar); in ath10k_pci_qca988x_chip_reset()
2254 ath10k_warn(ar, "failed to warm reset attempt %d of %d: %d\n", in ath10k_pci_qca988x_chip_reset()
2269 ret = ath10k_pci_init_pipes(ar); in ath10k_pci_qca988x_chip_reset()
2271 ath10k_warn(ar, "failed to init copy engine: %d\n", in ath10k_pci_qca988x_chip_reset()
2276 ret = ath10k_pci_diag_read32(ar, QCA988X_HOST_INTEREST_ADDRESS, in ath10k_pci_qca988x_chip_reset()
2279 ath10k_warn(ar, "failed to poke copy engine: %d\n", in ath10k_pci_qca988x_chip_reset()
2284 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot chip reset complete (warm)\n"); in ath10k_pci_qca988x_chip_reset()
2289 ath10k_warn(ar, "refusing cold reset as requested\n"); in ath10k_pci_qca988x_chip_reset()
2293 ret = ath10k_pci_cold_reset(ar); in ath10k_pci_qca988x_chip_reset()
2295 ath10k_warn(ar, "failed to cold reset: %d\n", ret); in ath10k_pci_qca988x_chip_reset()
2299 ret = ath10k_pci_wait_for_target_init(ar); in ath10k_pci_qca988x_chip_reset()
2301 ath10k_warn(ar, "failed to wait for target after cold reset: %d\n", in ath10k_pci_qca988x_chip_reset()
2306 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot qca988x chip reset complete (cold)\n"); in ath10k_pci_qca988x_chip_reset()
2311 static int ath10k_pci_qca6174_chip_reset(struct ath10k *ar) in ath10k_pci_qca6174_chip_reset() argument
2315 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot qca6174 chip reset\n"); in ath10k_pci_qca6174_chip_reset()
2319 ret = ath10k_pci_cold_reset(ar); in ath10k_pci_qca6174_chip_reset()
2321 ath10k_warn(ar, "failed to cold reset: %d\n", ret); in ath10k_pci_qca6174_chip_reset()
2325 ret = ath10k_pci_wait_for_target_init(ar); in ath10k_pci_qca6174_chip_reset()
2327 ath10k_warn(ar, "failed to wait for target after cold reset: %d\n", in ath10k_pci_qca6174_chip_reset()
2332 ret = ath10k_pci_warm_reset(ar); in ath10k_pci_qca6174_chip_reset()
2334 ath10k_warn(ar, "failed to warm reset: %d\n", ret); in ath10k_pci_qca6174_chip_reset()
2338 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot qca6174 chip reset complete (cold)\n"); in ath10k_pci_qca6174_chip_reset()
2343 static int ath10k_pci_qca99x0_chip_reset(struct ath10k *ar) in ath10k_pci_qca99x0_chip_reset() argument
2347 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot qca99x0 chip reset\n"); in ath10k_pci_qca99x0_chip_reset()
2349 ret = ath10k_pci_cold_reset(ar); in ath10k_pci_qca99x0_chip_reset()
2351 ath10k_warn(ar, "failed to cold reset: %d\n", ret); in ath10k_pci_qca99x0_chip_reset()
2355 ret = ath10k_pci_wait_for_target_init(ar); in ath10k_pci_qca99x0_chip_reset()
2357 ath10k_warn(ar, "failed to wait for target after cold reset: %d\n", in ath10k_pci_qca99x0_chip_reset()
2362 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot qca99x0 chip reset complete (cold)\n"); in ath10k_pci_qca99x0_chip_reset()
2367 static int ath10k_pci_chip_reset(struct ath10k *ar) in ath10k_pci_chip_reset() argument
2369 if (QCA_REV_988X(ar)) in ath10k_pci_chip_reset()
2370 return ath10k_pci_qca988x_chip_reset(ar); in ath10k_pci_chip_reset()
2371 else if (QCA_REV_6174(ar)) in ath10k_pci_chip_reset()
2372 return ath10k_pci_qca6174_chip_reset(ar); in ath10k_pci_chip_reset()
2373 else if (QCA_REV_9377(ar)) in ath10k_pci_chip_reset()
2374 return ath10k_pci_qca6174_chip_reset(ar); in ath10k_pci_chip_reset()
2375 else if (QCA_REV_99X0(ar)) in ath10k_pci_chip_reset()
2376 return ath10k_pci_qca99x0_chip_reset(ar); in ath10k_pci_chip_reset()
2381 static int ath10k_pci_hif_power_up(struct ath10k *ar) in ath10k_pci_hif_power_up() argument
2383 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_hif_power_up()
2386 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot hif power up\n"); in ath10k_pci_hif_power_up()
2403 ret = ath10k_pci_chip_reset(ar); in ath10k_pci_hif_power_up()
2405 if (ath10k_pci_has_fw_crashed(ar)) { in ath10k_pci_hif_power_up()
2406 ath10k_warn(ar, "firmware crashed during chip reset\n"); in ath10k_pci_hif_power_up()
2407 ath10k_pci_fw_crashed_clear(ar); in ath10k_pci_hif_power_up()
2408 ath10k_pci_fw_crashed_dump(ar); in ath10k_pci_hif_power_up()
2411 ath10k_err(ar, "failed to reset chip: %d\n", ret); in ath10k_pci_hif_power_up()
2415 ret = ath10k_pci_init_pipes(ar); in ath10k_pci_hif_power_up()
2417 ath10k_err(ar, "failed to initialize CE: %d\n", ret); in ath10k_pci_hif_power_up()
2421 ret = ath10k_pci_init_config(ar); in ath10k_pci_hif_power_up()
2423 ath10k_err(ar, "failed to setup init config: %d\n", ret); in ath10k_pci_hif_power_up()
2427 ret = ath10k_pci_wake_target_cpu(ar); in ath10k_pci_hif_power_up()
2429 ath10k_err(ar, "could not wake up target CPU: %d\n", ret); in ath10k_pci_hif_power_up()
2436 ath10k_pci_ce_deinit(ar); in ath10k_pci_hif_power_up()
2442 static void ath10k_pci_hif_power_down(struct ath10k *ar) in ath10k_pci_hif_power_down() argument
2444 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot hif power down\n"); in ath10k_pci_hif_power_down()
2453 static int ath10k_pci_hif_suspend(struct ath10k *ar) in ath10k_pci_hif_suspend() argument
2460 ath10k_pci_sleep_sync(ar); in ath10k_pci_hif_suspend()
2465 static int ath10k_pci_hif_resume(struct ath10k *ar) in ath10k_pci_hif_resume() argument
2467 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_hif_resume()
2473 ret = ath10k_pci_force_wake(ar); in ath10k_pci_hif_resume()
2475 ath10k_err(ar, "failed to wake up target: %d\n", ret); in ath10k_pci_hif_resume()
2519 ath10k_ce_per_engine_service(ar_pci->ar, pipe->pipe_num); in ath10k_pci_ce_tasklet()
2524 struct ath10k *ar = (struct ath10k *)data; in ath10k_msi_err_tasklet() local
2526 if (!ath10k_pci_has_fw_crashed(ar)) { in ath10k_msi_err_tasklet()
2527 ath10k_warn(ar, "received unsolicited fw crash interrupt\n"); in ath10k_msi_err_tasklet()
2531 ath10k_pci_irq_disable(ar); in ath10k_msi_err_tasklet()
2532 ath10k_pci_fw_crashed_clear(ar); in ath10k_msi_err_tasklet()
2533 ath10k_pci_fw_crashed_dump(ar); in ath10k_msi_err_tasklet()
2542 struct ath10k *ar = arg; in ath10k_pci_per_engine_handler() local
2543 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_per_engine_handler()
2547 ath10k_warn(ar, "unexpected/invalid irq %d ce_id %d\n", irq, in ath10k_pci_per_engine_handler()
2566 struct ath10k *ar = arg; in ath10k_pci_msi_fw_handler() local
2567 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_msi_fw_handler()
2580 struct ath10k *ar = arg; in ath10k_pci_interrupt_handler() local
2581 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_interrupt_handler()
2585 ret = ath10k_pci_force_wake(ar); in ath10k_pci_interrupt_handler()
2587 ath10k_warn(ar, "failed to wake device up on irq: %d\n", in ath10k_pci_interrupt_handler()
2594 if (!ath10k_pci_irq_pending(ar)) in ath10k_pci_interrupt_handler()
2597 ath10k_pci_disable_and_clear_legacy_irq(ar); in ath10k_pci_interrupt_handler()
2607 struct ath10k *ar = (struct ath10k *)data; in ath10k_pci_tasklet() local
2608 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_tasklet()
2610 if (ath10k_pci_has_fw_crashed(ar)) { in ath10k_pci_tasklet()
2611 ath10k_pci_irq_disable(ar); in ath10k_pci_tasklet()
2612 ath10k_pci_fw_crashed_clear(ar); in ath10k_pci_tasklet()
2613 ath10k_pci_fw_crashed_dump(ar); in ath10k_pci_tasklet()
2617 ath10k_ce_per_engine_service_any(ar); in ath10k_pci_tasklet()
2621 ath10k_pci_enable_legacy_irq(ar); in ath10k_pci_tasklet()
2624 static int ath10k_pci_request_irq_msix(struct ath10k *ar) in ath10k_pci_request_irq_msix() argument
2626 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_request_irq_msix()
2631 IRQF_SHARED, "ath10k_pci", ar); in ath10k_pci_request_irq_msix()
2633 ath10k_warn(ar, "failed to request MSI-X fw irq %d: %d\n", in ath10k_pci_request_irq_msix()
2641 IRQF_SHARED, "ath10k_pci", ar); in ath10k_pci_request_irq_msix()
2643 ath10k_warn(ar, "failed to request MSI-X ce irq %d: %d\n", in ath10k_pci_request_irq_msix()
2647 free_irq(ar_pci->pdev->irq + i, ar); in ath10k_pci_request_irq_msix()
2649 free_irq(ar_pci->pdev->irq + MSI_ASSIGN_FW, ar); in ath10k_pci_request_irq_msix()
2657 static int ath10k_pci_request_irq_msi(struct ath10k *ar) in ath10k_pci_request_irq_msi() argument
2659 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_request_irq_msi()
2664 IRQF_SHARED, "ath10k_pci", ar); in ath10k_pci_request_irq_msi()
2666 ath10k_warn(ar, "failed to request MSI irq %d: %d\n", in ath10k_pci_request_irq_msi()
2674 static int ath10k_pci_request_irq_legacy(struct ath10k *ar) in ath10k_pci_request_irq_legacy() argument
2676 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_request_irq_legacy()
2681 IRQF_SHARED, "ath10k_pci", ar); in ath10k_pci_request_irq_legacy()
2683 ath10k_warn(ar, "failed to request legacy irq %d: %d\n", in ath10k_pci_request_irq_legacy()
2691 static int ath10k_pci_request_irq(struct ath10k *ar) in ath10k_pci_request_irq() argument
2693 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_request_irq()
2697 return ath10k_pci_request_irq_legacy(ar); in ath10k_pci_request_irq()
2699 return ath10k_pci_request_irq_msi(ar); in ath10k_pci_request_irq()
2701 return ath10k_pci_request_irq_msix(ar); in ath10k_pci_request_irq()
2705 static void ath10k_pci_free_irq(struct ath10k *ar) in ath10k_pci_free_irq() argument
2707 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_free_irq()
2713 free_irq(ar_pci->pdev->irq + i, ar); in ath10k_pci_free_irq()
2716 static void ath10k_pci_init_irq_tasklets(struct ath10k *ar) in ath10k_pci_init_irq_tasklets() argument
2718 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_init_irq_tasklets()
2721 tasklet_init(&ar_pci->intr_tq, ath10k_pci_tasklet, (unsigned long)ar); in ath10k_pci_init_irq_tasklets()
2723 (unsigned long)ar); in ath10k_pci_init_irq_tasklets()
2732 static int ath10k_pci_init_irq(struct ath10k *ar) in ath10k_pci_init_irq() argument
2734 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_init_irq()
2737 ath10k_pci_init_irq_tasklets(ar); in ath10k_pci_init_irq()
2740 ath10k_info(ar, "limiting irq mode to: %d\n", in ath10k_pci_init_irq()
2774 ath10k_pci_write32(ar, SOC_CORE_BASE_ADDRESS + PCIE_INTR_ENABLE_ADDRESS, in ath10k_pci_init_irq()
2780 static void ath10k_pci_deinit_irq_legacy(struct ath10k *ar) in ath10k_pci_deinit_irq_legacy() argument
2782 ath10k_pci_write32(ar, SOC_CORE_BASE_ADDRESS + PCIE_INTR_ENABLE_ADDRESS, in ath10k_pci_deinit_irq_legacy()
2786 static int ath10k_pci_deinit_irq(struct ath10k *ar) in ath10k_pci_deinit_irq() argument
2788 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_deinit_irq()
2792 ath10k_pci_deinit_irq_legacy(ar); in ath10k_pci_deinit_irq()
2802 static int ath10k_pci_wait_for_target_init(struct ath10k *ar) in ath10k_pci_wait_for_target_init() argument
2804 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_wait_for_target_init()
2808 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot waiting target to initialise\n"); in ath10k_pci_wait_for_target_init()
2813 val = ath10k_pci_read32(ar, FW_INDICATOR_ADDRESS); in ath10k_pci_wait_for_target_init()
2815 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot target indicator %x\n", in ath10k_pci_wait_for_target_init()
2831 ath10k_pci_enable_legacy_irq(ar); in ath10k_pci_wait_for_target_init()
2836 ath10k_pci_disable_and_clear_legacy_irq(ar); in ath10k_pci_wait_for_target_init()
2837 ath10k_pci_irq_msi_fw_mask(ar); in ath10k_pci_wait_for_target_init()
2840 ath10k_err(ar, "failed to read device register, device is gone\n"); in ath10k_pci_wait_for_target_init()
2845 ath10k_warn(ar, "device has crashed during init\n"); in ath10k_pci_wait_for_target_init()
2850 ath10k_err(ar, "failed to receive initialized event from target: %08x\n", in ath10k_pci_wait_for_target_init()
2855 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot target initialised\n"); in ath10k_pci_wait_for_target_init()
2859 static int ath10k_pci_cold_reset(struct ath10k *ar) in ath10k_pci_cold_reset() argument
2863 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot cold reset\n"); in ath10k_pci_cold_reset()
2865 spin_lock_bh(&ar->data_lock); in ath10k_pci_cold_reset()
2867 ar->stats.fw_cold_reset_counter++; in ath10k_pci_cold_reset()
2869 spin_unlock_bh(&ar->data_lock); in ath10k_pci_cold_reset()
2872 val = ath10k_pci_reg_read32(ar, SOC_GLOBAL_RESET_ADDRESS); in ath10k_pci_cold_reset()
2874 ath10k_pci_reg_write32(ar, SOC_GLOBAL_RESET_ADDRESS, val); in ath10k_pci_cold_reset()
2885 ath10k_pci_reg_write32(ar, SOC_GLOBAL_RESET_ADDRESS, val); in ath10k_pci_cold_reset()
2889 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot cold reset complete\n"); in ath10k_pci_cold_reset()
2894 static int ath10k_pci_claim(struct ath10k *ar) in ath10k_pci_claim() argument
2896 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_claim()
2900 pci_set_drvdata(pdev, ar); in ath10k_pci_claim()
2904 ath10k_err(ar, "failed to enable pci device: %d\n", ret); in ath10k_pci_claim()
2910 ath10k_err(ar, "failed to request region BAR%d: %d\n", BAR_NUM, in ath10k_pci_claim()
2918 ath10k_err(ar, "failed to set dma mask to 32-bit: %d\n", ret); in ath10k_pci_claim()
2924 ath10k_err(ar, "failed to set consistent dma mask to 32-bit: %d\n", in ath10k_pci_claim()
2935 ath10k_err(ar, "failed to iomap BAR%d\n", BAR_NUM); in ath10k_pci_claim()
2940 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot pci_mem 0x%p\n", ar_pci->mem); in ath10k_pci_claim()
2955 static void ath10k_pci_release(struct ath10k *ar) in ath10k_pci_release() argument
2957 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_release()
2987 struct ath10k *ar; in ath10k_pci_probe() local
3016 ar = ath10k_core_create(sizeof(*ar_pci), &pdev->dev, ATH10K_BUS_PCI, in ath10k_pci_probe()
3018 if (!ar) { in ath10k_pci_probe()
3023 ath10k_dbg(ar, ATH10K_DBG_BOOT, "pci probe %04x:%04x %04x:%04x\n", in ath10k_pci_probe()
3027 ar_pci = ath10k_pci_priv(ar); in ath10k_pci_probe()
3030 ar_pci->ar = ar; in ath10k_pci_probe()
3031 ar->dev_id = pci_dev->device; in ath10k_pci_probe()
3034 ar->id.vendor = pdev->vendor; in ath10k_pci_probe()
3035 ar->id.device = pdev->device; in ath10k_pci_probe()
3036 ar->id.subsystem_vendor = pdev->subsystem_vendor; in ath10k_pci_probe()
3037 ar->id.subsystem_device = pdev->subsystem_device; in ath10k_pci_probe()
3043 (unsigned long)ar); in ath10k_pci_probe()
3045 (unsigned long)ar); in ath10k_pci_probe()
3047 ret = ath10k_pci_claim(ar); in ath10k_pci_probe()
3049 ath10k_err(ar, "failed to claim device: %d\n", ret); in ath10k_pci_probe()
3053 if (QCA_REV_6174(ar)) in ath10k_pci_probe()
3054 ath10k_pci_override_ce_config(ar); in ath10k_pci_probe()
3056 ret = ath10k_pci_alloc_pipes(ar); in ath10k_pci_probe()
3058 ath10k_err(ar, "failed to allocate copy engine pipes: %d\n", in ath10k_pci_probe()
3063 ath10k_pci_ce_deinit(ar); in ath10k_pci_probe()
3064 ath10k_pci_irq_disable(ar); in ath10k_pci_probe()
3067 ret = ath10k_pci_force_wake(ar); in ath10k_pci_probe()
3069 ath10k_warn(ar, "failed to wake up device : %d\n", ret); in ath10k_pci_probe()
3074 ret = ath10k_pci_init_irq(ar); in ath10k_pci_probe()
3076 ath10k_err(ar, "failed to init irqs: %d\n", ret); in ath10k_pci_probe()
3080 ath10k_info(ar, "pci irq %s interrupts %d irq_mode %d reset_mode %d\n", in ath10k_pci_probe()
3081 ath10k_pci_get_irq_method(ar), ar_pci->num_msi_intrs, in ath10k_pci_probe()
3084 ret = ath10k_pci_request_irq(ar); in ath10k_pci_probe()
3086 ath10k_warn(ar, "failed to request irqs: %d\n", ret); in ath10k_pci_probe()
3090 ret = ath10k_pci_chip_reset(ar); in ath10k_pci_probe()
3092 ath10k_err(ar, "failed to reset chip: %d\n", ret); in ath10k_pci_probe()
3096 chip_id = ath10k_pci_soc_read32(ar, SOC_CHIP_ID_ADDRESS); in ath10k_pci_probe()
3098 ath10k_err(ar, "failed to get chip id\n"); in ath10k_pci_probe()
3103 ath10k_err(ar, "device %04x with chip_id %08x isn't supported\n", in ath10k_pci_probe()
3108 ret = ath10k_core_register(ar, chip_id); in ath10k_pci_probe()
3110 ath10k_err(ar, "failed to register driver core: %d\n", ret); in ath10k_pci_probe()
3117 ath10k_pci_free_irq(ar); in ath10k_pci_probe()
3118 ath10k_pci_kill_tasklet(ar); in ath10k_pci_probe()
3121 ath10k_pci_deinit_irq(ar); in ath10k_pci_probe()
3124 ath10k_pci_free_pipes(ar); in ath10k_pci_probe()
3127 ath10k_pci_sleep_sync(ar); in ath10k_pci_probe()
3128 ath10k_pci_release(ar); in ath10k_pci_probe()
3131 ath10k_core_destroy(ar); in ath10k_pci_probe()
3138 struct ath10k *ar = pci_get_drvdata(pdev); in ath10k_pci_remove() local
3141 ath10k_dbg(ar, ATH10K_DBG_PCI, "pci remove\n"); in ath10k_pci_remove()
3143 if (!ar) in ath10k_pci_remove()
3146 ar_pci = ath10k_pci_priv(ar); in ath10k_pci_remove()
3151 ath10k_core_unregister(ar); in ath10k_pci_remove()
3152 ath10k_pci_free_irq(ar); in ath10k_pci_remove()
3153 ath10k_pci_kill_tasklet(ar); in ath10k_pci_remove()
3154 ath10k_pci_deinit_irq(ar); in ath10k_pci_remove()
3155 ath10k_pci_ce_deinit(ar); in ath10k_pci_remove()
3156 ath10k_pci_free_pipes(ar); in ath10k_pci_remove()
3157 ath10k_pci_sleep_sync(ar); in ath10k_pci_remove()
3158 ath10k_pci_release(ar); in ath10k_pci_remove()
3159 ath10k_core_destroy(ar); in ath10k_pci_remove()