180 		sca_out(0, transmit ? DSR_TX(phy_node(port)) :  in sca_init_port()
183 		sca_out(DCR_ABORT, transmit ? DCR_TX(phy_node(port)) :  in sca_init_port()
187 		sca_out(0, dmac + CPB, card); /* pointer base */  in sca_init_port()
197 		sca_out(DCR_CLEAR_EOF, transmit ? DCR_TX(phy_node(port)) :  in sca_init_port()
204 			sca_out(0x14, DMR_RX(phy_node(port)), card);  in sca_init_port()
205 			sca_out(DIR_EOME | DIR_BOFE, DIR_RX(phy_node(port)),  in sca_init_port()
208 			sca_out(DSR_DE, DSR_RX(phy_node(port)), card);  in sca_init_port()
211 			sca_out(0x14, DMR_TX(phy_node(port)), card);  in sca_init_port()
213 			sca_out(DIR_BOFE, DIR_TX(phy_node(port)), card);  in sca_init_port()
229 	sca_out(stat & (ST1_UDRN | ST1_CDCD), msci + ST1, card);  in sca_msci_intr()
298 	sca_out((stat & (DSR_EOT | DSR_EOM | DSR_BOF | DSR_COF)) | DSR_DWE,  in sca_rx_intr()
337 	sca_out(DSR_DE, DSR_RX(phy_node(port)), card);  in sca_rx_intr()
354 	sca_out((stat & (DSR_EOT | DSR_EOM | DSR_BOF | DSR_COF)) | DSR_DWE,  in sca_tx_intr()
444 	sca_out(port->tmc, msci + TMC, card);  in sca_set_port()
447 	sca_out(port->rxs, msci + RXS, card);  in sca_set_port()
448 	sca_out(port->txs, msci + TXS, card);  in sca_set_port()
455 	sca_out(md2, msci + MD2, card);  in sca_set_port()
486 	sca_out(CMD_RESET, msci + CMD, card);  in sca_open()
487 	sca_out(md0, msci + MD0, card);  in sca_open()
488 	sca_out(0x00, msci + MD1, card); /* no address field check */  in sca_open()
489 	sca_out(md2, msci + MD2, card);  in sca_open()
490 	sca_out(0x7E, msci + IDL, card); /* flag character 0x7E */  in sca_open()
491 	sca_out(CTL_IDLE, msci + CTL, card);  in sca_open()
495 	sca_out(0x07, msci + RRC, card); /* +1=RXRDY/DMA activation condition*/  in sca_open()
496 	sca_out(0x10, msci + TRC0, card); /* = TXRDY/DMA activation condition*/  in sca_open()
497 	sca_out(0x14, msci + TRC1, card); /* +1=TXRDY/DMA deactiv condition */  in sca_open()
506 	sca_out(IE0_TXINT | IE0_RXINTA, msci + IE0, card);  in sca_open()
507 	sca_out(IE1_UDRN | IE1_CDCD, msci + IE1, card);  in sca_open()
508 	sca_out(sca_in(IER0, card) | (phy_node(port) ? 0xC0 : 0x0C),  in sca_open()
511 	sca_out(sca_in(IER1, card) | (phy_node(port) ? 0xF0 : 0x0F),  in sca_open()
514 	sca_out(port->tmc, msci + TMC, card); /* Restore registers */  in sca_open()
515 	sca_out(port->rxs, msci + RXS, card);  in sca_open()
516 	sca_out(port->txs, msci + TXS, card);  in sca_open()
517 	sca_out(CMD_TX_ENABLE, msci + CMD, card);  in sca_open()
518 	sca_out(CMD_RX_ENABLE, msci + CMD, card);  in sca_open()
530 	sca_out(CMD_RESET, get_msci(port) + CMD, port_to_card(port));  in sca_close()
532 	sca_out(sca_in(IER0, card) & (phy_node(port) ? 0x0F : 0xF0),  in sca_close()
535 	sca_out(sca_in(IER1, card) & (phy_node(port) ? 0x0F : 0xF0),  in sca_close()
664 	sca_out(DSR_DE, DSR_TX(phy_node(port)), card); /* Enable TX DMA */  in sca_xmit()
708 	sca_out(wait_states, WCRL, card); /* Wait Control */  in sca_init()
709 	sca_out(wait_states, WCRM, card);  in sca_init()
710 	sca_out(wait_states, WCRH, card);  in sca_init()
712 	sca_out(0, DMER, card);	/* DMA Master disable */  in sca_init()
713 	sca_out(0x03, PCR, card); /* DMA priority */  in sca_init()
714 	sca_out(0, DSR_RX(0), card); /* DMA disable - to halt state */  in sca_init()
715 	sca_out(0, DSR_TX(0), card);  in sca_init()
716 	sca_out(0, DSR_RX(1), card);  in sca_init()
717 	sca_out(0, DSR_TX(1), card);  in sca_init()
718 	sca_out(DMER_DME, DMER, card); /* DMA Master enable */  in sca_init()