Lines Matching refs:win0base
62 u8 __iomem *win0base; /* ISA window base address */ member
87 #define sca_in(reg, card) readb((card)->win0base + C101_SCA + (reg))
88 #define sca_out(value, reg, card) writeb(value, (card)->win0base + C101_SCA + (reg))
89 #define sca_inw(reg, card) readw((card)->win0base + C101_SCA + (reg))
93 writeb(value & 0xFF, (card)->win0base + C101_SCA + (reg)); \
94 writeb((value >> 8 ) & 0xFF, (card)->win0base + C101_SCA + (reg + 1));\
101 #define win0base(card) ((card)->win0base) macro
102 #define winbase(card) ((card)->win0base + 0x2000)
115 writeb(page, card->win0base + C101_PAGE); in openwin()
196 writeb(1, port->win0base + C101_DTR); in c101_open()
219 writeb(0, port->win0base + C101_DTR); in c101_close()
287 readb(card->win0base + C101_PAGE); /* Resets SCA? */ in c101_destroy_card()
292 if (card->win0base) { in c101_destroy_card()
293 iounmap(card->win0base); in c101_destroy_card()
351 card->win0base = ioremap(winbase, C101_MAPPED_RAM_SIZE); in c101_run()
352 if (!card->win0base) { in c101_run()
362 readb(card->win0base + C101_PAGE); /* Resets SCA? */ in c101_run()
364 writeb(0, card->win0base + C101_PAGE); in c101_run()
365 writeb(0, card->win0base + C101_DTR); /* Power-up for RAM? */ in c101_run()