Lines Matching refs:net
56 if (netif_carrier_ok(dev->net) != link) { in asix_status()
58 netdev_dbg(dev->net, "Link Status is: %d\n", link); in asix_status()
65 memcpy(dev->net->dev_addr, addr, ETH_ALEN); in asix_set_netdev_dev_addr()
67 netdev_info(dev->net, "invalid hw address, using random\n"); in asix_set_netdev_dev_addr()
68 eth_hw_addr_random(dev->net); in asix_set_netdev_dev_addr()
81 phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID1); in asix_get_phyid()
92 phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID2); in asix_get_phyid()
101 static u32 asix_get_link(struct net_device *net) in asix_get_link() argument
103 struct usbnet *dev = netdev_priv(net); in asix_get_link()
108 static int asix_ioctl (struct net_device *net, struct ifreq *rq, int cmd) in asix_ioctl() argument
110 struct usbnet *dev = netdev_priv(net); in asix_ioctl()
133 static void ax88172_set_multicast(struct net_device *net) in ax88172_set_multicast() argument
135 struct usbnet *dev = netdev_priv(net); in ax88172_set_multicast()
139 if (net->flags & IFF_PROMISC) { in ax88172_set_multicast()
141 } else if (net->flags & IFF_ALLMULTI || in ax88172_set_multicast()
142 netdev_mc_count(net) > AX_MAX_MCAST) { in ax88172_set_multicast()
144 } else if (netdev_mc_empty(net)) { in ax88172_set_multicast()
157 netdev_for_each_mc_addr(ha, net) { in ax88172_set_multicast()
184 netdev_dbg(dev->net, "ax88172_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n", in ax88172_link_reset()
229 netdev_dbg(dev->net, "read AX_CMD_READ_NODE_ID failed: %d\n", in ax88172_bind()
237 dev->mii.dev = dev->net; in ax88172_bind()
244 dev->net->netdev_ops = &ax88172_netdev_ops; in ax88172_bind()
245 dev->net->ethtool_ops = &ax88172_ethtool_ops; in ax88172_bind()
246 dev->net->needed_headroom = 4; /* cf asix_tx_fixup() */ in ax88172_bind()
247 dev->net->needed_tailroom = 4; /* cf asix_tx_fixup() */ in ax88172_bind()
249 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET); in ax88172_bind()
250 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE, in ax88172_bind()
290 netdev_dbg(dev->net, "ax88772_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n", in ax88772_link_reset()
313 netdev_dbg(dev->net, "Select PHY #1 failed: %d\n", ret); in ax88772_reset()
341 netdev_dbg(dev->net, "RX_CTL is 0x%04x after software reset\n", rx_ctl); in ax88772_reset()
347 netdev_dbg(dev->net, "RX_CTL is 0x%04x setting to 0x0000\n", rx_ctl); in ax88772_reset()
361 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET); in ax88772_reset()
362 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE, in ax88772_reset()
374 netdev_dbg(dev->net, "Write IPG,IPG1,IPG2 failed: %d\n", ret); in ax88772_reset()
379 memcpy(data->mac_addr, dev->net->dev_addr, ETH_ALEN); in ax88772_reset()
391 netdev_dbg(dev->net, "RX_CTL is 0x%04x after all initializations\n", in ax88772_reset()
395 netdev_dbg(dev->net, in ax88772_reset()
440 netdev_dbg(dev->net, "Failed to read MAC address: %d\n", ret); in ax88772_bind()
447 dev->mii.dev = dev->net; in ax88772_bind()
454 dev->net->netdev_ops = &ax88772_netdev_ops; in ax88772_bind()
455 dev->net->ethtool_ops = &ax88772_ethtool_ops; in ax88772_bind()
456 dev->net->needed_headroom = 4; /* cf asix_tx_fixup() */ in ax88772_bind()
457 dev->net->needed_tailroom = 4; /* cf asix_tx_fixup() */ in ax88772_bind()
464 netdev_dbg(dev->net, "Select PHY #1 failed: %d\n", ret); in ax88772_bind()
472 netdev_dbg(dev->net, "PHYID=0x%08x\n", phyid); in ax88772_bind()
513 netdev_dbg(dev->net, "marvell_phy_init()\n"); in marvell_phy_init()
515 reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_MARVELL_STATUS); in marvell_phy_init()
516 netdev_dbg(dev->net, "MII_MARVELL_STATUS = 0x%04x\n", reg); in marvell_phy_init()
518 asix_mdio_write(dev->net, dev->mii.phy_id, MII_MARVELL_CTRL, in marvell_phy_init()
522 reg = asix_mdio_read(dev->net, dev->mii.phy_id, in marvell_phy_init()
524 netdev_dbg(dev->net, "MII_MARVELL_LED_CTRL (1) = 0x%04x\n", reg); in marvell_phy_init()
528 asix_mdio_write(dev->net, dev->mii.phy_id, in marvell_phy_init()
531 reg = asix_mdio_read(dev->net, dev->mii.phy_id, in marvell_phy_init()
533 netdev_dbg(dev->net, "MII_MARVELL_LED_CTRL (2) = 0x%04x\n", reg); in marvell_phy_init()
544 netdev_dbg(dev->net, "rtl8211cl_phy_init()\n"); in rtl8211cl_phy_init()
546 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0x0005); in rtl8211cl_phy_init()
547 asix_mdio_write (dev->net, dev->mii.phy_id, 0x0c, 0); in rtl8211cl_phy_init()
548 asix_mdio_write (dev->net, dev->mii.phy_id, 0x01, in rtl8211cl_phy_init()
549 asix_mdio_read (dev->net, dev->mii.phy_id, 0x01) | 0x0080); in rtl8211cl_phy_init()
550 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0); in rtl8211cl_phy_init()
553 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0x0002); in rtl8211cl_phy_init()
554 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1a, 0x00cb); in rtl8211cl_phy_init()
555 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0); in rtl8211cl_phy_init()
563 u16 reg = asix_mdio_read(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL); in marvell_led_status()
565 netdev_dbg(dev->net, "marvell_led_status() read 0x%04x\n", reg); in marvell_led_status()
581 netdev_dbg(dev->net, "marvell_led_status() writing 0x%04x\n", reg); in marvell_led_status()
582 asix_mdio_write(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL, reg); in marvell_led_status()
597 netdev_dbg(dev->net, "GPIO Status: 0x%04x\n", status); in ax88178_reset()
603 netdev_dbg(dev->net, "EEPROM index 0x17 is 0x%04x\n", eeprom); in ax88178_reset()
614 netdev_dbg(dev->net, "GPIO0: %d, PhyMode: %d\n", gpio0, data->phymode); in ax88178_reset()
623 netdev_dbg(dev->net, "gpio phymode == 1 path\n"); in ax88178_reset()
630 netdev_dbg(dev->net, "PHYID=0x%08x\n", phyid); in ax88178_reset()
649 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, in ax88178_reset()
651 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE, in ax88178_reset()
653 asix_mdio_write(dev->net, dev->mii.phy_id, MII_CTRL1000, in ax88178_reset()
663 memcpy(data->mac_addr, dev->net->dev_addr, ETH_ALEN); in ax88178_reset()
683 netdev_dbg(dev->net, "ax88178_link_reset()\n"); in ax88178_link_reset()
704 netdev_dbg(dev->net, "ax88178_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n", in ax88178_link_reset()
740 if (dev->net->mtu > 1500) in ax88178_set_mfb()
750 static int ax88178_change_mtu(struct net_device *net, int new_mtu) in ax88178_change_mtu() argument
752 struct usbnet *dev = netdev_priv(net); in ax88178_change_mtu()
753 int ll_mtu = new_mtu + net->hard_header_len + 4; in ax88178_change_mtu()
755 netdev_dbg(dev->net, "ax88178_change_mtu() new_mtu=%d\n", new_mtu); in ax88178_change_mtu()
763 net->mtu = new_mtu; in ax88178_change_mtu()
764 dev->hard_mtu = net->mtu + net->hard_header_len; in ax88178_change_mtu()
795 netdev_dbg(dev->net, "Failed to read MAC address: %d\n", ret); in ax88178_bind()
802 dev->mii.dev = dev->net; in ax88178_bind()
810 dev->net->netdev_ops = &ax88178_netdev_ops; in ax88178_bind()
811 dev->net->ethtool_ops = &ax88178_ethtool_ops; in ax88178_bind()