Lines Matching refs:dev
46 static void asix_status(struct usbnet *dev, struct urb *urb) in asix_status() argument
56 if (netif_carrier_ok(dev->net) != link) { in asix_status()
57 usbnet_link_change(dev, link, 1); in asix_status()
58 netdev_dbg(dev->net, "Link Status is: %d\n", link); in asix_status()
62 static void asix_set_netdev_dev_addr(struct usbnet *dev, u8 *addr) in asix_set_netdev_dev_addr() argument
65 memcpy(dev->net->dev_addr, addr, ETH_ALEN); in asix_set_netdev_dev_addr()
67 netdev_info(dev->net, "invalid hw address, using random\n"); in asix_set_netdev_dev_addr()
68 eth_hw_addr_random(dev->net); in asix_set_netdev_dev_addr()
73 static u32 asix_get_phyid(struct usbnet *dev) in asix_get_phyid() argument
81 phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID1); in asix_get_phyid()
92 phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID2); in asix_get_phyid()
103 struct usbnet *dev = netdev_priv(net); in asix_get_link() local
105 return mii_link_ok(&dev->mii); in asix_get_link()
110 struct usbnet *dev = netdev_priv(net); in asix_ioctl() local
112 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL); in asix_ioctl()
135 struct usbnet *dev = netdev_priv(net); in ax88172_set_multicast() local
136 struct asix_data *data = (struct asix_data *)&dev->data; in ax88172_set_multicast()
163 asix_write_cmd_async(dev, AX_CMD_WRITE_MULTI_FILTER, 0, 0, in ax88172_set_multicast()
169 asix_write_cmd_async(dev, AX_CMD_WRITE_RX_CTL, rx_ctl, 0, 0, NULL); in ax88172_set_multicast()
172 static int ax88172_link_reset(struct usbnet *dev) in ax88172_link_reset() argument
177 mii_check_media(&dev->mii, 1, 1); in ax88172_link_reset()
178 mii_ethtool_gset(&dev->mii, &ecmd); in ax88172_link_reset()
184 netdev_dbg(dev->net, "ax88172_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n", in ax88172_link_reset()
187 asix_write_medium_mode(dev, mode); in ax88172_link_reset()
204 static int ax88172_bind(struct usbnet *dev, struct usb_interface *intf) in ax88172_bind() argument
209 unsigned long gpio_bits = dev->driver_info->data; in ax88172_bind()
211 usbnet_get_endpoints(dev,intf); in ax88172_bind()
215 ret = asix_write_cmd(dev, AX_CMD_WRITE_GPIOS, in ax88172_bind()
222 ret = asix_write_rx_ctl(dev, 0x80); in ax88172_bind()
227 ret = asix_read_cmd(dev, AX88172_CMD_READ_NODE_ID, 0, 0, ETH_ALEN, buf); in ax88172_bind()
229 netdev_dbg(dev->net, "read AX_CMD_READ_NODE_ID failed: %d\n", in ax88172_bind()
234 asix_set_netdev_dev_addr(dev, buf); in ax88172_bind()
237 dev->mii.dev = dev->net; in ax88172_bind()
238 dev->mii.mdio_read = asix_mdio_read; in ax88172_bind()
239 dev->mii.mdio_write = asix_mdio_write; in ax88172_bind()
240 dev->mii.phy_id_mask = 0x3f; in ax88172_bind()
241 dev->mii.reg_num_mask = 0x1f; in ax88172_bind()
242 dev->mii.phy_id = asix_get_phy_addr(dev); in ax88172_bind()
244 dev->net->netdev_ops = &ax88172_netdev_ops; in ax88172_bind()
245 dev->net->ethtool_ops = &ax88172_ethtool_ops; in ax88172_bind()
246 dev->net->needed_headroom = 4; /* cf asix_tx_fixup() */ in ax88172_bind()
247 dev->net->needed_tailroom = 4; /* cf asix_tx_fixup() */ in ax88172_bind()
249 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET); in ax88172_bind()
250 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE, in ax88172_bind()
252 mii_nway_restart(&dev->mii); in ax88172_bind()
275 static int ax88772_link_reset(struct usbnet *dev) in ax88772_link_reset() argument
280 mii_check_media(&dev->mii, 1, 1); in ax88772_link_reset()
281 mii_ethtool_gset(&dev->mii, &ecmd); in ax88772_link_reset()
290 netdev_dbg(dev->net, "ax88772_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n", in ax88772_link_reset()
293 asix_write_medium_mode(dev, mode); in ax88772_link_reset()
298 static int ax88772_reset(struct usbnet *dev) in ax88772_reset() argument
300 struct asix_data *data = (struct asix_data *)&dev->data; in ax88772_reset()
304 ret = asix_write_gpio(dev, in ax88772_reset()
309 embd_phy = ((asix_get_phy_addr(dev) & 0x1f) == 0x10 ? 1 : 0); in ax88772_reset()
311 ret = asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, embd_phy, 0, 0, NULL); in ax88772_reset()
313 netdev_dbg(dev->net, "Select PHY #1 failed: %d\n", ret); in ax88772_reset()
317 ret = asix_sw_reset(dev, AX_SWRESET_IPPD | AX_SWRESET_PRL); in ax88772_reset()
323 ret = asix_sw_reset(dev, AX_SWRESET_CLEAR); in ax88772_reset()
330 ret = asix_sw_reset(dev, AX_SWRESET_IPRL); in ax88772_reset()
334 ret = asix_sw_reset(dev, AX_SWRESET_PRTE); in ax88772_reset()
340 rx_ctl = asix_read_rx_ctl(dev); in ax88772_reset()
341 netdev_dbg(dev->net, "RX_CTL is 0x%04x after software reset\n", rx_ctl); in ax88772_reset()
342 ret = asix_write_rx_ctl(dev, 0x0000); in ax88772_reset()
346 rx_ctl = asix_read_rx_ctl(dev); in ax88772_reset()
347 netdev_dbg(dev->net, "RX_CTL is 0x%04x setting to 0x0000\n", rx_ctl); in ax88772_reset()
349 ret = asix_sw_reset(dev, AX_SWRESET_PRL); in ax88772_reset()
355 ret = asix_sw_reset(dev, AX_SWRESET_IPRL | AX_SWRESET_PRL); in ax88772_reset()
361 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET); in ax88772_reset()
362 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE, in ax88772_reset()
364 mii_nway_restart(&dev->mii); in ax88772_reset()
366 ret = asix_write_medium_mode(dev, AX88772_MEDIUM_DEFAULT); in ax88772_reset()
370 ret = asix_write_cmd(dev, AX_CMD_WRITE_IPG0, in ax88772_reset()
374 netdev_dbg(dev->net, "Write IPG,IPG1,IPG2 failed: %d\n", ret); in ax88772_reset()
379 memcpy(data->mac_addr, dev->net->dev_addr, ETH_ALEN); in ax88772_reset()
380 ret = asix_write_cmd(dev, AX_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN, in ax88772_reset()
386 ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL); in ax88772_reset()
390 rx_ctl = asix_read_rx_ctl(dev); in ax88772_reset()
391 netdev_dbg(dev->net, "RX_CTL is 0x%04x after all initializations\n", in ax88772_reset()
394 rx_ctl = asix_read_medium_status(dev); in ax88772_reset()
395 netdev_dbg(dev->net, in ax88772_reset()
418 static int ax88772_bind(struct usbnet *dev, struct usb_interface *intf) in ax88772_bind() argument
424 usbnet_get_endpoints(dev,intf); in ax88772_bind()
427 if (dev->driver_info->data & FLAG_EEPROM_MAC) { in ax88772_bind()
429 ret = asix_read_cmd(dev, AX_CMD_READ_EEPROM, 0x04 + i, in ax88772_bind()
435 ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID, in ax88772_bind()
440 netdev_dbg(dev->net, "Failed to read MAC address: %d\n", ret); in ax88772_bind()
444 asix_set_netdev_dev_addr(dev, buf); in ax88772_bind()
447 dev->mii.dev = dev->net; in ax88772_bind()
448 dev->mii.mdio_read = asix_mdio_read; in ax88772_bind()
449 dev->mii.mdio_write = asix_mdio_write; in ax88772_bind()
450 dev->mii.phy_id_mask = 0x1f; in ax88772_bind()
451 dev->mii.reg_num_mask = 0x1f; in ax88772_bind()
452 dev->mii.phy_id = asix_get_phy_addr(dev); in ax88772_bind()
454 dev->net->netdev_ops = &ax88772_netdev_ops; in ax88772_bind()
455 dev->net->ethtool_ops = &ax88772_ethtool_ops; in ax88772_bind()
456 dev->net->needed_headroom = 4; /* cf asix_tx_fixup() */ in ax88772_bind()
457 dev->net->needed_tailroom = 4; /* cf asix_tx_fixup() */ in ax88772_bind()
459 embd_phy = ((dev->mii.phy_id & 0x1f) == 0x10 ? 1 : 0); in ax88772_bind()
462 ret = asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, embd_phy, 0, 0, NULL); in ax88772_bind()
464 netdev_dbg(dev->net, "Select PHY #1 failed: %d\n", ret); in ax88772_bind()
468 ax88772_reset(dev); in ax88772_bind()
471 phyid = asix_get_phyid(dev); in ax88772_bind()
472 netdev_dbg(dev->net, "PHYID=0x%08x\n", phyid); in ax88772_bind()
475 if (dev->driver_info->flags & FLAG_FRAMING_AX) { in ax88772_bind()
478 dev->rx_urb_size = 2048; in ax88772_bind()
481 dev->driver_priv = kzalloc(sizeof(struct asix_common_private), GFP_KERNEL); in ax88772_bind()
482 if (!dev->driver_priv) in ax88772_bind()
488 static void ax88772_unbind(struct usbnet *dev, struct usb_interface *intf) in ax88772_unbind() argument
490 kfree(dev->driver_priv); in ax88772_unbind()
508 static int marvell_phy_init(struct usbnet *dev) in marvell_phy_init() argument
510 struct asix_data *data = (struct asix_data *)&dev->data; in marvell_phy_init()
513 netdev_dbg(dev->net, "marvell_phy_init()\n"); in marvell_phy_init()
515 reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_MARVELL_STATUS); in marvell_phy_init()
516 netdev_dbg(dev->net, "MII_MARVELL_STATUS = 0x%04x\n", reg); in marvell_phy_init()
518 asix_mdio_write(dev->net, dev->mii.phy_id, MII_MARVELL_CTRL, in marvell_phy_init()
522 reg = asix_mdio_read(dev->net, dev->mii.phy_id, in marvell_phy_init()
524 netdev_dbg(dev->net, "MII_MARVELL_LED_CTRL (1) = 0x%04x\n", reg); in marvell_phy_init()
528 asix_mdio_write(dev->net, dev->mii.phy_id, in marvell_phy_init()
531 reg = asix_mdio_read(dev->net, dev->mii.phy_id, in marvell_phy_init()
533 netdev_dbg(dev->net, "MII_MARVELL_LED_CTRL (2) = 0x%04x\n", reg); in marvell_phy_init()
540 static int rtl8211cl_phy_init(struct usbnet *dev) in rtl8211cl_phy_init() argument
542 struct asix_data *data = (struct asix_data *)&dev->data; in rtl8211cl_phy_init()
544 netdev_dbg(dev->net, "rtl8211cl_phy_init()\n"); in rtl8211cl_phy_init()
546 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0x0005); in rtl8211cl_phy_init()
547 asix_mdio_write (dev->net, dev->mii.phy_id, 0x0c, 0); in rtl8211cl_phy_init()
548 asix_mdio_write (dev->net, dev->mii.phy_id, 0x01, in rtl8211cl_phy_init()
549 asix_mdio_read (dev->net, dev->mii.phy_id, 0x01) | 0x0080); in rtl8211cl_phy_init()
550 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0); in rtl8211cl_phy_init()
553 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0x0002); in rtl8211cl_phy_init()
554 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1a, 0x00cb); in rtl8211cl_phy_init()
555 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0); in rtl8211cl_phy_init()
561 static int marvell_led_status(struct usbnet *dev, u16 speed) in marvell_led_status() argument
563 u16 reg = asix_mdio_read(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL); in marvell_led_status()
565 netdev_dbg(dev->net, "marvell_led_status() read 0x%04x\n", reg); in marvell_led_status()
581 netdev_dbg(dev->net, "marvell_led_status() writing 0x%04x\n", reg); in marvell_led_status()
582 asix_mdio_write(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL, reg); in marvell_led_status()
587 static int ax88178_reset(struct usbnet *dev) in ax88178_reset() argument
589 struct asix_data *data = (struct asix_data *)&dev->data; in ax88178_reset()
596 asix_read_cmd(dev, AX_CMD_READ_GPIOS, 0, 0, 1, &status); in ax88178_reset()
597 netdev_dbg(dev->net, "GPIO Status: 0x%04x\n", status); in ax88178_reset()
599 asix_write_cmd(dev, AX_CMD_WRITE_ENABLE, 0, 0, 0, NULL); in ax88178_reset()
600 asix_read_cmd(dev, AX_CMD_READ_EEPROM, 0x0017, 0, 2, &eeprom); in ax88178_reset()
601 asix_write_cmd(dev, AX_CMD_WRITE_DISABLE, 0, 0, 0, NULL); in ax88178_reset()
603 netdev_dbg(dev->net, "EEPROM index 0x17 is 0x%04x\n", eeprom); in ax88178_reset()
614 netdev_dbg(dev->net, "GPIO0: %d, PhyMode: %d\n", gpio0, data->phymode); in ax88178_reset()
617 asix_write_gpio(dev, AX_GPIO_RSE | AX_GPIO_GPO_1 | AX_GPIO_GPO1EN, 40); in ax88178_reset()
619 asix_write_gpio(dev, 0x003c, 30); in ax88178_reset()
620 asix_write_gpio(dev, 0x001c, 300); in ax88178_reset()
621 asix_write_gpio(dev, 0x003c, 30); in ax88178_reset()
623 netdev_dbg(dev->net, "gpio phymode == 1 path\n"); in ax88178_reset()
624 asix_write_gpio(dev, AX_GPIO_GPO1EN, 30); in ax88178_reset()
625 asix_write_gpio(dev, AX_GPIO_GPO1EN | AX_GPIO_GPO_1, 30); in ax88178_reset()
629 phyid = asix_get_phyid(dev); in ax88178_reset()
630 netdev_dbg(dev->net, "PHYID=0x%08x\n", phyid); in ax88178_reset()
633 asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, 0, 0, 0, NULL); in ax88178_reset()
635 asix_sw_reset(dev, 0); in ax88178_reset()
638 asix_sw_reset(dev, AX_SWRESET_PRL | AX_SWRESET_IPPD); in ax88178_reset()
641 asix_write_rx_ctl(dev, 0); in ax88178_reset()
644 marvell_phy_init(dev); in ax88178_reset()
647 rtl8211cl_phy_init(dev); in ax88178_reset()
649 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, in ax88178_reset()
651 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE, in ax88178_reset()
653 asix_mdio_write(dev->net, dev->mii.phy_id, MII_CTRL1000, in ax88178_reset()
656 mii_nway_restart(&dev->mii); in ax88178_reset()
658 ret = asix_write_medium_mode(dev, AX88178_MEDIUM_DEFAULT); in ax88178_reset()
663 memcpy(data->mac_addr, dev->net->dev_addr, ETH_ALEN); in ax88178_reset()
664 ret = asix_write_cmd(dev, AX_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN, in ax88178_reset()
669 ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL); in ax88178_reset()
676 static int ax88178_link_reset(struct usbnet *dev) in ax88178_link_reset() argument
680 struct asix_data *data = (struct asix_data *)&dev->data; in ax88178_link_reset()
683 netdev_dbg(dev->net, "ax88178_link_reset()\n"); in ax88178_link_reset()
685 mii_check_media(&dev->mii, 1, 1); in ax88178_link_reset()
686 mii_ethtool_gset(&dev->mii, &ecmd); in ax88178_link_reset()
704 netdev_dbg(dev->net, "ax88178_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n", in ax88178_link_reset()
707 asix_write_medium_mode(dev, mode); in ax88178_link_reset()
710 marvell_led_status(dev, speed); in ax88178_link_reset()
715 static void ax88178_set_mfb(struct usbnet *dev) in ax88178_set_mfb() argument
720 int old_rx_urb_size = dev->rx_urb_size; in ax88178_set_mfb()
722 if (dev->hard_mtu < 2048) { in ax88178_set_mfb()
723 dev->rx_urb_size = 2048; in ax88178_set_mfb()
725 } else if (dev->hard_mtu < 4096) { in ax88178_set_mfb()
726 dev->rx_urb_size = 4096; in ax88178_set_mfb()
728 } else if (dev->hard_mtu < 8192) { in ax88178_set_mfb()
729 dev->rx_urb_size = 8192; in ax88178_set_mfb()
731 } else if (dev->hard_mtu < 16384) { in ax88178_set_mfb()
732 dev->rx_urb_size = 16384; in ax88178_set_mfb()
736 rxctl = asix_read_rx_ctl(dev); in ax88178_set_mfb()
737 asix_write_rx_ctl(dev, (rxctl & ~AX_RX_CTL_MFB_16384) | mfb); in ax88178_set_mfb()
739 medium = asix_read_medium_status(dev); in ax88178_set_mfb()
740 if (dev->net->mtu > 1500) in ax88178_set_mfb()
744 asix_write_medium_mode(dev, medium); in ax88178_set_mfb()
746 if (dev->rx_urb_size > old_rx_urb_size) in ax88178_set_mfb()
747 usbnet_unlink_rx_urbs(dev); in ax88178_set_mfb()
752 struct usbnet *dev = netdev_priv(net); in ax88178_change_mtu() local
755 netdev_dbg(dev->net, "ax88178_change_mtu() new_mtu=%d\n", new_mtu); in ax88178_change_mtu()
760 if ((ll_mtu % dev->maxpacket) == 0) in ax88178_change_mtu()
764 dev->hard_mtu = net->mtu + net->hard_header_len; in ax88178_change_mtu()
765 ax88178_set_mfb(dev); in ax88178_change_mtu()
768 usbnet_update_max_qlen(dev); in ax88178_change_mtu()
785 static int ax88178_bind(struct usbnet *dev, struct usb_interface *intf) in ax88178_bind() argument
790 usbnet_get_endpoints(dev,intf); in ax88178_bind()
793 ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID, 0, 0, ETH_ALEN, buf); in ax88178_bind()
795 netdev_dbg(dev->net, "Failed to read MAC address: %d\n", ret); in ax88178_bind()
799 asix_set_netdev_dev_addr(dev, buf); in ax88178_bind()
802 dev->mii.dev = dev->net; in ax88178_bind()
803 dev->mii.mdio_read = asix_mdio_read; in ax88178_bind()
804 dev->mii.mdio_write = asix_mdio_write; in ax88178_bind()
805 dev->mii.phy_id_mask = 0x1f; in ax88178_bind()
806 dev->mii.reg_num_mask = 0xff; in ax88178_bind()
807 dev->mii.supports_gmii = 1; in ax88178_bind()
808 dev->mii.phy_id = asix_get_phy_addr(dev); in ax88178_bind()
810 dev->net->netdev_ops = &ax88178_netdev_ops; in ax88178_bind()
811 dev->net->ethtool_ops = &ax88178_ethtool_ops; in ax88178_bind()
814 asix_sw_reset(dev, 0); in ax88178_bind()
817 asix_sw_reset(dev, AX_SWRESET_PRL | AX_SWRESET_IPPD); in ax88178_bind()
821 if (dev->driver_info->flags & FLAG_FRAMING_AX) { in ax88178_bind()
824 dev->rx_urb_size = 2048; in ax88178_bind()
827 dev->driver_priv = kzalloc(sizeof(struct asix_common_private), GFP_KERNEL); in ax88178_bind()
828 if (!dev->driver_priv) in ax88178_bind()