122 static int kszphy_extended_write(struct phy_device *phydev,  in kszphy_extended_write()  argument
125 	phy_write(phydev, MII_KSZPHY_EXTREG, KSZPHY_EXTREG_WRITE | regnum);  in kszphy_extended_write()
126 	return phy_write(phydev, MII_KSZPHY_EXTREG_WRITE, val);  in kszphy_extended_write()
129 static int kszphy_extended_read(struct phy_device *phydev,  in kszphy_extended_read()  argument
132 	phy_write(phydev, MII_KSZPHY_EXTREG, regnum);  in kszphy_extended_read()
133 	return phy_read(phydev, MII_KSZPHY_EXTREG_READ);  in kszphy_extended_read()
136 static int kszphy_ack_interrupt(struct phy_device *phydev)  in kszphy_ack_interrupt()  argument
141 	rc = phy_read(phydev, MII_KSZPHY_INTCS);  in kszphy_ack_interrupt()
146 static int kszphy_config_intr(struct phy_device *phydev)  in kszphy_config_intr()  argument
148 	const struct kszphy_type *type = phydev->drv->driver_data;  in kszphy_config_intr()
158 	temp = phy_read(phydev, MII_KSZPHY_CTRL);  in kszphy_config_intr()
162 	phy_write(phydev, MII_KSZPHY_CTRL, temp);  in kszphy_config_intr()
165 	if (phydev->interrupts == PHY_INTERRUPT_ENABLED)  in kszphy_config_intr()
170 	return phy_write(phydev, MII_KSZPHY_INTCS, temp);  in kszphy_config_intr()
173 static int kszphy_rmii_clk_sel(struct phy_device *phydev, bool val)  in kszphy_rmii_clk_sel()  argument
177 	ctrl = phy_read(phydev, MII_KSZPHY_CTRL);  in kszphy_rmii_clk_sel()
186 	return phy_write(phydev, MII_KSZPHY_CTRL, ctrl);  in kszphy_rmii_clk_sel()
189 static int kszphy_setup_led(struct phy_device *phydev, u32 reg, int val)  in kszphy_setup_led()  argument
204 	temp = phy_read(phydev, reg);  in kszphy_setup_led()
212 	rc = phy_write(phydev, reg, temp);  in kszphy_setup_led()
215 		dev_err(&phydev->dev, "failed to set led mode\n");  in kszphy_setup_led()
223 static int kszphy_broadcast_disable(struct phy_device *phydev)  in kszphy_broadcast_disable()  argument
227 	ret = phy_read(phydev, MII_KSZPHY_OMSO);  in kszphy_broadcast_disable()
231 	ret = phy_write(phydev, MII_KSZPHY_OMSO, ret | KSZPHY_OMSO_B_CAST_OFF);  in kszphy_broadcast_disable()
234 		dev_err(&phydev->dev, "failed to disable broadcast address\n");  in kszphy_broadcast_disable()
239 static int kszphy_nand_tree_disable(struct phy_device *phydev)  in kszphy_nand_tree_disable()  argument
243 	ret = phy_read(phydev, MII_KSZPHY_OMSO);  in kszphy_nand_tree_disable()
250 	ret = phy_write(phydev, MII_KSZPHY_OMSO,  in kszphy_nand_tree_disable()
254 		dev_err(&phydev->dev, "failed to disable NAND tree mode\n");  in kszphy_nand_tree_disable()
259 static int kszphy_config_init(struct phy_device *phydev)  in kszphy_config_init()  argument
261 	struct kszphy_priv *priv = phydev->priv;  in kszphy_config_init()
271 		kszphy_broadcast_disable(phydev);  in kszphy_config_init()
274 		kszphy_nand_tree_disable(phydev);  in kszphy_config_init()
277 		ret = kszphy_rmii_clk_sel(phydev, priv->rmii_ref_clk_sel_val);  in kszphy_config_init()
279 			dev_err(&phydev->dev, "failed to set rmii reference clock\n");  in kszphy_config_init()
285 		kszphy_setup_led(phydev, type->led_mode_reg, priv->led_mode);  in kszphy_config_init()
290 static int ksz9021_load_values_from_of(struct phy_device *phydev,  in ksz9021_load_values_from_of()  argument
319 		newval = kszphy_extended_read(phydev, reg);  in ksz9021_load_values_from_of()
335 	return kszphy_extended_write(phydev, reg, newval);  in ksz9021_load_values_from_of()
338 static int ksz9021_config_init(struct phy_device *phydev)  in ksz9021_config_init()  argument
340 	const struct device *dev = &phydev->dev;  in ksz9021_config_init()
348 	dev_walker = &phydev->dev;  in ksz9021_config_init()
356 		ksz9021_load_values_from_of(phydev, of_node,  in ksz9021_config_init()
360 		ksz9021_load_values_from_of(phydev, of_node,  in ksz9021_config_init()
364 		ksz9021_load_values_from_of(phydev, of_node,  in ksz9021_config_init()
388 static int ksz9031_extended_write(struct phy_device *phydev,  in ksz9031_extended_write()  argument
391 	phy_write(phydev, MII_KSZ9031RN_MMD_CTRL_REG, dev_addr);  in ksz9031_extended_write()
392 	phy_write(phydev, MII_KSZ9031RN_MMD_REGDATA_REG, regnum);  in ksz9031_extended_write()
393 	phy_write(phydev, MII_KSZ9031RN_MMD_CTRL_REG, (mode << 14) | dev_addr);  in ksz9031_extended_write()
394 	return phy_write(phydev, MII_KSZ9031RN_MMD_REGDATA_REG, val);  in ksz9031_extended_write()
397 static int ksz9031_extended_read(struct phy_device *phydev,  in ksz9031_extended_read()  argument
400 	phy_write(phydev, MII_KSZ9031RN_MMD_CTRL_REG, dev_addr);  in ksz9031_extended_read()
401 	phy_write(phydev, MII_KSZ9031RN_MMD_REGDATA_REG, regnum);  in ksz9031_extended_read()
402 	phy_write(phydev, MII_KSZ9031RN_MMD_CTRL_REG, (mode << 14) | dev_addr);  in ksz9031_extended_read()
403 	return phy_read(phydev, MII_KSZ9031RN_MMD_REGDATA_REG);  in ksz9031_extended_read()
406 static int ksz9031_of_load_skew_values(struct phy_device *phydev,  in ksz9031_of_load_skew_values()  argument
426 		newval = ksz9031_extended_read(phydev, OP_DATA, 2, reg);  in ksz9031_of_load_skew_values()
440 	return ksz9031_extended_write(phydev, OP_DATA, 2, reg, newval);  in ksz9031_of_load_skew_values()
443 static int ksz9031_center_flp_timing(struct phy_device *phydev)  in ksz9031_center_flp_timing()  argument
448 	result = ksz9031_extended_write(phydev, OP_DATA, 0,  in ksz9031_center_flp_timing()
450 	result = ksz9031_extended_write(phydev, OP_DATA, 0,  in ksz9031_center_flp_timing()
456 	return genphy_restart_aneg(phydev);  in ksz9031_center_flp_timing()
459 static int ksz9031_config_init(struct phy_device *phydev)  in ksz9031_config_init()  argument
461 	const struct device *dev = &phydev->dev;  in ksz9031_config_init()
478 		ksz9031_of_load_skew_values(phydev, of_node,  in ksz9031_config_init()
482 		ksz9031_of_load_skew_values(phydev, of_node,  in ksz9031_config_init()
486 		ksz9031_of_load_skew_values(phydev, of_node,  in ksz9031_config_init()
490 		ksz9031_of_load_skew_values(phydev, of_node,  in ksz9031_config_init()
495 	return ksz9031_center_flp_timing(phydev);  in ksz9031_config_init()
501 static int ksz8873mll_read_status(struct phy_device *phydev)  in ksz8873mll_read_status()  argument
506 	regval = phy_read(phydev, KSZ8873MLL_GLOBAL_CONTROL_4);  in ksz8873mll_read_status()
508 	regval = phy_read(phydev, KSZ8873MLL_GLOBAL_CONTROL_4);  in ksz8873mll_read_status()
511 		phydev->duplex = DUPLEX_HALF;  in ksz8873mll_read_status()
513 		phydev->duplex = DUPLEX_FULL;  in ksz8873mll_read_status()
516 		phydev->speed = SPEED_10;  in ksz8873mll_read_status()
518 		phydev->speed = SPEED_100;  in ksz8873mll_read_status()
520 	phydev->link = 1;  in ksz8873mll_read_status()
521 	phydev->pause = phydev->asym_pause = 0;  in ksz8873mll_read_status()
526 static int ksz9031_read_status(struct phy_device *phydev)  in ksz9031_read_status()  argument
531 	err = genphy_read_status(phydev);  in ksz9031_read_status()
538 	regval = phy_read(phydev, MII_STAT1000);  in ksz9031_read_status()
540 		phy_init_hw(phydev);  in ksz9031_read_status()
541 		phydev->link = 0;  in ksz9031_read_status()
547 static int ksz8873mll_config_aneg(struct phy_device *phydev)  in ksz8873mll_config_aneg()  argument
557 ksz9021_rd_mmd_phyreg(struct phy_device *phydev, int ptrad, int devnum,  in ksz9021_rd_mmd_phyreg()  argument
567 ksz9021_wr_mmd_phyreg(struct phy_device *phydev, int ptrad, int devnum,  in ksz9021_wr_mmd_phyreg()  argument
572 static int kszphy_probe(struct phy_device *phydev)  in kszphy_probe()  argument
574 	const struct kszphy_type *type = phydev->drv->driver_data;  in kszphy_probe()
575 	const struct device_node *np = phydev->dev.of_node;  in kszphy_probe()
580 	priv = devm_kzalloc(&phydev->dev, sizeof(*priv), GFP_KERNEL);  in kszphy_probe()
584 	phydev->priv = priv;  in kszphy_probe()
595 			dev_err(&phydev->dev, "invalid led mode: 0x%02x\n",  in kszphy_probe()
603 	clk = devm_clk_get(&phydev->dev, "rmii-ref");  in kszphy_probe()
618 			dev_err(&phydev->dev, "Clock rate out of range: %ld\n", rate);  in kszphy_probe()
624 	if (phydev->dev_flags & MICREL_PHY_50MHZ_CLK) {  in kszphy_probe()