24 int bcm_phy_write_exp(struct phy_device *phydev, u16 reg, u16 val)  in bcm_phy_write_exp()  argument
28 	rc = phy_write(phydev, MII_BCM54XX_EXP_SEL, reg);  in bcm_phy_write_exp()
32 	return phy_write(phydev, MII_BCM54XX_EXP_DATA, val);  in bcm_phy_write_exp()
36 int bcm_phy_read_exp(struct phy_device *phydev, u16 reg)  in bcm_phy_read_exp()  argument
40 	val = phy_write(phydev, MII_BCM54XX_EXP_SEL, reg);  in bcm_phy_read_exp()
44 	val = phy_read(phydev, MII_BCM54XX_EXP_DATA);  in bcm_phy_read_exp()
47 	phy_write(phydev, MII_BCM54XX_EXP_SEL, 0);  in bcm_phy_read_exp()
53 int bcm_phy_write_misc(struct phy_device *phydev,  in bcm_phy_write_misc()  argument
59 	rc = phy_write(phydev, MII_BCM54XX_AUX_CTL,  in bcm_phy_write_misc()
64 	tmp = phy_read(phydev, MII_BCM54XX_AUX_CTL);  in bcm_phy_write_misc()
66 	rc = phy_write(phydev, MII_BCM54XX_AUX_CTL, tmp);  in bcm_phy_write_misc()
71 	rc = bcm_phy_write_exp(phydev, tmp, val);  in bcm_phy_write_misc()
77 int bcm_phy_read_misc(struct phy_device *phydev,  in bcm_phy_read_misc()  argument
83 	rc = phy_write(phydev, MII_BCM54XX_AUX_CTL,  in bcm_phy_read_misc()
88 	tmp = phy_read(phydev, MII_BCM54XX_AUX_CTL);  in bcm_phy_read_misc()
90 	rc = phy_write(phydev, MII_BCM54XX_AUX_CTL, tmp);  in bcm_phy_read_misc()
95 	rc = bcm_phy_read_exp(phydev, tmp);  in bcm_phy_read_misc()
101 int bcm_phy_ack_intr(struct phy_device *phydev)  in bcm_phy_ack_intr()  argument
106 	reg = phy_read(phydev, MII_BCM54XX_ISR);  in bcm_phy_ack_intr()
114 int bcm_phy_config_intr(struct phy_device *phydev)  in bcm_phy_config_intr()  argument
118 	reg = phy_read(phydev, MII_BCM54XX_ECR);  in bcm_phy_config_intr()
122 	if (phydev->interrupts == PHY_INTERRUPT_ENABLED)  in bcm_phy_config_intr()
127 	return phy_write(phydev, MII_BCM54XX_ECR, reg);  in bcm_phy_config_intr()
131 int bcm_phy_read_shadow(struct phy_device *phydev, u16 shadow)  in bcm_phy_read_shadow()  argument
133 	phy_write(phydev, MII_BCM54XX_SHD, MII_BCM54XX_SHD_VAL(shadow));  in bcm_phy_read_shadow()
134 	return MII_BCM54XX_SHD_DATA(phy_read(phydev, MII_BCM54XX_SHD));  in bcm_phy_read_shadow()
138 int bcm_phy_write_shadow(struct phy_device *phydev, u16 shadow,  in bcm_phy_write_shadow()  argument
141 	return phy_write(phydev, MII_BCM54XX_SHD,  in bcm_phy_write_shadow()
148 int bcm_phy_enable_apd(struct phy_device *phydev, bool dll_pwr_down)  in bcm_phy_enable_apd()  argument
153 		val = bcm_phy_read_shadow(phydev, BCM54XX_SHD_SCR3);  in bcm_phy_enable_apd()
158 		bcm_phy_write_shadow(phydev, BCM54XX_SHD_SCR3, val);  in bcm_phy_enable_apd()
161 	val = bcm_phy_read_shadow(phydev, BCM54XX_SHD_APD);  in bcm_phy_enable_apd()
168 	if (phydev->autoneg == AUTONEG_ENABLE)  in bcm_phy_enable_apd()
177 	return bcm_phy_write_shadow(phydev, BCM54XX_SHD_APD, val);  in bcm_phy_enable_apd()
181 int bcm_phy_enable_eee(struct phy_device *phydev)  in bcm_phy_enable_eee()  argument
186 	val = phy_read_mmd_indirect(phydev, BRCM_CL45VEN_EEE_CONTROL,  in bcm_phy_enable_eee()
187 				    MDIO_MMD_AN, phydev->addr);  in bcm_phy_enable_eee()
193 	phy_write_mmd_indirect(phydev, BRCM_CL45VEN_EEE_CONTROL,  in bcm_phy_enable_eee()
194 			       MDIO_MMD_AN,  phydev->addr, (u32)val);  in bcm_phy_enable_eee()
197 	val = phy_read_mmd_indirect(phydev, BCM_CL45VEN_EEE_ADV,  in bcm_phy_enable_eee()
198 				    MDIO_MMD_AN, phydev->addr);  in bcm_phy_enable_eee()
204 	phy_write_mmd_indirect(phydev, BCM_CL45VEN_EEE_ADV,  in bcm_phy_enable_eee()
205 			       MDIO_MMD_AN,  phydev->addr, (u32)val);  in bcm_phy_enable_eee()