Lines Matching refs:outb
185 outb(chip->entr1, cfg_base); in ali_ircc_init()
186 outb(chip->entr2, cfg_base); in ali_ircc_init()
189 outb(0x07, cfg_base); in ali_ircc_init()
190 outb(0x05, cfg_base+1); in ali_ircc_init()
193 outb(chip->cid_index, cfg_base); in ali_ircc_init()
201 outb(0x1F, cfg_base); in ali_ircc_init()
230 outb(0xbb, cfg_base); in ali_ircc_init()
483 outb(chip->entr1, cfg_base); in ali_ircc_probe_53()
484 outb(chip->entr2, cfg_base); in ali_ircc_probe_53()
487 outb(0x07, cfg_base); in ali_ircc_probe_53()
488 outb(0x05, cfg_base+1); in ali_ircc_probe_53()
491 outb(0x60, cfg_base); in ali_ircc_probe_53()
493 outb(0x61, cfg_base); in ali_ircc_probe_53()
502 outb(0x70, cfg_base); in ali_ircc_probe_53()
508 outb(0x74, cfg_base); in ali_ircc_probe_53()
519 outb(0x30, cfg_base); in ali_ircc_probe_53()
525 outb(0x22, cfg_base); in ali_ircc_probe_53()
531 outb(0xbb, cfg_base); in ali_ircc_probe_53()
560 outb(0x40, iobase+FIR_MCR); // benjamin 2000/11/30 11:45AM in ali_ircc_setup()
576 outb(RX_FIFO_Threshold, iobase+FIR_FIFO_TR); in ali_ircc_setup()
579 outb(RX_DMA_Threshold, iobase+FIR_DMA_TR); in ali_ircc_setup()
583 outb(inb(iobase+FIR_IRDA_CR) | IRDA_CR_CRC, iobase+FIR_IRDA_CR); in ali_ircc_setup()
594 outb(tmp, iobase+FIR_LCR_B); in ali_ircc_setup()
597 outb(0x00, iobase+FIR_IER); in ali_ircc_setup()
628 outb(chips[i].entr1, cfg_base); in ali_ircc_read_dongle_id()
629 outb(chips[i].entr2, cfg_base); in ali_ircc_read_dongle_id()
632 outb(0x07, cfg_base); in ali_ircc_read_dongle_id()
633 outb(0x05, cfg_base+1); in ali_ircc_read_dongle_id()
636 outb(0xf0, cfg_base); in ali_ircc_read_dongle_id()
643 outb(0xbb, cfg_base); in ali_ircc_read_dongle_id()
772 outb( tmp& ~CR_TIMER_EN, iobase+FIR_CR); in ali_ircc_fir_interrupt()
943 outb(UART_IER_RDI, iobase+UART_IER); in ali_ircc_sir_write_wakeup()
1080 outb(UART_LCR_DLAB | lcr, iobase+UART_LCR); /* Set DLAB */ in ali_ircc_sir_change_speed()
1081 outb(divisor & 0xff, iobase+UART_DLL); /* Set speed */ in ali_ircc_sir_change_speed()
1082 outb(divisor >> 8, iobase+UART_DLM); in ali_ircc_sir_change_speed()
1083 outb(lcr, iobase+UART_LCR); /* Set 8N1 */ in ali_ircc_sir_change_speed()
1084 outb(fcr, iobase+UART_FCR); /* Enable FIFO's */ in ali_ircc_sir_change_speed()
1088 outb((UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2), iobase+UART_MCR); in ali_ircc_sir_change_speed()
1125 outb(tmp, iobase+FIR_IRDA_CR); in ali_ircc_change_dongle_speed()
1130 outb(tmp, iobase+FIR_IRDA_CR); in ali_ircc_change_dongle_speed()
1136 outb(tmp, iobase+FIR_IRDA_CR); in ali_ircc_change_dongle_speed()
1141 outb(tmp, iobase+FIR_IRDA_CR); in ali_ircc_change_dongle_speed()
1147 outb(tmp, iobase+FIR_IRDA_CR); in ali_ircc_change_dongle_speed()
1153 outb(tmp, iobase+FIR_IRDA_CR); in ali_ircc_change_dongle_speed()
1157 outb(tmp & ~0x02, iobase+FIR_IRDA_CR); in ali_ircc_change_dongle_speed()
1181 outb(tmp, iobase+FIR_IRDA_CR); in ali_ircc_change_dongle_speed()
1189 outb(tmp, iobase+FIR_IRDA_CR); in ali_ircc_change_dongle_speed()
1195 outb(tmp, iobase+FIR_IRDA_CR); in ali_ircc_change_dongle_speed()
1200 outb(tmp, iobase+FIR_IRDA_CR); in ali_ircc_change_dongle_speed()
1204 outb(tmp & ~0x02, iobase+FIR_IRDA_CR); in ali_ircc_change_dongle_speed()
1228 outb(tmp, iobase+FIR_IRDA_CR); in ali_ircc_change_dongle_speed()
1238 outb(tmp, iobase+FIR_IRDA_CR); in ali_ircc_change_dongle_speed()
1263 outb(tmp, iobase+FIR_IRDA_CR); in ali_ircc_change_dongle_speed()
1291 outb(buf[actual], iobase+UART_TX); in ali_ircc_sir_write()
1340 outb(UART_IER_RDI , iobase+UART_IER); in ali_ircc_net_open()
1489 outb(TIMER_IIR_500, iobase+FIR_TIMER_IIR); in ali_ircc_fir_hard_xmit()
1494 outb(TIMER_IIR_1ms, iobase+FIR_TIMER_IIR); in ali_ircc_fir_hard_xmit()
1499 outb(TIMER_IIR_2ms, iobase+FIR_TIMER_IIR); in ali_ircc_fir_hard_xmit()
1504 outb(inb(iobase+FIR_CR) | CR_TIMER_EN, iobase+FIR_CR); in ali_ircc_fir_hard_xmit()
1562 outb(inb(iobase+FIR_CR) & ~CR_DMA_EN, iobase+FIR_CR); in ali_ircc_dma_xmit()
1574 outb(LCR_A_FIFO_RESET, iobase+FIR_LCR_A); in ali_ircc_dma_xmit()
1580 outb(FIFO_OPTI, iobase+FIR_FIFO_TR) ; in ali_ircc_dma_xmit()
1586 outb(TX_DMA_Threshold, iobase+FIR_DMA_TR); in ali_ircc_dma_xmit()
1592 outb(Hi, iobase+FIR_TX_DSR_HI); in ali_ircc_dma_xmit()
1593 outb(Lo, iobase+FIR_TX_DSR_LO); in ali_ircc_dma_xmit()
1599 outb(((unsigned char)(tmp & 0x3f) | LCR_B_TX_MODE) & ~LCR_B_BW, iobase+FIR_LCR_B); in ali_ircc_dma_xmit()
1603 outb(0, iobase+FIR_LSR); in ali_ircc_dma_xmit()
1607 outb(inb(iobase+FIR_CR) | CR_DMA_EN | CR_DMA_BURST, iobase+FIR_CR); in ali_ircc_dma_xmit()
1623 outb(inb(iobase+FIR_CR) & ~CR_DMA_EN, iobase+FIR_CR); in ali_ircc_dma_xmit_complete()
1697 outb(inb(iobase+FIR_CR) & ~CR_DMA_EN, iobase+FIR_CR); in ali_ircc_dma_receive()
1701 outb(0x07, iobase+FIR_LSR); in ali_ircc_dma_receive()
1713 outb(LCR_A_FIFO_RESET, iobase+FIR_LCR_A); in ali_ircc_dma_receive()
1724 …outb((unsigned char)(tmp &0x3f) | LCR_B_RX_MODE | LCR_B_BW , iobase + FIR_LCR_B); // 2000/12/1 05:… in ali_ircc_dma_receive()
1730 outb(RX_FIFO_Threshold, iobase+FIR_FIFO_TR); in ali_ircc_dma_receive()
1731 outb(RX_DMA_Threshold, iobase+FIR_DMA_TR); in ali_ircc_dma_receive()
1735 outb(CR_DMA_EN | CR_DMA_BURST, iobase+FIR_CR); in ali_ircc_dma_receive()
1862 outb(TIMER_IIR_500, iobase+FIR_TIMER_IIR); // 2001/1/2 05:07PM in ali_ircc_dma_receive_complete()
1865 outb(inb(iobase+FIR_CR) | CR_TIMER_EN, iobase+FIR_CR); in ali_ircc_dma_receive_complete()
1967 outb(UART_IER_THRI, iobase+UART_IER); in ali_ircc_sir_hard_xmit()
2155 outb(newMask, iobase+FIR_IER); in SetCOMInterrupts()
2158 outb(newMask, iobase+UART_IER); in SetCOMInterrupts()
2170 outb(0x28, iobase+UART_MCR); in SIR2FIR()
2171 outb(0x68, iobase+UART_MCR); in SIR2FIR()
2172 outb(0x88, iobase+UART_MCR); in SIR2FIR()
2174 outb(0x60, iobase+FIR_MCR); /* Master Reset */ in SIR2FIR()
2175 outb(0x20, iobase+FIR_MCR); /* Master Interrupt Enable */ in SIR2FIR()
2191 outb(0x20, iobase+FIR_MCR); /* IRQ to low */ in FIR2SIR()
2192 outb(0x00, iobase+UART_IER); in FIR2SIR()
2194 outb(0xA0, iobase+FIR_MCR); /* Don't set master reset */ in FIR2SIR()
2195 outb(0x00, iobase+UART_FCR); in FIR2SIR()
2196 outb(0x07, iobase+UART_FCR); in FIR2SIR()