123 	WARN_ON(idx > ale->params.ale_entries);  in cpsw_ale_read()
125 	__raw_writel(idx, ale->params.ale_regs + ALE_TABLE_CONTROL);  in cpsw_ale_read()
128 		ale_entry[i] = __raw_readl(ale->params.ale_regs +  in cpsw_ale_read()
138 	WARN_ON(idx > ale->params.ale_entries);  in cpsw_ale_write()
141 		__raw_writel(ale_entry[i], ale->params.ale_regs +  in cpsw_ale_write()
144 	__raw_writel(idx | ALE_TABLE_WRITE, ale->params.ale_regs +  in cpsw_ale_write()
155 	for (idx = 0; idx < ale->params.ale_entries; idx++) {  in cpsw_ale_match_addr()
176 	for (idx = 0; idx < ale->params.ale_entries; idx++) {  in cpsw_ale_match_vlan()
192 	for (idx = 0; idx < ale->params.ale_entries; idx++) {  in cpsw_ale_match_free()
206 	for (idx = 0; idx < ale->params.ale_entries; idx++) {  in cpsw_ale_find_ageable()
243 	for (idx = 0; idx < ale->params.ale_entries; idx++) {  in cpsw_ale_flush_multicast()
443 	for (idx = 0; idx < ale->params.ale_entries; idx++) {  in cpsw_ale_set_allmulti()
668 	if (port < 0 || port > ale->params.ale_ports)  in cpsw_ale_control_set()
678 	tmp = __raw_readl(ale->params.ale_regs + offset);  in cpsw_ale_control_set()
680 	__raw_writel(tmp, ale->params.ale_regs + offset);  in cpsw_ale_control_set()
699 	if (port < 0 || port > ale->params.ale_ports)  in cpsw_ale_control_get()
705 	tmp = __raw_readl(ale->params.ale_regs + offset) >> shift;  in cpsw_ale_control_get()
726 	rev = __raw_readl(ale->params.ale_regs + ALE_IDVER);  in cpsw_ale_start()
727 	dev_dbg(ale->params.dev, "initialized cpsw ale revision %d.%d\n",  in cpsw_ale_start()
748 struct cpsw_ale *cpsw_ale_create(struct cpsw_ale_params *params)  in cpsw_ale_create()  argument
756 	ale->params = *params;  in cpsw_ale_create()
757 	ale->ageout = ale->params.ale_ageout * HZ;  in cpsw_ale_create()
777 	for (i = 0; i < ale->params.ale_entries; i++) {  in cpsw_ale_dump()