Lines Matching refs:priv
79 static void bdx_rx_alloc_skbs(struct bdx_priv *priv, struct rxf_fifo *f);
80 static void bdx_tx_cleanup(struct bdx_priv *priv);
81 static int bdx_rx_receive(struct bdx_priv *priv, struct rxd_fifo *f, int budget);
84 static void bdx_tx_push_desc_safe(struct bdx_priv *priv, void *data, int size);
87 static int bdx_tx_init(struct bdx_priv *priv);
88 static int bdx_rx_init(struct bdx_priv *priv);
91 static void bdx_rx_free(struct bdx_priv *priv);
92 static void bdx_tx_free(struct bdx_priv *priv);
135 #define bdx_enable_interrupts(priv) \ argument
136 do { WRITE_REG(priv, regIMR, IR_RUN); } while (0)
137 #define bdx_disable_interrupts(priv) \ argument
138 do { WRITE_REG(priv, regIMR, 0); } while (0)
154 bdx_fifo_init(struct bdx_priv *priv, struct fifo *f, int fsz_type, in bdx_fifo_init() argument
161 f->va = pci_alloc_consistent(priv->pdev, in bdx_fifo_init()
175 WRITE_REG(priv, reg_CFG0, (u32) ((f->da & TX_RX_CFG0_BASE) | fsz_type)); in bdx_fifo_init()
176 WRITE_REG(priv, reg_CFG1, H32_64(f->da)); in bdx_fifo_init()
186 static void bdx_fifo_free(struct bdx_priv *priv, struct fifo *f) in bdx_fifo_free() argument
190 pci_free_consistent(priv->pdev, in bdx_fifo_free()
201 static void bdx_link_changed(struct bdx_priv *priv) in bdx_link_changed() argument
203 u32 link = READ_REG(priv, regMAC_LNK_STAT) & MAC_LINK_STAT; in bdx_link_changed()
206 if (netif_carrier_ok(priv->ndev)) { in bdx_link_changed()
207 netif_stop_queue(priv->ndev); in bdx_link_changed()
208 netif_carrier_off(priv->ndev); in bdx_link_changed()
209 netdev_err(priv->ndev, "Link Down\n"); in bdx_link_changed()
212 if (!netif_carrier_ok(priv->ndev)) { in bdx_link_changed()
213 netif_wake_queue(priv->ndev); in bdx_link_changed()
214 netif_carrier_on(priv->ndev); in bdx_link_changed()
215 netdev_err(priv->ndev, "Link Up\n"); in bdx_link_changed()
220 static void bdx_isr_extra(struct bdx_priv *priv, u32 isr) in bdx_isr_extra() argument
223 bdx_rx_alloc_skbs(priv, &priv->rxf_fifo0); in bdx_isr_extra()
228 bdx_link_changed(priv); in bdx_isr_extra()
231 netdev_err(priv->ndev, "PCI-E Link Fault\n"); in bdx_isr_extra()
234 netdev_err(priv->ndev, "PCI-E Time Out\n"); in bdx_isr_extra()
255 struct bdx_priv *priv = netdev_priv(ndev); in bdx_isr_napi() local
259 isr = (READ_REG(priv, regISR) & IR_RUN); in bdx_isr_napi()
261 bdx_enable_interrupts(priv); in bdx_isr_napi()
266 bdx_isr_extra(priv, isr); in bdx_isr_napi()
269 if (likely(napi_schedule_prep(&priv->napi))) { in bdx_isr_napi()
270 __napi_schedule(&priv->napi); in bdx_isr_napi()
281 READ_REG(priv, regTXF_WPTR_0); in bdx_isr_napi()
282 READ_REG(priv, regRXD_WPTR_0); in bdx_isr_napi()
286 bdx_enable_interrupts(priv); in bdx_isr_napi()
292 struct bdx_priv *priv = container_of(napi, struct bdx_priv, napi); in bdx_poll() local
296 bdx_tx_cleanup(priv); in bdx_poll()
297 work_done = bdx_rx_receive(priv, &priv->rxd_fifo0, budget); in bdx_poll()
299 (priv->napi_stop++ >= 30)) { in bdx_poll()
304 priv->napi_stop = 0; in bdx_poll()
307 bdx_enable_interrupts(priv); in bdx_poll()
322 static int bdx_fw_load(struct bdx_priv *priv) in bdx_fw_load() argument
329 master = READ_REG(priv, regINIT_SEMAPHORE); in bdx_fw_load()
330 if (!READ_REG(priv, regINIT_STATUS) && master) { in bdx_fw_load()
331 rc = request_firmware(&fw, "tehuti/bdx.bin", &priv->pdev->dev); in bdx_fw_load()
334 bdx_tx_push_desc_safe(priv, (char *)fw->data, fw->size); in bdx_fw_load()
338 if (READ_REG(priv, regINIT_STATUS)) { in bdx_fw_load()
347 WRITE_REG(priv, regINIT_SEMAPHORE, 1); in bdx_fw_load()
352 netdev_err(priv->ndev, "firmware loading failed\n"); in bdx_fw_load()
355 READ_REG(priv, regVPC), in bdx_fw_load()
356 READ_REG(priv, regVIC), in bdx_fw_load()
357 READ_REG(priv, regINIT_STATUS), i); in bdx_fw_load()
360 DBG("%s: firmware loading success\n", priv->ndev->name); in bdx_fw_load()
365 static void bdx_restore_mac(struct net_device *ndev, struct bdx_priv *priv) in bdx_restore_mac() argument
371 READ_REG(priv, regUNC_MAC0_A), in bdx_restore_mac()
372 READ_REG(priv, regUNC_MAC1_A), READ_REG(priv, regUNC_MAC2_A)); in bdx_restore_mac()
375 WRITE_REG(priv, regUNC_MAC2_A, val); in bdx_restore_mac()
377 WRITE_REG(priv, regUNC_MAC1_A, val); in bdx_restore_mac()
379 WRITE_REG(priv, regUNC_MAC0_A, val); in bdx_restore_mac()
382 READ_REG(priv, regUNC_MAC0_A), in bdx_restore_mac()
383 READ_REG(priv, regUNC_MAC1_A), READ_REG(priv, regUNC_MAC2_A)); in bdx_restore_mac()
391 static int bdx_hw_start(struct bdx_priv *priv) in bdx_hw_start() argument
394 struct net_device *ndev = priv->ndev; in bdx_hw_start()
397 bdx_link_changed(priv); in bdx_hw_start()
400 WRITE_REG(priv, regFRM_LENGTH, 0X3FE0); in bdx_hw_start()
401 WRITE_REG(priv, regPAUSE_QUANT, 0x96); in bdx_hw_start()
402 WRITE_REG(priv, regRX_FIFO_SECTION, 0x800010); in bdx_hw_start()
403 WRITE_REG(priv, regTX_FIFO_SECTION, 0xE00010); in bdx_hw_start()
404 WRITE_REG(priv, regRX_FULLNESS, 0); in bdx_hw_start()
405 WRITE_REG(priv, regTX_FULLNESS, 0); in bdx_hw_start()
406 WRITE_REG(priv, regCTRLST, in bdx_hw_start()
409 WRITE_REG(priv, regVGLB, 0); in bdx_hw_start()
410 WRITE_REG(priv, regMAX_FRAME_A, in bdx_hw_start()
411 priv->rxf_fifo0.m.pktsz & MAX_FRAME_AB_VAL); in bdx_hw_start()
413 DBG("RDINTCM=%08x\n", priv->rdintcm); /*NOTE: test script uses this */ in bdx_hw_start()
414 WRITE_REG(priv, regRDINTCM0, priv->rdintcm); in bdx_hw_start()
415 WRITE_REG(priv, regRDINTCM2, 0); /*cpu_to_le32(rcm.val)); */ in bdx_hw_start()
417 DBG("TDINTCM=%08x\n", priv->tdintcm); /*NOTE: test script uses this */ in bdx_hw_start()
418 WRITE_REG(priv, regTDINTCM0, priv->tdintcm); /* old val = 0x300064 */ in bdx_hw_start()
422 bdx_restore_mac(priv->ndev, priv); in bdx_hw_start()
424 WRITE_REG(priv, regGMAC_RXF_A, GMAC_RX_FILTER_OSEN | in bdx_hw_start()
427 #define BDX_IRQ_TYPE ((priv->nic->irq_type == IRQ_MSI) ? 0 : IRQF_SHARED) in bdx_hw_start()
429 rc = request_irq(priv->pdev->irq, bdx_isr_napi, BDX_IRQ_TYPE, in bdx_hw_start()
433 bdx_enable_interrupts(priv); in bdx_hw_start()
441 static void bdx_hw_stop(struct bdx_priv *priv) in bdx_hw_stop() argument
444 bdx_disable_interrupts(priv); in bdx_hw_stop()
445 free_irq(priv->pdev->irq, priv->ndev); in bdx_hw_stop()
447 netif_carrier_off(priv->ndev); in bdx_hw_stop()
448 netif_stop_queue(priv->ndev); in bdx_hw_stop()
476 static int bdx_hw_reset(struct bdx_priv *priv) in bdx_hw_reset() argument
481 if (priv->port == 0) { in bdx_hw_reset()
483 val = READ_REG(priv, regCLKPLL); in bdx_hw_reset()
484 WRITE_REG(priv, regCLKPLL, (val | CLKPLL_SFTRST) + 0x8); in bdx_hw_reset()
486 val = READ_REG(priv, regCLKPLL); in bdx_hw_reset()
487 WRITE_REG(priv, regCLKPLL, val & ~CLKPLL_SFTRST); in bdx_hw_reset()
491 if ((READ_REG(priv, regCLKPLL) & CLKPLL_LKD) == CLKPLL_LKD) { in bdx_hw_reset()
493 READ_REG(priv, regRXD_CFG0_0); in bdx_hw_reset()
500 static int bdx_sw_reset(struct bdx_priv *priv) in bdx_sw_reset() argument
507 WRITE_REG(priv, regGMAC_RXF_A, 0); in bdx_sw_reset()
510 WRITE_REG(priv, regDIS_PORT, 1); in bdx_sw_reset()
512 WRITE_REG(priv, regDIS_QU, 1); in bdx_sw_reset()
515 if (READ_REG(priv, regRST_PORT) & 1) in bdx_sw_reset()
520 netdev_err(priv->ndev, "SW reset timeout. continuing anyway\n"); in bdx_sw_reset()
523 WRITE_REG(priv, regRDINTCM0, 0); in bdx_sw_reset()
524 WRITE_REG(priv, regTDINTCM0, 0); in bdx_sw_reset()
525 WRITE_REG(priv, regIMR, 0); in bdx_sw_reset()
526 READ_REG(priv, regISR); in bdx_sw_reset()
529 WRITE_REG(priv, regRST_QU, 1); in bdx_sw_reset()
531 WRITE_REG(priv, regRST_PORT, 1); in bdx_sw_reset()
534 DBG("%x = %x\n", i, READ_REG(priv, i) & TXF_WPTR_WR_PTR); in bdx_sw_reset()
536 WRITE_REG(priv, i, 0); in bdx_sw_reset()
538 WRITE_REG(priv, regDIS_PORT, 0); in bdx_sw_reset()
540 WRITE_REG(priv, regDIS_QU, 0); in bdx_sw_reset()
542 WRITE_REG(priv, regRST_QU, 0); in bdx_sw_reset()
544 WRITE_REG(priv, regRST_PORT, 0); in bdx_sw_reset()
549 DBG("%x = %x\n", i, READ_REG(priv, i) & TXF_WPTR_WR_PTR); in bdx_sw_reset()
555 static int bdx_reset(struct bdx_priv *priv) in bdx_reset() argument
558 RET((priv->pdev->device == 0x3009) in bdx_reset()
559 ? bdx_hw_reset(priv) in bdx_reset()
560 : bdx_sw_reset(priv)); in bdx_reset()
576 struct bdx_priv *priv = NULL; in bdx_close() local
579 priv = netdev_priv(ndev); in bdx_close()
581 napi_disable(&priv->napi); in bdx_close()
583 bdx_reset(priv); in bdx_close()
584 bdx_hw_stop(priv); in bdx_close()
585 bdx_rx_free(priv); in bdx_close()
586 bdx_tx_free(priv); in bdx_close()
604 struct bdx_priv *priv; in bdx_open() local
608 priv = netdev_priv(ndev); in bdx_open()
609 bdx_reset(priv); in bdx_open()
611 netif_stop_queue(priv->ndev); in bdx_open()
613 if ((rc = bdx_tx_init(priv)) || in bdx_open()
614 (rc = bdx_rx_init(priv)) || in bdx_open()
615 (rc = bdx_fw_load(priv))) in bdx_open()
618 bdx_rx_alloc_skbs(priv, &priv->rxf_fifo0); in bdx_open()
620 rc = bdx_hw_start(priv); in bdx_open()
624 napi_enable(&priv->napi); in bdx_open()
626 print_fw_id(priv->nic); in bdx_open()
635 static int bdx_range_check(struct bdx_priv *priv, u32 offset) in bdx_range_check() argument
637 return (offset > (u32) (BDX_REGS_SIZE / priv->nic->port_num)) ? in bdx_range_check()
643 struct bdx_priv *priv = netdev_priv(ndev); in bdx_ioctl_priv() local
665 error = bdx_range_check(priv, data[1]); in bdx_ioctl_priv()
668 data[2] = READ_REG(priv, data[1]); in bdx_ioctl_priv()
677 error = bdx_range_check(priv, data[1]); in bdx_ioctl_priv()
680 WRITE_REG(priv, data[1], data[2]); in bdx_ioctl_priv()
709 struct bdx_priv *priv = netdev_priv(ndev); in __bdx_vlan_rx_vid() local
720 val = READ_REG(priv, reg); in __bdx_vlan_rx_vid()
727 WRITE_REG(priv, reg, val); in __bdx_vlan_rx_vid()
784 struct bdx_priv *priv = netdev_priv(ndev); in bdx_setmulti() local
800 WRITE_REG(priv, regRX_MCST_HASH0 + i * 4, ~0); in bdx_setmulti()
808 WRITE_REG(priv, regRX_MCST_HASH0 + i * 4, 0); in bdx_setmulti()
811 WRITE_REG(priv, regRX_MAC_MCST0 + i * 8, 0); in bdx_setmulti()
812 WRITE_REG(priv, regRX_MAC_MCST1 + i * 8, 0); in bdx_setmulti()
825 val = READ_REG(priv, reg); in bdx_setmulti()
827 WRITE_REG(priv, reg, val); in bdx_setmulti()
834 WRITE_REG(priv, regGMAC_RXF_A, rxf_val); in bdx_setmulti()
842 struct bdx_priv *priv = netdev_priv(ndev); in bdx_set_mac() local
851 bdx_restore_mac(ndev, priv); in bdx_set_mac()
855 static int bdx_read_mac(struct bdx_priv *priv) in bdx_read_mac() argument
860 macAddress[2] = READ_REG(priv, regUNC_MAC0_A); in bdx_read_mac()
861 macAddress[2] = READ_REG(priv, regUNC_MAC0_A); in bdx_read_mac()
862 macAddress[1] = READ_REG(priv, regUNC_MAC1_A); in bdx_read_mac()
863 macAddress[1] = READ_REG(priv, regUNC_MAC1_A); in bdx_read_mac()
864 macAddress[0] = READ_REG(priv, regUNC_MAC2_A); in bdx_read_mac()
865 macAddress[0] = READ_REG(priv, regUNC_MAC2_A); in bdx_read_mac()
867 priv->ndev->dev_addr[i * 2 + 1] = macAddress[i]; in bdx_read_mac()
868 priv->ndev->dev_addr[i * 2] = macAddress[i] >> 8; in bdx_read_mac()
873 static u64 bdx_read_l2stat(struct bdx_priv *priv, int reg) in bdx_read_l2stat() argument
877 val = READ_REG(priv, reg); in bdx_read_l2stat()
878 val |= ((u64) READ_REG(priv, reg + 8)) << 32; in bdx_read_l2stat()
883 static void bdx_update_stats(struct bdx_priv *priv) in bdx_update_stats() argument
885 struct bdx_stats *stats = &priv->hw_stats; in bdx_update_stats()
894 stats_vector[i] = bdx_read_l2stat(priv, addr); in bdx_update_stats()
901 stats_vector[i] = bdx_read_l2stat(priv, addr); in bdx_update_stats()
908 stats_vector[i] = bdx_read_l2stat(priv, addr); in bdx_update_stats()
915 stats_vector[i] = bdx_read_l2stat(priv, addr); in bdx_update_stats()
1001 static int bdx_rx_init(struct bdx_priv *priv) in bdx_rx_init() argument
1005 if (bdx_fifo_init(priv, &priv->rxd_fifo0.m, priv->rxd_size, in bdx_rx_init()
1009 if (bdx_fifo_init(priv, &priv->rxf_fifo0.m, priv->rxf_size, in bdx_rx_init()
1013 priv->rxdb = bdx_rxdb_create(priv->rxf_fifo0.m.memsz / in bdx_rx_init()
1015 if (!priv->rxdb) in bdx_rx_init()
1018 priv->rxf_fifo0.m.pktsz = priv->ndev->mtu + VLAN_ETH_HLEN; in bdx_rx_init()
1022 netdev_err(priv->ndev, "Rx init failed\n"); in bdx_rx_init()
1031 static void bdx_rx_free_skbs(struct bdx_priv *priv, struct rxf_fifo *f) in bdx_rx_free_skbs() argument
1034 struct rxdb *db = priv->rxdb; in bdx_rx_free_skbs()
1048 pci_unmap_single(priv->pdev, in bdx_rx_free_skbs()
1062 static void bdx_rx_free(struct bdx_priv *priv) in bdx_rx_free() argument
1065 if (priv->rxdb) { in bdx_rx_free()
1066 bdx_rx_free_skbs(priv, &priv->rxf_fifo0); in bdx_rx_free()
1067 bdx_rxdb_destroy(priv->rxdb); in bdx_rx_free()
1068 priv->rxdb = NULL; in bdx_rx_free()
1070 bdx_fifo_free(priv, &priv->rxf_fifo0.m); in bdx_rx_free()
1071 bdx_fifo_free(priv, &priv->rxd_fifo0.m); in bdx_rx_free()
1093 static void bdx_rx_alloc_skbs(struct bdx_priv *priv, struct rxf_fifo *f) in bdx_rx_alloc_skbs() argument
1099 struct rxdb *db = priv->rxdb; in bdx_rx_alloc_skbs()
1104 skb = netdev_alloc_skb(priv->ndev, f->m.pktsz + NET_IP_ALIGN); in bdx_rx_alloc_skbs()
1112 dm->dma = pci_map_single(priv->pdev, in bdx_rx_alloc_skbs()
1136 WRITE_REG(priv, f->m.reg_WPTR, f->m.wptr & TXF_WPTR_WR_PTR); in bdx_rx_alloc_skbs()
1141 NETIF_RX_MUX(struct bdx_priv *priv, u32 rxd_val1, u16 rxd_vlan, in NETIF_RX_MUX() argument
1148 priv->ndev->name, in NETIF_RX_MUX()
1156 static void bdx_recycle_skb(struct bdx_priv *priv, struct rxd_desc *rxdd) in bdx_recycle_skb() argument
1166 DBG("priv=%p rxdd=%p\n", priv, rxdd); in bdx_recycle_skb()
1167 f = &priv->rxf_fifo0; in bdx_recycle_skb()
1168 db = priv->rxdb; in bdx_recycle_skb()
1206 static int bdx_rx_receive(struct bdx_priv *priv, struct rxd_fifo *f, int budget) in bdx_rx_receive() argument
1208 struct net_device *ndev = priv->ndev; in bdx_rx_receive()
1225 f->m.wptr = READ_REG(priv, f->m.reg_WPTR) & TXF_WPTR_WR_PTR; in bdx_rx_receive()
1263 bdx_recycle_skb(priv, rxdd); in bdx_rx_receive()
1267 rxf_fifo = &priv->rxf_fifo0; in bdx_rx_receive()
1268 db = priv->rxdb; in bdx_rx_receive()
1273 (skb2 = netdev_alloc_skb(priv->ndev, len + NET_IP_ALIGN))) { in bdx_rx_receive()
1276 pci_dma_sync_single_for_cpu(priv->pdev, in bdx_rx_receive()
1280 bdx_recycle_skb(priv, rxdd); in bdx_rx_receive()
1283 pci_unmap_single(priv->pdev, in bdx_rx_receive()
1300 NETIF_RX_MUX(priv, rxd_val1, rxd_vlan, skb); in bdx_rx_receive()
1309 WRITE_REG(priv, f->m.reg_RPTR, f->m.rptr & TXF_WPTR_WR_PTR); in bdx_rx_receive()
1311 bdx_rx_alloc_skbs(priv, &priv->rxf_fifo0); in bdx_rx_receive()
1498 bdx_tx_map_skb(struct bdx_priv *priv, struct sk_buff *skb, in bdx_tx_map_skb() argument
1501 struct txdb *db = &priv->txdb; in bdx_tx_map_skb()
1507 db->wptr->addr.dma = pci_map_single(priv->pdev, skb->data, in bdx_tx_map_skb()
1522 db->wptr->addr.dma = skb_frag_dma_map(&priv->pdev->dev, frag, in bdx_tx_map_skb()
1559 static int bdx_tx_init(struct bdx_priv *priv) in bdx_tx_init() argument
1561 if (bdx_fifo_init(priv, &priv->txd_fifo0.m, priv->txd_size, in bdx_tx_init()
1565 if (bdx_fifo_init(priv, &priv->txf_fifo0.m, priv->txf_size, in bdx_tx_init()
1572 if (bdx_tx_db_init(&priv->txdb, max(priv->txd_size, priv->txf_size))) in bdx_tx_init()
1575 priv->tx_level = BDX_MAX_TX_LEVEL; in bdx_tx_init()
1577 priv->tx_update_mark = priv->tx_level - 1024; in bdx_tx_init()
1582 netdev_err(priv->ndev, "Tx init failed\n"); in bdx_tx_init()
1592 static inline int bdx_tx_space(struct bdx_priv *priv) in bdx_tx_space() argument
1594 struct txd_fifo *f = &priv->txd_fifo0; in bdx_tx_space()
1597 f->m.rptr = READ_REG(priv, f->m.reg_RPTR) & TXF_WPTR_WR_PTR; in bdx_tx_space()
1618 struct bdx_priv *priv = netdev_priv(ndev); in bdx_tx_transmit() local
1619 struct txd_fifo *f = &priv->txd_fifo0; in bdx_tx_transmit()
1633 if (!spin_trylock(&priv->tx_lock)) { in bdx_tx_transmit()
1669 bdx_tx_map_skb(priv, skb, txdd); in bdx_tx_transmit()
1685 priv->tx_level -= txd_sizes[nr_frags].bytes; in bdx_tx_transmit()
1686 BDX_ASSERT(priv->tx_level <= 0 || priv->tx_level > BDX_MAX_TX_LEVEL); in bdx_tx_transmit()
1688 if (priv->tx_level > priv->tx_update_mark) { in bdx_tx_transmit()
1693 WRITE_REG(priv, f->m.reg_WPTR, f->m.wptr & TXF_WPTR_WR_PTR); in bdx_tx_transmit()
1695 if (priv->tx_noupd++ > BDX_NO_UPD_PACKETS) { in bdx_tx_transmit()
1696 priv->tx_noupd = 0; in bdx_tx_transmit()
1697 WRITE_REG(priv, f->m.reg_WPTR, in bdx_tx_transmit()
1706 WRITE_REG(priv, f->m.reg_WPTR, f->m.wptr & TXF_WPTR_WR_PTR); in bdx_tx_transmit()
1715 if (priv->tx_level < BDX_MIN_TX_LEVEL) { in bdx_tx_transmit()
1717 BDX_DRV_NAME, ndev->name, priv->tx_level); in bdx_tx_transmit()
1721 spin_unlock_irqrestore(&priv->tx_lock, flags); in bdx_tx_transmit()
1732 static void bdx_tx_cleanup(struct bdx_priv *priv) in bdx_tx_cleanup() argument
1734 struct txf_fifo *f = &priv->txf_fifo0; in bdx_tx_cleanup()
1735 struct txdb *db = &priv->txdb; in bdx_tx_cleanup()
1739 f->m.wptr = READ_REG(priv, f->m.reg_WPTR) & TXF_WPTR_MASK; in bdx_tx_cleanup()
1751 pci_unmap_page(priv->pdev, db->rptr->addr.dma, in bdx_tx_cleanup()
1764 WRITE_REG(priv, f->m.reg_RPTR, f->m.rptr & TXF_WPTR_WR_PTR); in bdx_tx_cleanup()
1768 spin_lock(&priv->tx_lock); in bdx_tx_cleanup()
1769 priv->tx_level += tx_level; in bdx_tx_cleanup()
1770 BDX_ASSERT(priv->tx_level <= 0 || priv->tx_level > BDX_MAX_TX_LEVEL); in bdx_tx_cleanup()
1772 if (priv->tx_noupd) { in bdx_tx_cleanup()
1773 priv->tx_noupd = 0; in bdx_tx_cleanup()
1774 WRITE_REG(priv, priv->txd_fifo0.m.reg_WPTR, in bdx_tx_cleanup()
1775 priv->txd_fifo0.m.wptr & TXF_WPTR_WR_PTR); in bdx_tx_cleanup()
1779 if (unlikely(netif_queue_stopped(priv->ndev) && in bdx_tx_cleanup()
1780 netif_carrier_ok(priv->ndev) && in bdx_tx_cleanup()
1781 (priv->tx_level >= BDX_MIN_TX_LEVEL))) { in bdx_tx_cleanup()
1783 BDX_DRV_NAME, priv->ndev->name, priv->tx_level); in bdx_tx_cleanup()
1784 netif_wake_queue(priv->ndev); in bdx_tx_cleanup()
1786 spin_unlock(&priv->tx_lock); in bdx_tx_cleanup()
1793 static void bdx_tx_free_skbs(struct bdx_priv *priv) in bdx_tx_free_skbs() argument
1795 struct txdb *db = &priv->txdb; in bdx_tx_free_skbs()
1800 pci_unmap_page(priv->pdev, db->rptr->addr.dma, in bdx_tx_free_skbs()
1810 static void bdx_tx_free(struct bdx_priv *priv) in bdx_tx_free() argument
1813 bdx_tx_free_skbs(priv); in bdx_tx_free()
1814 bdx_fifo_free(priv, &priv->txd_fifo0.m); in bdx_tx_free()
1815 bdx_fifo_free(priv, &priv->txf_fifo0.m); in bdx_tx_free()
1816 bdx_tx_db_close(&priv->txdb); in bdx_tx_free()
1830 static void bdx_tx_push_desc(struct bdx_priv *priv, void *data, int size) in bdx_tx_push_desc() argument
1832 struct txd_fifo *f = &priv->txd_fifo0; in bdx_tx_push_desc()
1846 WRITE_REG(priv, f->m.reg_WPTR, f->m.wptr & TXF_WPTR_WR_PTR); in bdx_tx_push_desc()
1858 static void bdx_tx_push_desc_safe(struct bdx_priv *priv, void *data, int size) in bdx_tx_push_desc_safe() argument
1867 int avail = bdx_tx_space(priv) - 8; in bdx_tx_push_desc_safe()
1879 bdx_tx_push_desc(priv, data, avail); in bdx_tx_push_desc_safe()
1920 struct bdx_priv *priv; in bdx_probe() local
2030 priv = nic->priv[port] = netdev_priv(ndev); in bdx_probe()
2032 priv->pBdxRegs = nic->regs + port * 0x8000; in bdx_probe()
2033 priv->port = port; in bdx_probe()
2034 priv->pdev = pdev; in bdx_probe()
2035 priv->ndev = ndev; in bdx_probe()
2036 priv->nic = nic; in bdx_probe()
2037 priv->msg_enable = BDX_DEF_MSG_ENABLE; in bdx_probe()
2039 netif_napi_add(ndev, &priv->napi, bdx_poll, 64); in bdx_probe()
2043 priv->stats_flag = 0; in bdx_probe()
2045 priv->stats_flag = 1; in bdx_probe()
2049 priv->txd_size = 2; in bdx_probe()
2050 priv->txf_size = 2; in bdx_probe()
2051 priv->rxd_size = 2; in bdx_probe()
2052 priv->rxf_size = 3; in bdx_probe()
2055 priv->rdintcm = INT_REG_VAL(0x20, 1, 4, 12); in bdx_probe()
2056 priv->tdintcm = INT_REG_VAL(0x20, 1, 0, 12); in bdx_probe()
2066 spin_lock_init(&priv->tx_lock); in bdx_probe()
2069 if (bdx_read_mac(priv)) { in bdx_probe()
2147 struct bdx_priv *priv = netdev_priv(netdev); in bdx_get_settings() local
2149 rdintcm = priv->rdintcm; in bdx_get_settings()
2150 tdintcm = priv->tdintcm; in bdx_get_settings()
2178 struct bdx_priv *priv = netdev_priv(netdev); in bdx_get_drvinfo() local
2183 strlcpy(drvinfo->bus_info, pci_name(priv->pdev), in bdx_get_drvinfo()
2197 struct bdx_priv *priv = netdev_priv(netdev); in bdx_get_coalesce() local
2199 rdintcm = priv->rdintcm; in bdx_get_coalesce()
2200 tdintcm = priv->tdintcm; in bdx_get_coalesce()
2226 struct bdx_priv *priv = netdev_priv(netdev); in bdx_set_coalesce() local
2250 rdintcm = INT_REG_VAL(rx_coal, GET_INT_COAL_RC(priv->rdintcm), in bdx_set_coalesce()
2251 GET_RXF_TH(priv->rdintcm), rx_max_coal); in bdx_set_coalesce()
2252 tdintcm = INT_REG_VAL(tx_coal, GET_INT_COAL_RC(priv->tdintcm), 0, in bdx_set_coalesce()
2255 priv->rdintcm = rdintcm; in bdx_set_coalesce()
2256 priv->tdintcm = tdintcm; in bdx_set_coalesce()
2258 WRITE_REG(priv, regRDINTCM0, rdintcm); in bdx_set_coalesce()
2259 WRITE_REG(priv, regTDINTCM0, tdintcm); in bdx_set_coalesce()
2284 struct bdx_priv *priv = netdev_priv(netdev); in bdx_get_ringparam() local
2289 ring->rx_pending = bdx_rx_fifo_size_to_packets(priv->rxf_size); in bdx_get_ringparam()
2290 ring->tx_pending = bdx_tx_fifo_size_to_packets(priv->txd_size); in bdx_get_ringparam()
2301 struct bdx_priv *priv = netdev_priv(netdev); in bdx_set_ringparam() local
2320 if ((rx_size == priv->rxf_size) && in bdx_set_ringparam()
2321 (tx_size == priv->txd_size)) in bdx_set_ringparam()
2324 priv->rxf_size = rx_size; in bdx_set_ringparam()
2326 priv->rxd_size = rx_size - 1; in bdx_set_ringparam()
2328 priv->rxd_size = rx_size; in bdx_set_ringparam()
2330 priv->txf_size = priv->txd_size = tx_size; in bdx_set_ringparam()
2359 struct bdx_priv *priv = netdev_priv(netdev); in bdx_get_sset_count() local
2365 return (priv->stats_flag) ? ARRAY_SIZE(bdx_stat_names) : 0; in bdx_get_sset_count()
2380 struct bdx_priv *priv = netdev_priv(netdev); in bdx_get_ethtool_stats() local
2382 if (priv->stats_flag) { in bdx_get_ethtool_stats()
2385 bdx_update_stats(priv); in bdx_get_ethtool_stats()
2388 memcpy(data, &priv->hw_stats, sizeof(priv->hw_stats)); in bdx_get_ethtool_stats()
2430 ndev = nic->priv[port]->ndev; in bdx_remove()