203 	u32 link = READ_REG(priv, regMAC_LNK_STAT) & MAC_LINK_STAT;  in bdx_link_changed()
259 	isr = (READ_REG(priv, regISR) & IR_RUN);  in bdx_isr_napi()
281 			READ_REG(priv, regTXF_WPTR_0);  in bdx_isr_napi()
282 			READ_REG(priv, regRXD_WPTR_0);  in bdx_isr_napi()
329 	master = READ_REG(priv, regINIT_SEMAPHORE);  in bdx_fw_load()
330 	if (!READ_REG(priv, regINIT_STATUS) && master) {  in bdx_fw_load()
338 		if (READ_REG(priv, regINIT_STATUS)) {  in bdx_fw_load()
355 			    READ_REG(priv, regVPC),  in bdx_fw_load()
356 			    READ_REG(priv, regVIC),  in bdx_fw_load()
357 			    READ_REG(priv, regINIT_STATUS), i);  in bdx_fw_load()
371 	    READ_REG(priv, regUNC_MAC0_A),  in bdx_restore_mac()
372 	    READ_REG(priv, regUNC_MAC1_A), READ_REG(priv, regUNC_MAC2_A));  in bdx_restore_mac()
382 	    READ_REG(priv, regUNC_MAC0_A),  in bdx_restore_mac()
383 	    READ_REG(priv, regUNC_MAC1_A), READ_REG(priv, regUNC_MAC2_A));  in bdx_restore_mac()
483 		val = READ_REG(priv, regCLKPLL);  in bdx_hw_reset()
486 		val = READ_REG(priv, regCLKPLL);  in bdx_hw_reset()
491 		if ((READ_REG(priv, regCLKPLL) & CLKPLL_LKD) == CLKPLL_LKD) {  in bdx_hw_reset()
493 			READ_REG(priv, regRXD_CFG0_0);  in bdx_hw_reset()
515 		if (READ_REG(priv, regRST_PORT) & 1)  in bdx_sw_reset()
526 	READ_REG(priv, regISR);  in bdx_sw_reset()
534 		DBG("%x = %x\n", i, READ_REG(priv, i) & TXF_WPTR_WR_PTR);  in bdx_sw_reset()
549 		DBG("%x = %x\n", i, READ_REG(priv, i) & TXF_WPTR_WR_PTR);  in bdx_sw_reset()
668 		data[2] = READ_REG(priv, data[1]);  in bdx_ioctl_priv()
720 	val = READ_REG(priv, reg);  in __bdx_vlan_rx_vid()
825 			val = READ_REG(priv, reg);  in bdx_setmulti()
860 	macAddress[2] = READ_REG(priv, regUNC_MAC0_A);  in bdx_read_mac()
861 	macAddress[2] = READ_REG(priv, regUNC_MAC0_A);  in bdx_read_mac()
862 	macAddress[1] = READ_REG(priv, regUNC_MAC1_A);  in bdx_read_mac()
863 	macAddress[1] = READ_REG(priv, regUNC_MAC1_A);  in bdx_read_mac()
864 	macAddress[0] = READ_REG(priv, regUNC_MAC2_A);  in bdx_read_mac()
865 	macAddress[0] = READ_REG(priv, regUNC_MAC2_A);  in bdx_read_mac()
877 	val = READ_REG(priv, reg);  in bdx_read_l2stat()
878 	val |= ((u64) READ_REG(priv, reg + 8)) << 32;  in bdx_read_l2stat()
1225 	f->m.wptr = READ_REG(priv, f->m.reg_WPTR) & TXF_WPTR_WR_PTR;  in bdx_rx_receive()
1597 	f->m.rptr = READ_REG(priv, f->m.reg_RPTR) & TXF_WPTR_WR_PTR;  in bdx_tx_space()
1739 	f->m.wptr = READ_REG(priv, f->m.reg_WPTR) & TXF_WPTR_MASK;  in bdx_tx_cleanup()