131 		cmd = readl(gp->regs + MIF_FRAME);  in __sungem_phy_read()
169 		cmd = readl(gp->regs + MIF_FRAME);  in __sungem_phy_write()
198 	(void)readl(gp->regs + GREG_IMASK); /* write posting */  in gem_disable_ints()
259 	u32 pcs_istat = readl(gp->regs + PCS_ISTAT);  in gem_pcs_interrupt()
275 	pcs_miistat = readl(gp->regs + PCS_MIISTAT);  in gem_pcs_interrupt()
278 			(readl(gp->regs + PCS_MIISTAT) &  in gem_pcs_interrupt()
309 	u32 txmac_stat = readl(gp->regs + MAC_TXSTAT);  in gem_txmac_interrupt()
370 		if (!(readl(gp->regs + MAC_RXRST) & MAC_RXRST_CMD))  in gem_rxmac_reset()
382 		if (!(readl(gp->regs + MAC_RXCFG) & MAC_RXCFG_ENAB))  in gem_rxmac_reset()
394 		if (!(readl(gp->regs + RXDMA_CFG) & RXDMA_CFG_ENABLE))  in gem_rxmac_reset()
409 		if (!(readl(gp->regs + GREG_SWRST) & GREG_SWRST_RXRST))  in gem_rxmac_reset()
440 	if (readl(gp->regs + GREG_BIFCFG) & GREG_BIFCFG_M66EN)  in gem_rxmac_reset()
451 	val = readl(gp->regs + RXDMA_CFG);  in gem_rxmac_reset()
454 	val = readl(gp->regs + MAC_RXCFG);  in gem_rxmac_reset()
462 	u32 rxmac_stat = readl(gp->regs + MAC_RXSTAT);  in gem_rxmac_interrupt()
470 		u32 smac = readl(gp->regs + MAC_SMACHINE);  in gem_rxmac_interrupt()
496 	u32 mac_cstat = readl(gp->regs + MAC_CSTAT);  in gem_mac_interrupt()
517 	u32 mif_status = readl(gp->regs + MIF_STATUS);  in gem_mif_interrupt()
530 	u32 pci_estat = readl(gp->regs + GREG_PCIESTAT);  in gem_pci_interrupt()
767 			gp->dev->name, readl(gp->regs + RXDMA_DONE), gp->rx_new);  in gem_rx()
771 	done = readl(gp->regs + RXDMA_DONE);  in gem_rx()
793 			done = readl(gp->regs + RXDMA_DONE);  in gem_rx()
923 		gp->status = readl(gp->regs + GREG_STAT);  in gem_poll()
938 		u32 gem_status = readl(gp->regs + GREG_STAT);  in gem_interrupt()
978 		   readl(gp->regs + TXDMA_CFG),  in gem_tx_timeout()
979 		   readl(gp->regs + MAC_TXSTAT),  in gem_tx_timeout()
980 		   readl(gp->regs + MAC_TXCFG));  in gem_tx_timeout()
982 		   readl(gp->regs + RXDMA_CFG),  in gem_tx_timeout()
983 		   readl(gp->regs + MAC_RXSTAT),  in gem_tx_timeout()
984 		   readl(gp->regs + MAC_RXCFG));  in gem_tx_timeout()
1122 	val = readl(gp->regs + PCS_MIICTRL);  in gem_pcs_reset()
1127 	while (readl(gp->regs + PCS_MIICTRL) & PCS_MIICTRL_RST) {  in gem_pcs_reset()
1143 	val = readl(gp->regs + PCS_CFG);  in gem_pcs_reinit_adv()
1150 	val = readl(gp->regs + PCS_MIIADV);  in gem_pcs_reinit_adv()
1158 	val = readl(gp->regs + PCS_MIICTRL);  in gem_pcs_reinit_adv()
1163 	val = readl(gp->regs + PCS_CFG);  in gem_pcs_reinit_adv()
1171 	val = readl(gp->regs + PCS_SCTRL);  in gem_pcs_reinit_adv()
1197 		val = readl(gp->regs + GREG_SWRST);  in gem_reset()
1214 	val = readl(gp->regs + TXDMA_CFG);  in gem_start_dma()
1216 	val = readl(gp->regs + RXDMA_CFG);  in gem_start_dma()
1218 	val = readl(gp->regs + MAC_TXCFG);  in gem_start_dma()
1220 	val = readl(gp->regs + MAC_RXCFG);  in gem_start_dma()
1223 	(void) readl(gp->regs + MAC_RXCFG);  in gem_start_dma()
1238 	val = readl(gp->regs + TXDMA_CFG);  in gem_stop_dma()
1240 	val = readl(gp->regs + RXDMA_CFG);  in gem_stop_dma()
1242 	val = readl(gp->regs + MAC_TXCFG);  in gem_stop_dma()
1244 	val = readl(gp->regs + MAC_RXCFG);  in gem_stop_dma()
1247 	(void) readl(gp->regs + MAC_RXCFG);  in gem_stop_dma()
1357 		u32 pcs_lpa = readl(gp->regs + PCS_MIILP);  in gem_set_link_modes()
1399 		val = readl(gp->regs + MAC_TXCFG);  in gem_set_link_modes()
1402 		val = readl(gp->regs + MAC_RXCFG);  in gem_set_link_modes()
1405 		val = readl(gp->regs + MAC_TXCFG);  in gem_set_link_modes()
1408 		val = readl(gp->regs + MAC_RXCFG);  in gem_set_link_modes()
1414  		u32 pcs_lpa = readl(gp->regs + PCS_MIILP);  in gem_set_link_modes()
1424 	val = readl(gp->regs + MAC_MCCFG);  in gem_set_link_modes()
1506 		u32 val = readl(gp->regs + PCS_MIISTAT);  in gem_link_timer()
1509 			val = readl(gp->regs + PCS_MIISTAT);  in gem_link_timer()
1671 	mifcfg = readl(gp->regs + MIF_CFG);  in gem_init_phy()
1770 	if (readl(gp->regs + GREG_BIFCFG) & GREG_BIFCFG_M66EN)  in gem_init_dma()
1931 	if (!(readl(gp->regs + GREG_CFG) & GREG_CFG_IBURST)) {  in gem_init_pause_thresholds()
1949 		gp->tx_fifo_sz = readl(gp->regs + TXDMA_FSZ) * 64;  in gem_check_invariants()
1950 		gp->rx_fifo_sz = readl(gp->regs + RXDMA_FSZ) * 64;  in gem_check_invariants()
1953 		mif_cfg = readl(gp->regs + MIF_CFG);  in gem_check_invariants()
1972 	mif_cfg = readl(gp->regs + MIF_CFG);  in gem_check_invariants()
2028 	gp->tx_fifo_sz = readl(gp->regs + TXDMA_FSZ) * 64;  in gem_check_invariants()
2029 	gp->rx_fifo_sz = readl(gp->regs + RXDMA_FSZ) * 64;  in gem_check_invariants()
2086 	mifcfg = readl(gp->regs + MIF_CFG);  in gem_stop_phy()
2103 		if ((readl(gp->regs + MAC_XIFCFG) & MAC_XIFCFG_GMII) == 0)  in gem_stop_phy()
2108 		(void)readl(gp->regs + MAC_RXCFG);  in gem_stop_phy()
2137 		(void) readl(gp->regs + MAC_XIFCFG);  in gem_stop_phy()
2402 	dev->stats.rx_crc_errors += readl(gp->regs + MAC_FCSERR);  in gem_get_stats()
2405 	dev->stats.rx_frame_errors += readl(gp->regs + MAC_AERR);  in gem_get_stats()
2408 	dev->stats.rx_length_errors += readl(gp->regs + MAC_LERR);  in gem_get_stats()
2411 	dev->stats.tx_aborted_errors += readl(gp->regs + MAC_ECOLL);  in gem_get_stats()
2413 		(readl(gp->regs + MAC_ECOLL) + readl(gp->regs + MAC_LCOLL));  in gem_get_stats()
2459 	rxcfg = readl(gp->regs + MAC_RXCFG);  in gem_set_multicast()
2467 	while (readl(gp->regs + MAC_RXCFG) & MAC_RXCFG_ENAB) {  in gem_set_multicast()