Lines Matching refs:BIT
54 #define BUS_MODE_SWR_ (BIT(0))
55 #define BUS_MODE_DMA_BURST_LENGTH_1 (BIT(8))
56 #define BUS_MODE_DMA_BURST_LENGTH_2 (BIT(9))
57 #define BUS_MODE_DMA_BURST_LENGTH_4 (BIT(10))
58 #define BUS_MODE_DMA_BURST_LENGTH_8 (BIT(11))
59 #define BUS_MODE_DMA_BURST_LENGTH_16 (BIT(12))
60 #define BUS_MODE_DMA_BURST_LENGTH_32 (BIT(13))
61 #define BUS_MODE_DBO_ (BIT(20))
74 #define DMAC_STS_NIS_ (BIT(16))
75 #define DMAC_STS_AIS_ (BIT(15))
76 #define DMAC_STS_RWT_ (BIT(9))
77 #define DMAC_STS_RXPS_ (BIT(8))
78 #define DMAC_STS_RXBU_ (BIT(7))
79 #define DMAC_STS_RX_ (BIT(6))
80 #define DMAC_STS_TXUNF_ (BIT(5))
81 #define DMAC_STS_TXBU_ (BIT(2))
82 #define DMAC_STS_TXPS_ (BIT(1))
83 #define DMAC_STS_TX_ (BIT(0))
86 #define DMAC_CONTROL_TTM_ (BIT(22))
87 #define DMAC_CONTROL_SF_ (BIT(21))
88 #define DMAC_CONTROL_ST_ (BIT(13))
89 #define DMAC_CONTROL_OSF_ (BIT(2))
90 #define DMAC_CONTROL_SR_ (BIT(1))
93 #define DMAC_INTR_ENA_NIS_ (BIT(16))
94 #define DMAC_INTR_ENA_AIS_ (BIT(15))
95 #define DMAC_INTR_ENA_RWT_ (BIT(9))
96 #define DMAC_INTR_ENA_RXPS_ (BIT(8))
97 #define DMAC_INTR_ENA_RXBU_ (BIT(7))
98 #define DMAC_INTR_ENA_RX_ (BIT(6))
99 #define DMAC_INTR_ENA_TXBU_ (BIT(2))
100 #define DMAC_INTR_ENA_TXPS_ (BIT(1))
101 #define DMAC_INTR_ENA_TX_ (BIT(0))
126 #define TDES1_TER_ (BIT(25))