Lines Matching refs:ioaddr
145 #define SMC_SELECT_BANK(x) { outw(x, ioaddr + BANK_SELECT); }
520 unsigned int ioaddr = dev->base_addr; in mot_config() local
529 writeb(ioaddr & 0xff, smc->base + MOT_LAN + CISREG_IOBASE_0); in mot_config()
530 writeb((ioaddr >> 8) & 0xff, smc->base + MOT_LAN + CISREG_IOBASE_1); in mot_config()
540 unsigned int ioaddr = dev->base_addr; in mot_setup() local
548 outw(MOT_EEPROM + i, ioaddr + POINTER); in mot_setup()
550 outw((CTL_RELOAD | CTL_EE_SELECT), ioaddr + CONTROL); in mot_setup()
554 wait = ((CTL_RELOAD | CTL_STORE) & inw(ioaddr + CONTROL)); in mot_setup()
561 addr = inw(ioaddr + GENERAL); in mot_setup()
765 unsigned int ioaddr = dev->base_addr; in check_sig() local
770 if (inw(ioaddr + BANK_SELECT) >> 8 != 0x33) { in check_sig()
772 outw(0, ioaddr + CONTROL); in check_sig()
778 s = inb(ioaddr + CONFIG); in check_sig()
783 outb(s, ioaddr + CONFIG); in check_sig()
786 s = inw(ioaddr + BASE_ADDR); in check_sig()
787 if ((inw(ioaddr + BANK_SELECT) >> 8 == 0x33) && in check_sig()
790 s = inw(ioaddr + REVISION); in check_sig()
811 unsigned int ioaddr; in smc91c92_config() local
885 ioaddr = dev->base_addr; in smc91c92_config()
889 mir = inw(ioaddr + MEMINFO) & 0xff; in smc91c92_config()
892 mcr = ((rev >> 4) > 3) ? inw(ioaddr + MEMCFG) : 0x0200; in smc91c92_config()
895 smc->cfg = inw(ioaddr + CONFIG) & ~CFG_AUI_SELECT; in smc91c92_config()
1033 unsigned int ioaddr = dev->base_addr; in smc_dump() local
1035 save = inw(ioaddr + BANK_SELECT); in smc_dump()
1040 pr_cont(" %04x", inw(ioaddr + i)); in smc_dump()
1043 outw(save, ioaddr + BANK_SELECT); in smc_dump()
1085 unsigned int ioaddr = dev->base_addr; in smc_close() local
1088 dev->name, inw(ioaddr + BANK_SELECT)); in smc_close()
1095 outw(0, ioaddr + INTERRUPT); in smc_close()
1097 mask_bits(0xff00, ioaddr + RCR); in smc_close()
1098 mask_bits(0xff00, ioaddr + TCR); in smc_close()
1102 outw(CTL_POWERDOWN, ioaddr + CONTROL ); in smc_close()
1122 unsigned int ioaddr = dev->base_addr; in smc_hardware_send_packet() local
1131 packet_no = inw(ioaddr + PNR_ARR) >> 8; in smc_hardware_send_packet()
1144 outw(packet_no, ioaddr + PNR_ARR); in smc_hardware_send_packet()
1146 outw(PTR_AUTOINC , ioaddr + POINTER); in smc_hardware_send_packet()
1157 outw(0, ioaddr + DATA_1); in smc_hardware_send_packet()
1158 outw(length + 6, ioaddr + DATA_1); in smc_hardware_send_packet()
1159 outsw(ioaddr + DATA_1, buf, length >> 1); in smc_hardware_send_packet()
1162 outw((length & 1) ? 0x2000 | buf[length-1] : 0, ioaddr + DATA_1); in smc_hardware_send_packet()
1167 (inw(ioaddr + INTERRUPT) & 0xff00), in smc_hardware_send_packet()
1168 ioaddr + INTERRUPT); in smc_hardware_send_packet()
1171 outw(MC_ENQUEUE , ioaddr + MMU_CMD); in smc_hardware_send_packet()
1184 unsigned int ioaddr = dev->base_addr; in smc_tx_timeout() local
1187 inw(ioaddr)&0xff, inw(ioaddr + 2)); in smc_tx_timeout()
1199 unsigned int ioaddr = dev->base_addr; in smc_start_xmit() local
1207 skb->len, inw(ioaddr + 2)); in smc_start_xmit()
1234 outw(MC_RESET, ioaddr + MMU_CMD); in smc_start_xmit()
1239 outw(MC_ALLOC | num_pages, ioaddr + MMU_CMD); in smc_start_xmit()
1241 ir = inw(ioaddr+INTERRUPT); in smc_start_xmit()
1244 outw((ir&0xff00) | IM_ALLOC_INT, ioaddr + INTERRUPT); in smc_start_xmit()
1253 outw((IM_ALLOC_INT << 8) | (ir & 0xff00), ioaddr + INTERRUPT); in smc_start_xmit()
1268 unsigned int ioaddr = dev->base_addr; in smc_tx_err() local
1269 int saved_packet = inw(ioaddr + PNR_ARR) & 0xff; in smc_tx_err()
1270 int packet_no = inw(ioaddr + FIFO_PORTS) & 0x7f; in smc_tx_err()
1274 outw(packet_no, ioaddr + PNR_ARR); in smc_tx_err()
1277 outw(PTR_AUTOINC | PTR_READ | 0, ioaddr + POINTER); in smc_tx_err()
1279 tx_status = inw(ioaddr + DATA_1); in smc_tx_err()
1294 outw(inw(ioaddr + TCR) | TCR_ENABLE | smc->duplex, ioaddr + TCR); in smc_tx_err()
1297 outw(MC_FREEPKT, ioaddr + MMU_CMD); /* Free the packet memory. */ in smc_tx_err()
1302 outw(saved_packet, ioaddr + PNR_ARR); in smc_tx_err()
1310 unsigned int ioaddr = dev->base_addr; in smc_eph_irq() local
1314 ephs = inw(ioaddr + EPH); in smc_eph_irq()
1318 card_stats = inw(ioaddr + COUNTER); in smc_eph_irq()
1329 outw(inw(ioaddr + TCR) | TCR_ENABLE | smc->duplex, ioaddr + TCR); in smc_eph_irq()
1333 outw(CTL_AUTO_RELEASE | 0x0000, ioaddr + CONTROL); in smc_eph_irq()
1335 ioaddr + CONTROL); in smc_eph_irq()
1345 unsigned int ioaddr; in smc_interrupt() local
1353 ioaddr = dev->base_addr; in smc_interrupt()
1356 irq, ioaddr); in smc_interrupt()
1360 saved_bank = inw(ioaddr + BANK_SELECT); in smc_interrupt()
1371 saved_pointer = inw(ioaddr + POINTER); in smc_interrupt()
1372 mask = inw(ioaddr + INTERRUPT) >> 8; in smc_interrupt()
1374 outw(0, ioaddr + INTERRUPT); in smc_interrupt()
1377 status = inw(ioaddr + INTERRUPT) & 0xff; in smc_interrupt()
1391 outw(IM_TX_INT, ioaddr + INTERRUPT); in smc_interrupt()
1395 outw(IM_TX_EMPTY_INT, ioaddr + INTERRUPT); in smc_interrupt()
1417 outw(IM_RX_OVRN_INT, ioaddr + INTERRUPT); in smc_interrupt()
1427 outw((mask<<8), ioaddr + INTERRUPT); in smc_interrupt()
1428 outw(saved_pointer, ioaddr + POINTER); in smc_interrupt()
1438 mask_bits(0x00ff, ioaddr-0x10+OSITECH_RESET_ISR); in smc_interrupt()
1439 set_bits(0x0300, ioaddr-0x10+OSITECH_RESET_ISR); in smc_interrupt()
1472 unsigned int ioaddr = dev->base_addr; in smc_rx() local
1479 if (inw(ioaddr + FIFO_PORTS) & FP_RXEMPTY) { in smc_rx()
1485 outw(PTR_READ | PTR_RCV | PTR_AUTOINC, ioaddr + POINTER); in smc_rx()
1486 rx_status = inw(ioaddr + DATA_1); in smc_rx()
1487 packet_length = inw(ioaddr + DATA_1) & 0x07ff; in smc_rx()
1502 outw(MC_RELEASE, ioaddr + MMU_CMD); in smc_rx()
1508 insw(ioaddr+DATA_1, skb_put(skb, packet_length), in smc_rx()
1528 outw(MC_RELEASE, ioaddr + MMU_CMD); in smc_rx()
1544 unsigned int ioaddr = dev->base_addr; in set_rx_mode() local
1573 outb(multicast_table[i], ioaddr + MULTICAST0 + i); in set_rx_mode()
1575 outw(rx_cfg_setting, ioaddr + RCR); in set_rx_mode()
1614 unsigned int ioaddr = dev->base_addr; in smc_set_xcvr() local
1617 saved_bank = inw(ioaddr + BANK_SELECT); in smc_set_xcvr()
1620 outw(smc->cfg | CFG_AUI_SELECT, ioaddr + CONFIG); in smc_set_xcvr()
1623 set_bits(OSI_AUI_PWR, ioaddr - 0x10 + OSITECH_AUI_PWR); in smc_set_xcvr()
1626 outw(smc->cfg, ioaddr + CONFIG); in smc_set_xcvr()
1629 mask_bits(~OSI_AUI_PWR, ioaddr - 0x10 + OSITECH_AUI_PWR); in smc_set_xcvr()
1637 unsigned int ioaddr = dev->base_addr; in smc_reset() local
1647 outw(RCR_SOFTRESET, ioaddr + RCR); in smc_reset()
1651 outw(RCR_CLEAR, ioaddr + RCR); in smc_reset()
1652 outw(TCR_CLEAR, ioaddr + TCR); in smc_reset()
1660 ioaddr + CONTROL); in smc_reset()
1665 (inw(ioaddr-0x10+OSITECH_AUI_PWR) & 0xff00), in smc_reset()
1666 ioaddr - 0x10 + OSITECH_AUI_PWR); in smc_reset()
1671 ioaddr + ADDR0 + i); in smc_reset()
1675 outw(MC_RESET, ioaddr + MMU_CMD); in smc_reset()
1676 outw(0, ioaddr + INTERRUPT); in smc_reset()
1681 TCR_ENABLE | TCR_PAD_EN | smc->duplex, ioaddr + TCR); in smc_reset()
1701 ioaddr + INTERRUPT); in smc_reset()
1714 unsigned int ioaddr = dev->base_addr; in media_check() local
1721 saved_bank = inw(ioaddr + BANK_SELECT); in media_check()
1730 outw(MC_RESET, ioaddr + MMU_CMD); in media_check()
1733 i = inw(ioaddr + INTERRUPT); in media_check()
1735 media = inw(ioaddr + EPH) & EPH_LINK_OK; in media_check()
1737 media |= (inw(ioaddr + CONFIG) & CFG_AUI_SELECT) ? 2 : 1; in media_check()
1761 saved_bank = inw(ioaddr + BANK_SELECT); in media_check()
1787 outw(inw(ioaddr + TCR) | smc->duplex, ioaddr + TCR); in media_check()
1834 unsigned int ioaddr = dev->base_addr; in smc_link_ok() local
1841 return inw(ioaddr + EPH) & EPH_LINK_OK; in smc_link_ok()
1848 unsigned int ioaddr = dev->base_addr; in smc_netdev_get_ecmd() local
1854 tmp = inw(ioaddr + CONFIG); in smc_netdev_get_ecmd()
1858 ecmd->phy_address = ioaddr + MGMT; in smc_netdev_get_ecmd()
1861 tmp = inw(ioaddr + TCR); in smc_netdev_get_ecmd()
1870 unsigned int ioaddr = dev->base_addr; in smc_netdev_set_ecmd() local
1887 tmp = inw(ioaddr + TCR); in smc_netdev_set_ecmd()
1892 outw(tmp, ioaddr + TCR); in smc_netdev_set_ecmd()
1913 unsigned int ioaddr = dev->base_addr; in smc_get_settings() local
1914 u16 saved_bank = inw(ioaddr + BANK_SELECT); in smc_get_settings()
1932 unsigned int ioaddr = dev->base_addr; in smc_set_settings() local
1933 u16 saved_bank = inw(ioaddr + BANK_SELECT); in smc_set_settings()
1951 unsigned int ioaddr = dev->base_addr; in smc_get_link() local
1952 u16 saved_bank = inw(ioaddr + BANK_SELECT); in smc_get_link()
1968 unsigned int ioaddr = dev->base_addr; in smc_nway_reset() local
1969 u16 saved_bank = inw(ioaddr + BANK_SELECT); in smc_nway_reset()
1996 unsigned int ioaddr = dev->base_addr; in smc_ioctl() local
2003 saved_bank = inw(ioaddr + BANK_SELECT); in smc_ioctl()