90 		priv->hw->mac->set_eee_mode(priv->ioaddr);  in sxgbe_enable_eee_mode()
96 	priv->hw->mac->reset_eee_mode(priv->ioaddr);  in sxgbe_disable_eee_mode()
141 		priv->hw->mac->set_eee_timer(priv->ioaddr,  in sxgbe_eee_init()
160 		priv->hw->mac->set_eee_pls(priv->ioaddr, priv->phydev->link);  in sxgbe_eee_adjust()
237 			priv->hw->mac->set_speed(priv->ioaddr, speed);  in sxgbe_adjust_link()
709 			priv->hw->mtl->set_tx_mtl_mode(priv->ioaddr, queue_num,  in sxgbe_mtl_operation_mode()
715 			priv->hw->mtl->set_rx_mtl_mode(priv->ioaddr, queue_num,  in sxgbe_mtl_operation_mode()
721 			priv->hw->mtl->set_tx_mtl_mode(priv->ioaddr, queue_num,  in sxgbe_mtl_operation_mode()
725 			priv->hw->mtl->set_rx_mtl_mode(priv->ioaddr, queue_num,  in sxgbe_mtl_operation_mode()
835 	priv->hw->dma->stop_tx_queue(priv->ioaddr, queue_num);  in sxgbe_restart_tx_queue()
845 	priv->hw->dma->start_tx_queue(priv->ioaddr, queue_num);  in sxgbe_restart_tx_queue()
885 	rval = priv->hw->mac->get_hw_feature(priv->ioaddr, 0);  in sxgbe_get_hw_features()
902 	rval = priv->hw->mac->get_hw_feature(priv->ioaddr, 1);  in sxgbe_get_hw_features()
917 	rval = priv->hw->mac->get_hw_feature(priv->ioaddr, 2);  in sxgbe_get_hw_features()
941 					     priv->ioaddr,  in sxgbe_check_ether_addr()
970 		priv->hw->dma->cha_init(priv->ioaddr, queue_num,  in sxgbe_init_dma_engine()
976 	return priv->hw->dma->init(priv->ioaddr, fixed_burst, burst_map);  in sxgbe_init_dma_engine()
990 		priv->hw->mtl->mtl_set_txfifosize(priv->ioaddr, queue_num,  in sxgbe_init_mtl_engine()
992 		priv->hw->mtl->mtl_enable_txqueue(priv->ioaddr, queue_num);  in sxgbe_init_mtl_engine()
1007 		priv->hw->mtl->mtl_disable_txqueue(priv->ioaddr, queue_num);  in sxgbe_disable_mtl_engine()
1101 	priv->hw->mac->set_umac_addr(priv->ioaddr, dev->dev_addr, 0);  in sxgbe_open()
1104 	priv->hw->mac->core_init(priv->ioaddr);  in sxgbe_open()
1106 		priv->hw->mac->enable_rxqueue(priv->ioaddr, queue_num);  in sxgbe_open()
1159 	priv->hw->mac->enable_tx(priv->ioaddr, true);  in sxgbe_open()
1160 	priv->hw->mac->enable_rx(priv->ioaddr, true);  in sxgbe_open()
1173 	priv->hw->dma->start_tx(priv->ioaddr, SXGBE_TX_QUEUES);  in sxgbe_open()
1174 	priv->hw->dma->start_rx(priv->ioaddr, SXGBE_RX_QUEUES);  in sxgbe_open()
1184 		priv->hw->dma->rx_watchdog(priv->ioaddr, SXGBE_MAX_DMA_RIWT);  in sxgbe_open()
1233 	priv->hw->dma->stop_tx(priv->ioaddr, SXGBE_TX_QUEUES);  in sxgbe_release()
1234 	priv->hw->dma->stop_rx(priv->ioaddr, SXGBE_RX_QUEUES);  in sxgbe_release()
1243 	priv->hw->mac->enable_tx(priv->ioaddr, false);  in sxgbe_release()
1244 	priv->hw->mac->enable_rx(priv->ioaddr, false);  in sxgbe_release()
1438 	priv->hw->dma->enable_dma_transmission(priv->ioaddr, txq_index);  in sxgbe_xmit()
1583 		priv->hw->dma->enable_dma_irq(priv->ioaddr, qnum);  in sxgbe_poll()
1618 	status = priv->hw->mac->host_irq_status(priv->ioaddr, &priv->xstats);  in sxgbe_common_interrupt()
1649 	status = priv->hw->dma->tx_dma_int_status(priv->ioaddr, txq->queue_no,  in sxgbe_tx_interrupt()
1665 		priv->hw->mtl->set_tx_mtl_mode(priv->ioaddr,  in sxgbe_tx_interrupt()
1686 	status = priv->hw->dma->rx_dma_int_status(priv->ioaddr, rxq->queue_no,  in sxgbe_rx_interrupt()
1690 		priv->hw->dma->disable_dma_irq(priv->ioaddr, rxq->queue_no);  in sxgbe_rx_interrupt()
1700 		priv->hw->mtl->set_rx_mtl_mode(priv->ioaddr,  in sxgbe_rx_interrupt()
1708 static inline u64 sxgbe_get_stat64(void __iomem *ioaddr, int reg_lo, int reg_hi)  in sxgbe_get_stat64()  argument
1710 	u64 val = readl(ioaddr + reg_lo);  in sxgbe_get_stat64()
1712 	val |= ((u64)readl(ioaddr + reg_hi)) << 32;  in sxgbe_get_stat64()
1732 	void __iomem *ioaddr = priv->ioaddr;  in sxgbe_get_stats64()  local
1739 	writel(SXGBE_MMC_CTRL_CNT_FRZ, ioaddr + SXGBE_MMC_CTL_REG);  in sxgbe_get_stats64()
1741 	stats->rx_bytes = sxgbe_get_stat64(ioaddr,  in sxgbe_get_stats64()
1745 	stats->rx_packets = sxgbe_get_stat64(ioaddr,  in sxgbe_get_stats64()
1749 	stats->multicast = sxgbe_get_stat64(ioaddr,  in sxgbe_get_stats64()
1753 	stats->rx_crc_errors = sxgbe_get_stat64(ioaddr,  in sxgbe_get_stats64()
1757 	stats->rx_length_errors = sxgbe_get_stat64(ioaddr,  in sxgbe_get_stats64()
1761 	stats->rx_missed_errors = sxgbe_get_stat64(ioaddr,  in sxgbe_get_stats64()
1765 	stats->tx_bytes = sxgbe_get_stat64(ioaddr,  in sxgbe_get_stats64()
1769 	count = sxgbe_get_stat64(ioaddr, SXGBE_MMC_TXFRAMELO_GBCNT_REG,  in sxgbe_get_stats64()
1772 	stats->tx_errors = sxgbe_get_stat64(ioaddr, SXGBE_MMC_TXFRAMELO_GCNT_REG,  in sxgbe_get_stats64()
1776 	stats->tx_fifo_errors = sxgbe_get_stat64(ioaddr, SXGBE_MMC_TXUFLWLO_GBCNT_REG,  in sxgbe_get_stats64()
1778 	writel(0, ioaddr + SXGBE_MMC_CTL_REG);  in sxgbe_get_stats64()
1801 			priv->hw->mac->enable_rx_csum(priv->ioaddr);  in sxgbe_set_features()
1804 			priv->hw->mac->disable_rx_csum(priv->ioaddr);  in sxgbe_set_features()
1850 static void sxgbe_set_umac_addr(void __iomem *ioaddr, unsigned char *addr,  in sxgbe_set_umac_addr()  argument
1860 	writel(data | SXGBE_HI_REG_AE, ioaddr + SXGBE_ADDR_HIGH(reg_n));  in sxgbe_set_umac_addr()
1862 	writel(data, ioaddr + SXGBE_ADDR_LOW(reg_n));  in sxgbe_set_umac_addr()
1879 	void __iomem *ioaddr = (void __iomem *)priv->ioaddr;  in sxgbe_set_rx_mode()  local
1894 		writel(0xffffffff, ioaddr + SXGBE_HASH_HIGH);  in sxgbe_set_rx_mode()
1895 		writel(0xffffffff, ioaddr + SXGBE_HASH_LOW);  in sxgbe_set_rx_mode()
1914 		writel(mc_filter[0], ioaddr + SXGBE_HASH_LOW);  in sxgbe_set_rx_mode()
1915 		writel(mc_filter[1], ioaddr + SXGBE_HASH_HIGH);  in sxgbe_set_rx_mode()
1926 			sxgbe_set_umac_addr(ioaddr, ha->addr, reg);  in sxgbe_set_rx_mode()
1934 	writel(value, ioaddr + SXGBE_FRAME_FILTER);  in sxgbe_set_rx_mode()
1937 		   readl(ioaddr + SXGBE_FRAME_FILTER),  in sxgbe_set_rx_mode()
1938 		   readl(ioaddr + SXGBE_HASH_HIGH),  in sxgbe_set_rx_mode()
1939 		   readl(ioaddr + SXGBE_HASH_LOW));  in sxgbe_set_rx_mode()
2048 	ctrl_ids = priv->hw->mac->get_controller_version(priv->ioaddr);  in sxgbe_hw_init()
2115 	priv->ioaddr = addr;  in sxgbe_drv_probe()
2117 	ret = sxgbe_sw_reset(priv->ioaddr);  in sxgbe_drv_probe()
2154 			priv->hw->dma->enable_tso(priv->ioaddr, queue_num);  in sxgbe_drv_probe()
2160 		priv->hw->mac->enable_rx_csum(priv->ioaddr);  in sxgbe_drv_probe()
2242 		priv->hw->mac->disable_rxqueue(priv->ioaddr, queue_num);  in sxgbe_drv_remove()
2245 	priv->hw->dma->stop_rx(priv->ioaddr, SXGBE_RX_QUEUES);  in sxgbe_drv_remove()
2246 	priv->hw->dma->stop_tx(priv->ioaddr, SXGBE_TX_QUEUES);  in sxgbe_drv_remove()
2248 	priv->hw->mac->enable_tx(priv->ioaddr, false);  in sxgbe_drv_remove()
2249 	priv->hw->mac->enable_rx(priv->ioaddr, false);  in sxgbe_drv_remove()