420 static u32 sh_eth_read(struct net_device *ndev, int enum_index)  in sh_eth_read()  function
471 		sh_eth_write(ndev, sh_eth_read(ndev, ECMR) | ECMR_DM, ECMR);  in sh_eth_set_duplex()
473 		sh_eth_write(ndev, sh_eth_read(ndev, ECMR) & ~ECMR_DM, ECMR);  in sh_eth_set_duplex()
483 		sh_eth_write(ndev, sh_eth_read(ndev, ECMR) & ~ECMR_ELB, ECMR);  in sh_eth_set_rate_r8a777x()
486 		sh_eth_write(ndev, sh_eth_read(ndev, ECMR) | ECMR_ELB, ECMR);  in sh_eth_set_rate_r8a777x()
548 		sh_eth_write(ndev, sh_eth_read(ndev, ECMR) & ~ECMR_RTM, ECMR);  in sh_eth_set_rate_sh7724()
551 		sh_eth_write(ndev, sh_eth_read(ndev, ECMR) | ECMR_RTM, ECMR);  in sh_eth_set_rate_sh7724()
906 		if (!(sh_eth_read(ndev, EDMR) & 0x3))  in sh_eth_check_reset()
925 		sh_eth_write(ndev, sh_eth_read(ndev, EDMR) | EDMR_SRST_GETHER,  in sh_eth_reset()
950 		sh_eth_write(ndev, sh_eth_read(ndev, EDMR) | EDMR_SRST_ETHER,  in sh_eth_reset()
953 		sh_eth_write(ndev, sh_eth_read(ndev, EDMR) & ~EDMR_SRST_ETHER,  in sh_eth_reset()
1014 		ndev->dev_addr[0] = (sh_eth_read(ndev, MAHR) >> 24);  in read_mac_address()
1015 		ndev->dev_addr[1] = (sh_eth_read(ndev, MAHR) >> 16) & 0xFF;  in read_mac_address()
1016 		ndev->dev_addr[2] = (sh_eth_read(ndev, MAHR) >> 8) & 0xFF;  in read_mac_address()
1017 		ndev->dev_addr[3] = (sh_eth_read(ndev, MAHR) & 0xFF);  in read_mac_address()
1018 		ndev->dev_addr[4] = (sh_eth_read(ndev, MALR) >> 8) & 0xFF;  in read_mac_address()
1019 		ndev->dev_addr[5] = (sh_eth_read(ndev, MALR) & 0xFF);  in read_mac_address()
1340 	sh_eth_write(ndev, sh_eth_read(ndev, EESR), EESR);  in sh_eth_dev_init()
1347 	val = (sh_eth_read(ndev, ECMR) & ECMR_DM) |  in sh_eth_dev_init()
1570 	if (!(sh_eth_read(ndev, EDRRR) & EDRRR_R)) {  in sh_eth_rx()
1574 			u32 count = (sh_eth_read(ndev, RDFAR) -  in sh_eth_rx()
1575 				     sh_eth_read(ndev, RDLAR)) >> 4;  in sh_eth_rx()
1591 	sh_eth_write(ndev, sh_eth_read(ndev, ECMR) &  in sh_eth_rcv_snd_disable()
1598 	sh_eth_write(ndev, sh_eth_read(ndev, ECMR) |  in sh_eth_rcv_snd_enable()
1611 		felic_stat = sh_eth_read(ndev, ECSR);  in sh_eth_error()
1620 				link_stat = (sh_eth_read(ndev, PSR));  in sh_eth_error()
1628 				sh_eth_write(ndev, sh_eth_read(ndev, EESIPR) &  in sh_eth_error()
1631 				sh_eth_write(ndev, sh_eth_read(ndev, ECSR),  in sh_eth_error()
1633 				sh_eth_write(ndev, sh_eth_read(ndev, EESIPR) |  in sh_eth_error()
1691 		u32 edtrr = sh_eth_read(ndev, EDTRR);  in sh_eth_error()
1721 	intr_status = sh_eth_read(ndev, EESR);  in sh_eth_interrupt()
1727 	intr_enable = sh_eth_read(ndev, EESIPR);  in sh_eth_interrupt()
1783 		intr_status = sh_eth_read(ndev, EESR);  in sh_eth_poll()
1825 				     sh_eth_read(ndev, ECMR) & ~ECMR_TXF,  in sh_eth_adjust_link()
2003 #define add_reg(reg) add_reg_from(reg, sh_eth_read(ndev, reg))  in __sh_eth_get_regs()
2357 		  sh_eth_read(ndev, EESR));  in sh_eth_tx_timeout()
2425 	if (!(sh_eth_read(ndev, EDTRR) & sh_eth_get_edtrr_trns(mdp)))  in sh_eth_start_xmit()
2439 	u32 delta = sh_eth_read(ndev, reg);  in sh_eth_update_stat()
2770 	ecmr_bits = sh_eth_read(ndev, ECMR) & ~ECMR_PRM;  in sh_eth_set_rx_mode()