412 	u16 offset = mdp->reg_offset[enum_index];  in sh_eth_write()
423 	u16 offset = mdp->reg_offset[enum_index];  in sh_eth_read()
433 	return mdp->reg_offset == sh_eth_offset_gigabit;  in sh_eth_is_gether()
438 	return mdp->reg_offset == sh_eth_offset_fast_rz;  in sh_eth_is_rz_fast_ether()
1573 		    mdp->reg_offset[RDFAR] != SH_ETH_OFFSET_INVALID) {  in sh_eth_rx()
1995 		if (mdp->reg_offset[reg] != SH_ETH_OFFSET_INVALID) {	\  in __sh_eth_get_regs()
2103 		if (mdp->reg_offset[TSU_ADRH0] != SH_ETH_OFFSET_INVALID) {  in __sh_eth_get_regs()
2114 						mdp->reg_offset[TSU_ADRH0] +  in __sh_eth_get_regs()
2548 	void *reg_offset;  in sh_eth_tsu_enable_cam_entry_post()  local
2550 	reg_offset = sh_eth_tsu_get_post_reg_offset(mdp, entry);  in sh_eth_tsu_enable_cam_entry_post()
2551 	tmp = ioread32(reg_offset);  in sh_eth_tsu_enable_cam_entry_post()
2552 	iowrite32(tmp | sh_eth_tsu_get_post_bit(mdp, entry), reg_offset);  in sh_eth_tsu_enable_cam_entry_post()
2560 	void *reg_offset;  in sh_eth_tsu_disable_cam_entry_post()  local
2562 	reg_offset = sh_eth_tsu_get_post_reg_offset(mdp, entry);  in sh_eth_tsu_disable_cam_entry_post()
2566 	tmp = ioread32(reg_offset);  in sh_eth_tsu_disable_cam_entry_post()
2567 	iowrite32(tmp & ~post_mask, reg_offset);  in sh_eth_tsu_disable_cam_entry_post()
2626 	void *reg_offset = sh_eth_tsu_get_offset(mdp, TSU_ADRH0);  in sh_eth_tsu_find_entry()  local
2630 	for (i = 0; i < SH_ETH_TSU_CAM_ENTRIES; i++, reg_offset += 8) {  in sh_eth_tsu_find_entry()
2631 		sh_eth_tsu_read_entry(reg_offset, c_addr);  in sh_eth_tsu_find_entry()
2653 	void *reg_offset = sh_eth_tsu_get_offset(mdp, TSU_ADRH0);  in sh_eth_tsu_disable_cam_entry_table()  local
2661 	ret = sh_eth_tsu_write_entry(ndev, reg_offset + entry * 8, blank);  in sh_eth_tsu_disable_cam_entry_table()
2670 	void *reg_offset = sh_eth_tsu_get_offset(mdp, TSU_ADRH0);  in sh_eth_tsu_add_entry()  local
2682 		ret = sh_eth_tsu_write_entry(ndev, reg_offset + i * 8, addr);  in sh_eth_tsu_add_entry()
2745 	void *reg_offset = sh_eth_tsu_get_offset(mdp, TSU_ADRH0);  in sh_eth_tsu_purge_mcast()  local
2751 	for (i = 0; i < SH_ETH_TSU_CAM_ENTRIES; i++, reg_offset += 8) {  in sh_eth_tsu_purge_mcast()
2752 		sh_eth_tsu_read_entry(reg_offset, addr);  in sh_eth_tsu_purge_mcast()
2927 	bitbang->addr = mdp->addr + mdp->reg_offset[PIR];  in sh_mdio_init()
2978 	const u16 *reg_offset = NULL;  in sh_eth_get_register_offset()  local
2982 		reg_offset = sh_eth_offset_gigabit;  in sh_eth_get_register_offset()
2985 		reg_offset = sh_eth_offset_fast_rz;  in sh_eth_get_register_offset()
2988 		reg_offset = sh_eth_offset_fast_rcar;  in sh_eth_get_register_offset()
2991 		reg_offset = sh_eth_offset_fast_sh4;  in sh_eth_get_register_offset()
2994 		reg_offset = sh_eth_offset_fast_sh3_sh2;  in sh_eth_get_register_offset()
3000 	return reg_offset;  in sh_eth_get_register_offset()
3146 	mdp->reg_offset = sh_eth_get_register_offset(mdp->cd->register_type);  in sh_eth_drv_probe()
3147 	if (!mdp->reg_offset) {  in sh_eth_drv_probe()