48 		if ((ravb_read(ndev, reg) & mask) == value)  in ravb_wait()
60 	ravb_write(ndev, (ravb_read(ndev, CCC) & ~CCC_OPC) | CCC_OPC_CONFIG,  in ravb_config()
73 	u32 ecmr = ravb_read(ndev, ECMR);  in ravb_set_duplex()
116 		ndev->dev_addr[0] = (ravb_read(ndev, MAHR) >> 24);  in ravb_read_mac_address()
117 		ndev->dev_addr[1] = (ravb_read(ndev, MAHR) >> 16) & 0xFF;  in ravb_read_mac_address()
118 		ndev->dev_addr[2] = (ravb_read(ndev, MAHR) >> 8) & 0xFF;  in ravb_read_mac_address()
119 		ndev->dev_addr[3] = (ravb_read(ndev, MAHR) >> 0) & 0xFF;  in ravb_read_mac_address()
120 		ndev->dev_addr[4] = (ravb_read(ndev, MALR) >> 8) & 0xFF;  in ravb_read_mac_address()
121 		ndev->dev_addr[5] = (ravb_read(ndev, MALR) >> 0) & 0xFF;  in ravb_read_mac_address()
129 	u32 pir = ravb_read(priv->ndev, PIR);  in ravb_mdio_ctrl()
162 	return (ravb_read(priv->ndev, PIR) & PIR_MDI) != 0;  in ravb_get_mdio_data()
347 	ecmr =  ravb_read(ndev, ECMR);  in ravb_emac_init()
394 	ravb_write(ndev, ravb_read(ndev, CCC) & ~CCC_BOC, CCC);  in ravb_dmac_init()
396 	ravb_write(ndev, ravb_read(ndev, CCC) | CCC_BOC, CCC);  in ravb_dmac_init()
417 	ravb_write(ndev, (ravb_read(ndev, CCC) & ~CCC_OPC) | CCC_OPC_OPERATION,  in ravb_dmac_init()
472 	count = (ravb_read(ndev, TSR) & TSR_TFFL) >> 8;  in ravb_get_tx_tstamp()
474 		tfa2 = ravb_read(ndev, TFA2);  in ravb_get_tx_tstamp()
476 		ts.tv_nsec = (u64)ravb_read(ndev, TFA0);  in ravb_get_tx_tstamp()
478 			    ravb_read(ndev, TFA1);  in ravb_get_tx_tstamp()
492 		ravb_write(ndev, ravb_read(ndev, TCCR) | TCCR_TFR, TCCR);  in ravb_get_tx_tstamp()
612 	ravb_write(ndev, ravb_read(ndev, ECMR) & ~(ECMR_RE | ECMR_TE), ECMR);  in ravb_rcv_snd_disable()
618 	ravb_write(ndev, ravb_read(ndev, ECMR) | ECMR_RE | ECMR_TE, ECMR);  in ravb_rcv_snd_enable()
655 	ecsr = ravb_read(ndev, ECSR);  in ravb_emac_interrupt()
663 		psr = ravb_read(ndev, PSR);  in ravb_emac_interrupt()
682 	eis = ravb_read(ndev, EIS);  in ravb_error_interrupt()
685 		ris2 = ravb_read(ndev, RIS2);  in ravb_error_interrupt()
711 	iss = ravb_read(ndev, ISS);  in ravb_interrupt()
715 		u32 ris0 = ravb_read(ndev, RIS0);  in ravb_interrupt()
716 		u32 ric0 = ravb_read(ndev, RIC0);  in ravb_interrupt()
717 		u32 tis  = ravb_read(ndev, TIS);  in ravb_interrupt()
718 		u32 tic  = ravb_read(ndev, TIC);  in ravb_interrupt()
783 		tis = ravb_read(ndev, TIS);  in ravb_poll()
784 		ris0 = ravb_read(ndev, RIS0);  in ravb_poll()
811 	ravb_write(ndev, ravb_read(ndev, RIC0) | mask, RIC0);  in ravb_poll()
812 	ravb_write(ndev, ravb_read(ndev, TIC)  | mask,  TIC);  in ravb_poll()
851 			ravb_write(ndev, ravb_read(ndev, ECMR) & ~ECMR_TXF,  in ravb_adjust_link()
1267 		  ravb_read(ndev, ISS));  in ravb_tx_timeout()
1379 	ravb_write(ndev, ravb_read(ndev, TCCR) | (TCCR_TSRQ0 << q), TCCR);  in ravb_start_xmit()
1418 	nstats->tx_dropped += ravb_read(ndev, TROCR);  in ravb_get_stats()
1420 	nstats->collisions += ravb_read(ndev, CDCR);  in ravb_get_stats()
1422 	nstats->tx_carrier_errors += ravb_read(ndev, LCCR);  in ravb_get_stats()
1425 	nstats->tx_carrier_errors += ravb_read(ndev, CERCR);  in ravb_get_stats()
1427 	nstats->tx_carrier_errors += ravb_read(ndev, CEECR);  in ravb_get_stats()
1457 	ecmr = ravb_read(ndev, ECMR);  in ravb_set_rx_mode()
1755 	ravb_write(ndev, (ravb_read(ndev, CCC) & ~CCC_OPC) | CCC_OPC_CONFIG,  in ravb_probe()
1759 	ravb_write(ndev, (ravb_read(ndev, CCC) & ~CCC_CSEL) | CCC_CSEL_HPB,  in ravb_probe()
1766 	ravb_write(ndev, ravb_read(ndev, GCCR) | GCCR_LTI, GCCR);  in ravb_probe()