103 #define RTL_W16(reg, val16)	writew ((val16), ioaddr + (reg))  macro
1538 	RTL_W16(IntrStatus, bits);  in rtl_ack_events()
1546 	RTL_W16(IntrMask, 0);  in rtl_irq_disable()
1554 	RTL_W16(IntrMask, bits);  in rtl_irq_enable()
2066 	RTL_W16(CPlusCmd, tp->cp_cmd);  in __rtl8169_set_features()
5284 	RTL_W16(CPlusCmd, cmd);  in rtl_rw_cpluscmd()
5291 	RTL_W16(RxMaxSize, rx_buf_sz + 1);  in rtl_set_rx_max_size()
5379 		RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) | PCIMulRW);  in rtl_hw_start_8169()
5411 	RTL_W16(CPlusCmd, tp->cp_cmd);  in rtl_hw_start_8169()
5419 	RTL_W16(IntrMitigate, 0x0000);  in rtl_hw_start_8169()
5441 	RTL_W16(MultiIntr, RTL_R16(MultiIntr) & 0xf000);  in rtl_hw_start_8169()
5652 	RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) & ~R8168_CPCMD_QUIRK_MASK);  in rtl_hw_start_8168bb()
5685 	RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) & ~R8168_CPCMD_QUIRK_MASK);  in __rtl_hw_start_8168cp()
5717 	RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) & ~R8168_CPCMD_QUIRK_MASK);  in rtl_hw_start_8168cp_2()
5737 	RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) & ~R8168_CPCMD_QUIRK_MASK);  in rtl_hw_start_8168cp_3()
5798 	RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) & ~R8168_CPCMD_QUIRK_MASK);  in rtl_hw_start_8168d()
6306 	RTL_W16(CPlusCmd, tp->cp_cmd);  in rtl_hw_start_8168()
6308 	RTL_W16(IntrMitigate, 0x5151);  in rtl_hw_start_8168()
6432 	RTL_W16(MultiIntr, RTL_R16(MultiIntr) & 0xf000);  in rtl_hw_start_8168()
6599 	RTL_W16(CPlusCmd, tp->cp_cmd);  in rtl_hw_start_8101()
6643 	RTL_W16(IntrMitigate, 0x0000);  in rtl_hw_start_8101()
6651 	RTL_W16(MultiIntr, RTL_R16(MultiIntr) & 0xf000);  in rtl_hw_start_8101()
7249 		RTL_W16(CPlusCmd, tp->cp_cmd);  in rtl8169_pcierr_interrupt()