105 #define RTL_R8(reg)		readb (ioaddr + (reg))  macro
1389 	return RTL_R8(IBISR0) & 0x02;  in DECLARE_RTL_COND()
1396 	RTL_W8(IBCR2, RTL_R8(IBCR2) & ~0x01);  in rtl8168ep_stop_cmac()
1398 	RTL_W8(IBISR0, RTL_R8(IBISR0) | 0x20);  in rtl8168ep_stop_cmac()
1399 	RTL_W8(IBCR0, RTL_R8(IBCR0) & ~0x01);  in rtl8168ep_stop_cmac()
1572 	RTL_R8(ChipCmd);  in rtl8169_irq_mask_and_ack()
1594 	return RTL_R8(PHYstatus) & LinkStatus;  in rtl8169_xmii_link_ok()
1622 		if (RTL_R8(PHYstatus) & _1000bpsF) {  in rtl_link_chg_patch()
1627 		} else if (RTL_R8(PHYstatus) & _100bps) {  in rtl_link_chg_patch()
1645 		if (RTL_R8(PHYstatus) & _1000bpsF) {  in rtl_link_chg_patch()
1657 		if (RTL_R8(PHYstatus) & _10bps) {  in rtl_link_chg_patch()
1704 	options = RTL_R8(Config1);  in __rtl8169_get_wol()
1708 	options = RTL_R8(Config3);  in __rtl8169_get_wol()
1738 	options = RTL_R8(Config5);  in __rtl8169_get_wol()
1821 		options = RTL_R8(cfg[i].reg) & ~cfg[i].mask;  in __rtl8169_set_wol()
1829 		options = RTL_R8(Config1) & ~PMEnable;  in __rtl8169_set_wol()
1835 		options = RTL_R8(Config2) & ~PME_SIGNAL;  in __rtl8169_set_wol()
2245 	if ((RTL_R8(ChipCmd) & CmdRxEnb) == 0)  in rtl8169_update_counters()
4396 	    (RTL_R8(PHYstatus) & TBI_Enable);  in rtl_tbi_enabled()
4648 		RTL_W8(PMCH, RTL_R8(PMCH) & ~0x80);  in r810x_pll_power_down()
4669 		RTL_W8(PMCH, RTL_R8(PMCH) | 0xc0);  in r810x_pll_power_up()
4672 		RTL_W8(PMCH, RTL_R8(PMCH) | 0x80);  in r810x_pll_power_up()
4779 		RTL_W8(PMCH, RTL_R8(PMCH) & ~0x80);  in r8168_pll_power_down()
4786 		RTL_W8(PMCH, RTL_R8(PMCH) & ~0x80);  in r8168_pll_power_down()
4803 		RTL_W8(PMCH, RTL_R8(PMCH) | 0x80);  in r8168_pll_power_up()
4810 		RTL_W8(PMCH, RTL_R8(PMCH) | 0xc0);  in r8168_pll_power_up()
4815 		RTL_W8(PMCH, RTL_R8(PMCH) | 0xc0);  in r8168_pll_power_up()
4986 	RTL_W8(Config3, RTL_R8(Config3) | Jumbo_En0);  in r8168c_hw_jumbo_enable()
4987 	RTL_W8(Config4, RTL_R8(Config4) | Jumbo_En1);  in r8168c_hw_jumbo_enable()
4995 	RTL_W8(Config3, RTL_R8(Config3) & ~Jumbo_En0);  in r8168c_hw_jumbo_disable()
4996 	RTL_W8(Config4, RTL_R8(Config4) & ~Jumbo_En1);  in r8168c_hw_jumbo_disable()
5004 	RTL_W8(Config3, RTL_R8(Config3) | Jumbo_En0);  in r8168dp_hw_jumbo_enable()
5011 	RTL_W8(Config3, RTL_R8(Config3) & ~Jumbo_En0);  in r8168dp_hw_jumbo_disable()
5019 	RTL_W8(Config3, RTL_R8(Config3) | Jumbo_En0);  in r8168e_hw_jumbo_enable()
5020 	RTL_W8(Config4, RTL_R8(Config4) | 0x01);  in r8168e_hw_jumbo_enable()
5029 	RTL_W8(Config3, RTL_R8(Config3) & ~Jumbo_En0);  in r8168e_hw_jumbo_disable()
5030 	RTL_W8(Config4, RTL_R8(Config4) & ~0x01);  in r8168e_hw_jumbo_disable()
5052 	RTL_W8(Config4, RTL_R8(Config4) | (1 << 0));  in r8168b_1_hw_jumbo_enable()
5061 	RTL_W8(Config4, RTL_R8(Config4) & ~(1 << 0));  in r8168b_1_hw_jumbo_disable()
5130 	return RTL_R8(ChipCmd) & CmdReset;  in DECLARE_RTL_COND()
5197 	return RTL_R8(TxPoll) & NPQ;  in DECLARE_RTL_COND()
5237 		RTL_W8(ChipCmd, RTL_R8(ChipCmd) | StopReq);  in rtl8169_hw_reset()
5240 		RTL_W8(ChipCmd, RTL_R8(ChipCmd) | StopReq);  in rtl8169_hw_reset()
5310 	clk = RTL_R8(Config2) & PCI_Clock_66MHz;  in rtl8169_set_magic_reg()
5434 	RTL_R8(IntrMask);  in rtl_hw_start_8169()
5624 	data = RTL_R8(Config3);  in rtl_pcie_state_l2l3_enable()
5650 	RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en);  in rtl_hw_start_8168bb()
5668 	RTL_W8(Config4, RTL_R8(Config4) & ~(1 << 0));  in rtl_hw_start_8168bef()
5676 	RTL_W8(Config1, RTL_R8(Config1) | Speed_down);  in __rtl_hw_start_8168cp()
5678 	RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en);  in __rtl_hw_start_8168cp()
5712 	RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en);  in rtl_hw_start_8168cp_2()
5727 	RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en);  in rtl_hw_start_8168cp_3()
5879 	RTL_W8(Config5, RTL_R8(Config5) & ~Spi_en);  in rtl_hw_start_8168e_1()
5912 	RTL_W8(MCU, RTL_R8(MCU) & ~NOW_IS_OOB);  in rtl_hw_start_8168e_2()
5915 	RTL_W8(EEE_LED, RTL_R8(EEE_LED) & ~0x07);  in rtl_hw_start_8168e_2()
5917 	RTL_W8(DLLPR, RTL_R8(DLLPR) | PFM_EN);  in rtl_hw_start_8168e_2()
5919 	RTL_W8(Config5, RTL_R8(Config5) & ~Spi_en);  in rtl_hw_start_8168e_2()
5947 	RTL_W8(MCU, RTL_R8(MCU) & ~NOW_IS_OOB);  in rtl_hw_start_8168f()
5948 	RTL_W8(DLLPR, RTL_R8(DLLPR) | PFM_EN);  in rtl_hw_start_8168f()
5950 	RTL_W8(Config5, RTL_R8(Config5) & ~Spi_en);  in rtl_hw_start_8168f()
5970 	RTL_W8(EEE_LED, RTL_R8(EEE_LED) & ~0x07);  in rtl_hw_start_8168f_1()
6017 	RTL_W8(EEE_LED, RTL_R8(EEE_LED) & ~0x07);  in rtl_hw_start_8168g()
6038 	RTL_W8(Config2, RTL_R8(Config2) & ~ClkReqEn);  in rtl_hw_start_8168g_1()
6039 	RTL_W8(Config5, RTL_R8(Config5) & ~ASPM_en);  in rtl_hw_start_8168g_1()
6056 	RTL_W8(Config2, RTL_R8(Config2) & ~ClkReqEn);  in rtl_hw_start_8168g_2()
6057 	RTL_W8(Config5, RTL_R8(Config5) & ~ASPM_en);  in rtl_hw_start_8168g_2()
6075 	RTL_W8(Config2, RTL_R8(Config2) & ~ClkReqEn);  in rtl_hw_start_8411_2()
6076 	RTL_W8(Config5, RTL_R8(Config5) & ~ASPM_en);  in rtl_hw_start_8411_2()
6096 	RTL_W8(Config2, RTL_R8(Config2) & ~ClkReqEn);  in rtl_hw_start_8168h_1()
6097 	RTL_W8(Config5, RTL_R8(Config5) & ~ASPM_en);  in rtl_hw_start_8168h_1()
6127 	RTL_W8(EEE_LED, RTL_R8(EEE_LED) & ~0x07);  in rtl_hw_start_8168h_1()
6129 	RTL_W8(DLLPR, RTL_R8(DLLPR) & ~PFM_EN);  in rtl_hw_start_8168h_1()
6130 	RTL_W8(DLLPR, RTL_R8(MISC_1) & ~PFM_D3COLD_EN);  in rtl_hw_start_8168h_1()
6132 	RTL_W8(DLLPR, RTL_R8(DLLPR) & ~TX_10M_PS_EN);  in rtl_hw_start_8168h_1()
6210 	RTL_W8(EEE_LED, RTL_R8(EEE_LED) & ~0x07);  in rtl_hw_start_8168ep()
6214 	RTL_W8(DLLPR, RTL_R8(DLLPR) & ~TX_10M_PS_EN);  in rtl_hw_start_8168ep()
6231 	RTL_W8(Config2, RTL_R8(Config2) & ~ClkReqEn);  in rtl_hw_start_8168ep_1()
6232 	RTL_W8(Config5, RTL_R8(Config5) & ~ASPM_en);  in rtl_hw_start_8168ep_1()
6248 	RTL_W8(Config2, RTL_R8(Config2) & ~ClkReqEn);  in rtl_hw_start_8168ep_2()
6249 	RTL_W8(Config5, RTL_R8(Config5) & ~ASPM_en);  in rtl_hw_start_8168ep_2()
6254 	RTL_W8(DLLPR, RTL_R8(DLLPR) & ~PFM_EN);  in rtl_hw_start_8168ep_2()
6255 	RTL_W8(DLLPR, RTL_R8(MISC_1) & ~PFM_D3COLD_EN);  in rtl_hw_start_8168ep_2()
6270 	RTL_W8(Config2, RTL_R8(Config2) & ~ClkReqEn);  in rtl_hw_start_8168ep_3()
6271 	RTL_W8(Config5, RTL_R8(Config5) & ~ASPM_en);  in rtl_hw_start_8168ep_3()
6276 	RTL_W8(DLLPR, RTL_R8(DLLPR) & ~PFM_EN);  in rtl_hw_start_8168ep_3()
6277 	RTL_W8(DLLPR, RTL_R8(MISC_1) & ~PFM_D3COLD_EN);  in rtl_hw_start_8168ep_3()
6320 	RTL_R8(IntrMask);  in rtl_hw_start_8168()
6470 	RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en);  in rtl_hw_start_8102e_1()
6472 	cfg1 = RTL_R8(Config1);  in rtl_hw_start_8102e_1()
6489 	RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en);  in rtl_hw_start_8102e_2()
6519 	RTL_W8(MCU, RTL_R8(MCU) | EN_NDP | EN_OOB_RESET);  in rtl_hw_start_8105e_1()
6520 	RTL_W8(DLLPR, RTL_R8(DLLPR) | PFM_EN);  in rtl_hw_start_8105e_1()
6547 	RTL_W8(MCU, RTL_R8(MCU) & ~NOW_IS_OOB);  in rtl_hw_start_8402()
6572 	RTL_W8(MCU, RTL_R8(MCU) | EN_NDP | EN_OOB_RESET);  in rtl_hw_start_8106()
6573 	RTL_W8(DLLPR, RTL_R8(DLLPR) & ~PFM_EN);  in rtl_hw_start_8106()
6649 	RTL_R8(IntrMask);  in rtl_hw_start_8101()
7929 		RTL_R8(ChipCmd);  in rtl_wol_shutdown_quirk()
8060 	cfg2 = RTL_R8(Config2) & ~MSIEnable;  in rtl_try_msi()
8078 	return RTL_R8(MCU) & LINK_LIST_RDY;  in DECLARE_RTL_COND()
8085 	return (RTL_R8(MCU) & RXTX_EMPTY) == RXTX_EMPTY;  in DECLARE_RTL_COND()
8103 	RTL_W8(ChipCmd, RTL_R8(ChipCmd) & ~(CmdTxEnb | CmdRxEnb));  in rtl_hw_init_8168g()
8105 	RTL_W8(MCU, RTL_R8(MCU) & ~NOW_IS_OOB);  in rtl_hw_init_8168g()
8279 	RTL_W8(Config1, RTL_R8(Config1) | PMEnable);  in rtl_init_one()
8280 	RTL_W8(Config5, RTL_R8(Config5) & (BWF | MWF | UWF | LanWake | PMEStatus));  in rtl_init_one()
8301 		if ((RTL_R8(Config3) & LinkUp) != 0)  in rtl_init_one()
8305 		if ((RTL_R8(Config3) & (LinkUp | MagicPacket)) != 0)  in rtl_init_one()
8309 	if ((RTL_R8(Config5) & (UWF | BWF | MWF)) != 0)  in rtl_init_one()
8360 		dev->dev_addr[i] = RTL_R8(MAC0 + i);  in rtl_init_one()