96 	outb(EOC+offset, port + PAR_DATA);  in read_nibble()
97 	outb(RdAddr+offset, port + PAR_DATA);  in read_nibble()
100 	outb(EOC+offset, port + PAR_DATA);  in read_nibble()
111 	outb(Ctrl_LNibRead, ioaddr + PAR_CONTROL);  in read_byte_mode0()
114 	outb(Ctrl_HNibRead, ioaddr + PAR_CONTROL);  in read_byte_mode0()
125 	outb(Ctrl_LNibRead, ioaddr + PAR_CONTROL);  in read_byte_mode2()
128 	outb(Ctrl_HNibRead, ioaddr + PAR_CONTROL);  in read_byte_mode2()
138 	outb(RdAddr | MAR, ioaddr + PAR_DATA);  in read_byte_mode4()
140 	outb(RdAddr | HNib | MAR, ioaddr + PAR_DATA);  in read_byte_mode4()
149 	outb(RdAddr | MAR, ioaddr + PAR_DATA);  in read_byte_mode6()
152 	outb(RdAddr | HNib | MAR, ioaddr + PAR_DATA);  in read_byte_mode6()
162 	outb(EOC | reg, port + PAR_DATA);  in write_reg()
164 	outb(outval, port + PAR_DATA);  in write_reg()
165 	outb(outval, port + PAR_DATA);	/* Double write for PS/2. */  in write_reg()
169 	outb(outval, port + PAR_DATA);  in write_reg()
171 	outb(outval, port + PAR_DATA);  in write_reg()
172 	outb(outval, port + PAR_DATA);  in write_reg()
174 	outb(EOC | outval, port + PAR_DATA);  in write_reg()
182 	outb(outval, port + PAR_DATA);  in write_reg_high()
184 	outb(outval, port + PAR_DATA);  in write_reg_high()
185 	outb(outval, port + PAR_DATA);	/* Double write for PS/2. */  in write_reg_high()
188 	outb(outval, port + PAR_DATA);  in write_reg_high()
190 	outb(outval, port + PAR_DATA);  in write_reg_high()
191 	outb(outval, port + PAR_DATA);  in write_reg_high()
193 	outb(EOC | HNib | outval, port + PAR_DATA);  in write_reg_high()
202 	outb(EOC | reg, port + PAR_DATA); /* Reset the address register. */  in write_reg_byte()
204 	outb(outval, port + PAR_DATA);  in write_reg_byte()
205 	outb(outval, port + PAR_DATA);	/* Double write for PS/2. */  in write_reg_byte()
207 	outb((outval & 0xf0) | (value & 0x0f), port + PAR_DATA);  in write_reg_byte()
208 	outb(value & 0x0f, port + PAR_DATA);  in write_reg_byte()
210 	outb(value, port + PAR_DATA);  in write_reg_byte()
211 	outb(0x10 | value, port + PAR_DATA);  in write_reg_byte()
212 	outb(0x10 | value, port + PAR_DATA);  in write_reg_byte()
214 	outb(EOC  | value, port + PAR_DATA); /* Reset the address register. */  in write_reg_byte()
225 	outb(value & 0x0f, ioaddr + PAR_DATA);  in write_byte_mode0()
226 	outb((value>>4) | 0x10, ioaddr + PAR_DATA);  in write_byte_mode0()
231 	outb(value & 0x0f, ioaddr + PAR_DATA);  in write_byte_mode1()
232 	outb(Ctrl_IRQEN | Ctrl_LNibWrite, ioaddr + PAR_CONTROL);  in write_byte_mode1()
233 	outb((value>>4) | 0x10, ioaddr + PAR_DATA);  in write_byte_mode1()
234 	outb(Ctrl_IRQEN | Ctrl_HNibWrite, ioaddr + PAR_CONTROL);  in write_byte_mode1()
240 	outb(value & 0x0f, ioaddr + PAR_DATA);  in write_word_mode0()
242 	outb((value & 0x0f) | 0x10, ioaddr + PAR_DATA);  in write_word_mode0()
244 	outb(value & 0x0f, ioaddr + PAR_DATA);  in write_word_mode0()
246 	outb((value & 0x0f) | 0x10, ioaddr + PAR_DATA);  in write_word_mode0()