Lines Matching refs:CMR1
283 write_reg_high(ioaddr, CMR1, CMR1h_RESET); in atp_probe1()
285 status = read_nibble(ioaddr, CMR1); in atp_probe1()
311 write_reg_high(ioaddr, CMR1, CMR1h_RxENABLE | CMR1h_TxENABLE); /* Enable Tx and Rx. */ in atp_probe1()
320 write_reg_high(ioaddr, CMR1, CMR1h_TxRxOFF); /* Disable Tx and Rx units. */ in atp_probe1()
338 write_reg_high(ioaddr, CMR1, CMR1h_RESET | CMR1h_MUX); in atp_probe1()
463 write_reg_high(ioaddr, CMR1, CMR1h_RESET); in hardware_init()
476 write_reg_high(ioaddr, CMR1, CMR1h_RxENABLE | CMR1h_TxENABLE); in hardware_init()
494 write_reg(ioaddr, CMR1, CMR1_Xmit); in trigger_send()
623 int read_status = read_nibble(ioaddr, CMR1); in atp_interrupt()
657 write_reg(ioaddr, CMR1, CMR1_ReXmit + CMR1_Xmit); in atp_interrupt()
677 (read_nibble(ioaddr, CMR1) >> 3) & 15); in atp_interrupt()
773 write_reg_high(ioaddr, CMR1, CMR1h_TxENABLE); in net_rx()
774 write_reg_high(ioaddr, CMR1, CMR1h_RxENABLE | CMR1h_TxENABLE); in net_rx()
798 write_reg(ioaddr, CMR1, CMR1_NextPkt); in net_rx()
843 write_reg_high(ioaddr, CMR1, CMR1h_RESET | CMR1h_MUX); in net_close()