1316 				   struct qlcnic_ms_reg_ctrl *ms)  in qlcnic_set_ms_controls()  argument
1318 	ms->control = QLCNIC_MS_CTRL;  in qlcnic_set_ms_controls()
1319 	ms->low = QLCNIC_MS_ADDR_LO;  in qlcnic_set_ms_controls()
1320 	ms->hi = QLCNIC_MS_ADDR_HI;  in qlcnic_set_ms_controls()
1322 		ms->wd[0] = QLCNIC_MS_WRTDATA_LO;  in qlcnic_set_ms_controls()
1323 		ms->rd[0] = QLCNIC_MS_RDDATA_LO;  in qlcnic_set_ms_controls()
1324 		ms->wd[1] = QLCNIC_MS_WRTDATA_HI;  in qlcnic_set_ms_controls()
1325 		ms->rd[1] = QLCNIC_MS_RDDATA_HI;  in qlcnic_set_ms_controls()
1326 		ms->wd[2] = QLCNIC_MS_WRTDATA_ULO;  in qlcnic_set_ms_controls()
1327 		ms->wd[3] = QLCNIC_MS_WRTDATA_UHI;  in qlcnic_set_ms_controls()
1328 		ms->rd[2] = QLCNIC_MS_RDDATA_ULO;  in qlcnic_set_ms_controls()
1329 		ms->rd[3] = QLCNIC_MS_RDDATA_UHI;  in qlcnic_set_ms_controls()
1331 		ms->wd[0] = QLCNIC_MS_WRTDATA_ULO;  in qlcnic_set_ms_controls()
1332 		ms->rd[0] = QLCNIC_MS_RDDATA_ULO;  in qlcnic_set_ms_controls()
1333 		ms->wd[1] = QLCNIC_MS_WRTDATA_UHI;  in qlcnic_set_ms_controls()
1334 		ms->rd[1] = QLCNIC_MS_RDDATA_UHI;  in qlcnic_set_ms_controls()
1335 		ms->wd[2] = QLCNIC_MS_WRTDATA_LO;  in qlcnic_set_ms_controls()
1336 		ms->wd[3] = QLCNIC_MS_WRTDATA_HI;  in qlcnic_set_ms_controls()
1337 		ms->rd[2] = QLCNIC_MS_RDDATA_LO;  in qlcnic_set_ms_controls()
1338 		ms->rd[3] = QLCNIC_MS_RDDATA_HI;  in qlcnic_set_ms_controls()
1341 	ms->ocm_window = OCM_WIN_P3P(off);  in qlcnic_set_ms_controls()
1342 	ms->off = GET_MEM_OFFS_2M(off);  in qlcnic_set_ms_controls()
1349 	struct qlcnic_ms_reg_ctrl ms;  in qlcnic_pci_mem_write_2M()  local
1355 	memset(&ms, 0, sizeof(struct qlcnic_ms_reg_ctrl));  in qlcnic_pci_mem_write_2M()
1362 	qlcnic_set_ms_controls(adapter, off, &ms);  in qlcnic_pci_mem_write_2M()
1365 		return qlcnic_pci_mem_access_direct(adapter, ms.ocm_window,  in qlcnic_pci_mem_write_2M()
1366 						    ms.off, &data, 1);  in qlcnic_pci_mem_write_2M()
1372 	qlcnic_ind_wr(adapter, ms.low, off8);  in qlcnic_pci_mem_write_2M()
1373 	qlcnic_ind_wr(adapter, ms.hi, 0);  in qlcnic_pci_mem_write_2M()
1375 	qlcnic_ind_wr(adapter, ms.control, TA_CTL_ENABLE);  in qlcnic_pci_mem_write_2M()
1376 	qlcnic_ind_wr(adapter, ms.control, QLCNIC_TA_START_ENABLE);  in qlcnic_pci_mem_write_2M()
1379 		temp = qlcnic_ind_rd(adapter, ms.control);  in qlcnic_pci_mem_write_2M()
1390 	qlcnic_ind_wr(adapter, ms.wd[0], qlcnic_ind_rd(adapter, ms.rd[0]));  in qlcnic_pci_mem_write_2M()
1391 	qlcnic_ind_wr(adapter, ms.wd[1], qlcnic_ind_rd(adapter, ms.rd[1]));  in qlcnic_pci_mem_write_2M()
1393 	qlcnic_ind_wr(adapter, ms.wd[2], data & 0xffffffff);  in qlcnic_pci_mem_write_2M()
1394 	qlcnic_ind_wr(adapter, ms.wd[3], (data >> 32) & 0xffffffff);  in qlcnic_pci_mem_write_2M()
1396 	qlcnic_ind_wr(adapter, ms.control, QLCNIC_TA_WRITE_ENABLE);  in qlcnic_pci_mem_write_2M()
1397 	qlcnic_ind_wr(adapter, ms.control, QLCNIC_TA_WRITE_START);  in qlcnic_pci_mem_write_2M()
1400 		temp = qlcnic_ind_rd(adapter, ms.control);  in qlcnic_pci_mem_write_2M()
1424 	struct qlcnic_ms_reg_ctrl ms;  in qlcnic_pci_mem_read_2M()  local
1435 	memset(&ms, 0, sizeof(struct qlcnic_ms_reg_ctrl));  in qlcnic_pci_mem_read_2M()
1436 	qlcnic_set_ms_controls(adapter, off, &ms);  in qlcnic_pci_mem_read_2M()
1439 		return qlcnic_pci_mem_access_direct(adapter, ms.ocm_window,  in qlcnic_pci_mem_read_2M()
1440 						    ms.off, data, 0);  in qlcnic_pci_mem_read_2M()
1446 	qlcnic_ind_wr(adapter, ms.low, off8);  in qlcnic_pci_mem_read_2M()
1447 	qlcnic_ind_wr(adapter, ms.hi, 0);  in qlcnic_pci_mem_read_2M()
1449 	qlcnic_ind_wr(adapter, ms.control, TA_CTL_ENABLE);  in qlcnic_pci_mem_read_2M()
1450 	qlcnic_ind_wr(adapter, ms.control, QLCNIC_TA_START_ENABLE);  in qlcnic_pci_mem_read_2M()
1453 		temp = qlcnic_ind_rd(adapter, ms.control);  in qlcnic_pci_mem_read_2M()
1465 		temp = qlcnic_ind_rd(adapter, ms.rd[3]);  in qlcnic_pci_mem_read_2M()
1467 		val |= qlcnic_ind_rd(adapter, ms.rd[2]);  in qlcnic_pci_mem_read_2M()