Lines Matching refs:intr_tbl
332 prq_sds[i].msi_index = cpu_to_le16(ahw->intr_tbl[i].id); in qlcnic_82xx_fw_cmd_create_rx_ctx()
368 reg2 = ahw->intr_tbl[i].src; in qlcnic_82xx_fw_cmd_create_rx_ctx()
466 msix_id = ahw->intr_tbl[index].id; in qlcnic_82xx_fw_cmd_create_tx_ctx()
502 intr_mask = ahw->intr_tbl[index].src; in qlcnic_82xx_fw_cmd_create_tx_ctx()
780 val = type | (ahw->intr_tbl[i].type << 4); in qlcnic_82xx_config_intrpt()
781 if (ahw->intr_tbl[i].type == QLCNIC_INTRPT_MSIX) in qlcnic_82xx_config_intrpt()
782 val |= (ahw->intr_tbl[i].id << 16); in qlcnic_82xx_config_intrpt()
796 ahw->intr_tbl[i].id); in qlcnic_82xx_config_intrpt()
800 ahw->intr_tbl[i].id = MSW(val); in qlcnic_82xx_config_intrpt()
801 ahw->intr_tbl[i].enabled = 1; in qlcnic_82xx_config_intrpt()
802 ahw->intr_tbl[i].src = cmd.rsp.arg[2]; in qlcnic_82xx_config_intrpt()
804 ahw->intr_tbl[i].id = i; in qlcnic_82xx_config_intrpt()
805 ahw->intr_tbl[i].enabled = 0; in qlcnic_82xx_config_intrpt()
806 ahw->intr_tbl[i].src = 0; in qlcnic_82xx_config_intrpt()