Lines Matching refs:ahw
260 void qlcnic_83xx_register_map(struct qlcnic_hardware_context *ahw) in qlcnic_83xx_register_map() argument
262 ahw->hw_ops = &qlcnic_83xx_hw_ops; in qlcnic_83xx_register_map()
263 ahw->reg_tbl = (u32 *)qlcnic_83xx_reg_tbl; in qlcnic_83xx_register_map()
264 ahw->ext_reg_tbl = (u32 *)qlcnic_83xx_ext_reg_tbl; in qlcnic_83xx_register_map()
288 base = adapter->ahw->pci_base0 + in __qlcnic_set_win_base()
289 QLC_83XX_CRB_WIN_FUNC(adapter->ahw->pci_func); in __qlcnic_set_win_base()
301 struct qlcnic_hardware_context *ahw = adapter->ahw; in qlcnic_83xx_rd_reg_indirect() local
305 return QLCRDX(ahw, QLCNIC_WILDCARD); in qlcnic_83xx_rd_reg_indirect()
317 struct qlcnic_hardware_context *ahw = adapter->ahw; in qlcnic_83xx_wrt_reg_indirect() local
321 QLCWRX(ahw, QLCNIC_WILDCARD, data); in qlcnic_83xx_wrt_reg_indirect()
333 struct qlcnic_hardware_context *ahw = adapter->ahw; in qlcnic_83xx_enable_legacy() local
336 adapter->tgt_status_reg = ahw->pci_base0 + QLC_83XX_INTX_PTR; in qlcnic_83xx_enable_legacy()
337 adapter->tgt_mask_reg = ahw->pci_base0 + QLC_83XX_INTX_MASK; in qlcnic_83xx_enable_legacy()
338 adapter->isr_int_vec = ahw->pci_base0 + QLC_83XX_INTX_TRGR; in qlcnic_83xx_enable_legacy()
360 struct qlcnic_hardware_context *ahw = adapter->ahw; in qlcnic_83xx_setup_intr() local
367 num_msix = ahw->num_msix; in qlcnic_83xx_setup_intr()
376 num_msix = ahw->num_msix; in qlcnic_83xx_setup_intr()
387 ahw->intr_tbl = vzalloc(num_msix * in qlcnic_83xx_setup_intr()
389 if (!ahw->intr_tbl) in qlcnic_83xx_setup_intr()
393 if (adapter->ahw->pci_func >= QLC_MAX_LEGACY_FUNC_SUPP) { in qlcnic_83xx_setup_intr()
395 ahw->pci_func); in qlcnic_83xx_setup_intr()
404 ahw->intr_tbl[i].type = QLCNIC_INTRPT_MSIX; in qlcnic_83xx_setup_intr()
406 ahw->intr_tbl[i].type = QLCNIC_INTRPT_INTX; in qlcnic_83xx_setup_intr()
407 ahw->intr_tbl[i].id = i; in qlcnic_83xx_setup_intr()
408 ahw->intr_tbl[i].src = 0; in qlcnic_83xx_setup_intr()
435 mask = QLCRDX(adapter->ahw, QLCNIC_DEF_INT_MASK); in qlcnic_83xx_enable_legacy_msix_mbx_intr()
436 writel(0, adapter->ahw->pci_base0 + mask); in qlcnic_83xx_enable_legacy_msix_mbx_intr()
443 mask = QLCRDX(adapter->ahw, QLCNIC_DEF_INT_MASK); in qlcnic_83xx_disable_mbx_intr()
444 writel(1, adapter->ahw->pci_base0 + mask); in qlcnic_83xx_disable_mbx_intr()
445 QLCWRX(adapter->ahw, QLCNIC_MBX_INTR_ENBL, 0); in qlcnic_83xx_disable_mbx_intr()
457 cmd->rsp.arg[i] = readl(QLCNIC_MBX_FW(adapter->ahw, i)); in qlcnic_83xx_get_mbx_data()
463 struct qlcnic_hardware_context *ahw = adapter->ahw; in qlcnic_83xx_clear_legacy_intr() local
471 if (QLC_83XX_INTX_FUNC(intr_val) != adapter->ahw->pci_func) { in qlcnic_83xx_clear_legacy_intr()
483 if (QLC_83XX_INTX_FUNC(intr_val) != ahw->pci_func) in qlcnic_83xx_clear_legacy_intr()
501 struct qlcnic_mailbox *mbx = adapter->ahw->mailbox; in qlcnic_83xx_poll_process_aen()
505 resp = QLCRDX(adapter->ahw, QLCNIC_FW_MBX_CTRL); in qlcnic_83xx_poll_process_aen()
509 event = readl(QLCNIC_MBX_FW(adapter->ahw, 0)); in qlcnic_83xx_poll_process_aen()
525 struct qlcnic_hardware_context *ahw = adapter->ahw; in qlcnic_83xx_intr() local
532 if (ahw->diag_test) { in qlcnic_83xx_intr()
533 if (ahw->diag_test == QLCNIC_INTERRUPT_TEST) in qlcnic_83xx_intr()
534 ahw->diag_cnt++; in qlcnic_83xx_intr()
561 adapter->ahw->diag_cnt++; in qlcnic_83xx_tmp_intr()
577 num_msix = adapter->ahw->num_msix - 1; in qlcnic_83xx_free_mbx_intr()
602 val = adapter->msix_entries[adapter->ahw->num_msix - 1].vector; in qlcnic_83xx_setup_mbx_intr()
629 u32 val = QLCRDX(adapter->ahw, QLCNIC_INFORMANT); in qlcnic_83xx_get_func_no()
630 adapter->ahw->pci_func = (val >> 24) & 0xff; in qlcnic_83xx_get_func_no()
638 struct qlcnic_hardware_context *ahw = adapter->ahw; in qlcnic_83xx_cam_lock() local
640 addr = ahw->pci_base0 + QLC_83XX_SEM_LOCK_FUNC(ahw->pci_func); in qlcnic_83xx_cam_lock()
646 ahw->pci_func); in qlcnic_83xx_cam_lock()
659 struct qlcnic_hardware_context *ahw = adapter->ahw; in qlcnic_83xx_cam_unlock() local
661 addr = ahw->pci_base0 + QLC_83XX_SEM_UNLOCK_FUNC(ahw->pci_func); in qlcnic_83xx_cam_unlock()
701 struct qlcnic_hardware_context *ahw = adapter->ahw; in qlcnic_83xx_get_port_info() local
710 if (ahw->port_config & QLC_83XX_10G_CAPABLE) { in qlcnic_83xx_get_port_info()
711 ahw->port_type = QLCNIC_XGBE; in qlcnic_83xx_get_port_info()
712 } else if (ahw->port_config & QLC_83XX_10_CAPABLE || in qlcnic_83xx_get_port_info()
713 ahw->port_config & QLC_83XX_100_CAPABLE || in qlcnic_83xx_get_port_info()
714 ahw->port_config & QLC_83XX_1G_CAPABLE) { in qlcnic_83xx_get_port_info()
715 ahw->port_type = QLCNIC_GBE; in qlcnic_83xx_get_port_info()
717 ahw->port_type = QLCNIC_XGBE; in qlcnic_83xx_get_port_info()
720 if (QLC_83XX_AUTONEG(ahw->port_config)) in qlcnic_83xx_get_port_info()
721 ahw->link_autoneg = AUTONEG_ENABLE; in qlcnic_83xx_get_port_info()
729 struct qlcnic_hardware_context *ahw = adapter->ahw; in qlcnic_83xx_set_mac_filter_count() local
730 u16 act_pci_fn = ahw->total_nic_func; in qlcnic_83xx_set_mac_filter_count()
733 ahw->max_mc_count = QLC_83XX_MAX_MC_COUNT; in qlcnic_83xx_set_mac_filter_count()
740 ahw->max_uc_count = count; in qlcnic_83xx_set_mac_filter_count()
748 val = BIT_2 | ((adapter->ahw->num_msix - 1) << 8); in qlcnic_83xx_enable_mbx_interrupt()
752 QLCWRX(adapter->ahw, QLCNIC_MBX_INTR_ENBL, val); in qlcnic_83xx_enable_mbx_interrupt()
760 struct qlcnic_hardware_context *ahw = adapter->ahw; in qlcnic_83xx_check_vf() local
762 ahw->fw_hal_version = 2; in qlcnic_83xx_check_vf()
771 op_mode = QLCRDX(adapter->ahw, QLC_83XX_DRV_OP_MODE); in qlcnic_83xx_check_vf()
776 ahw->pci_func); in qlcnic_83xx_check_vf()
779 ahw->op_mode = QLCNIC_NON_PRIV_FUNC; in qlcnic_83xx_check_vf()
782 ahw->fw_hal_version); in qlcnic_83xx_check_vf()
826 struct qlcnic_hardware_context *ahw = adapter->ahw; in qlcnic_83xx_poll_for_mbx_completion() local
842 __func__, opcode, cmd->type, ahw->pci_func, ahw->op_mode); in qlcnic_83xx_poll_for_mbx_completion()
843 flush_workqueue(ahw->mailbox->work_q); in qlcnic_83xx_poll_for_mbx_completion()
850 struct qlcnic_mailbox *mbx = adapter->ahw->mailbox; in qlcnic_83xx_issue_cmd()
851 struct qlcnic_hardware_context *ahw = adapter->ahw; in qlcnic_83xx_issue_cmd() local
864 __func__, opcode, cmd->type, ahw->pci_func, in qlcnic_83xx_issue_cmd()
865 ahw->op_mode); in qlcnic_83xx_issue_cmd()
874 __func__, opcode, cmd_type, ahw->pci_func, in qlcnic_83xx_issue_cmd()
875 ahw->op_mode); in qlcnic_83xx_issue_cmd()
887 __func__, opcode, cmd_type, ahw->pci_func, in qlcnic_83xx_issue_cmd()
888 ahw->op_mode); in qlcnic_83xx_issue_cmd()
921 temp = adapter->ahw->fw_hal_version << 29; in qlcnic_83xx_alloc_mbx_args()
945 cmd.req.arg[i] = adapter->ahw->mbox_aen[i]; in qlcnic_83xx_idc_aen_work()
959 clear_bit(QLC_83XX_IDC_COMP_AEN, &adapter->ahw->idc.status); in qlcnic_83xx_handle_idc_comp_aen()
965 struct qlcnic_hardware_context *ahw = adapter->ahw; in __qlcnic_83xx_process_aen() local
970 event[i] = readl(QLCNIC_MBX_FW(ahw, i)); in __qlcnic_83xx_process_aen()
982 adapter->ahw->mbox_aen[i] = QLCNIC_MBX_RSP(event[i]); in __qlcnic_83xx_process_aen()
987 ahw->extend_lb_time = event[1] >> 8 & 0xf; in __qlcnic_83xx_process_aen()
1009 QLCWRX(ahw, QLCNIC_FW_MBX_CTRL, QLCNIC_CLR_OWNER); in __qlcnic_83xx_process_aen()
1015 struct qlcnic_hardware_context *ahw = adapter->ahw; in qlcnic_83xx_process_aen() local
1016 struct qlcnic_mailbox *mbx = ahw->mailbox; in qlcnic_83xx_process_aen()
1020 resp = QLCRDX(ahw, QLCNIC_FW_MBX_CTRL); in qlcnic_83xx_process_aen()
1022 event = readl(QLCNIC_MBX_FW(ahw, 0)); in qlcnic_83xx_process_aen()
1074 struct qlcnic_hardware_context *ahw = adapter->ahw; in qlcnic_83xx_add_rings() local
1079 ahw->hw_ops->alloc_mbx_args(&cmd, adapter, in qlcnic_83xx_add_rings()
1095 intrpt_id = ahw->intr_tbl[i].id; in qlcnic_83xx_add_rings()
1097 intrpt_id = QLCRDX(ahw, QLCNIC_DEF_INT_ID); in qlcnic_83xx_add_rings()
1099 if (adapter->ahw->diag_test != QLCNIC_LOOPBACK_TEST) in qlcnic_83xx_add_rings()
1110 err = ahw->hw_ops->mbx_cmd(adapter, &cmd); in qlcnic_83xx_add_rings()
1122 sds->crb_sts_consumer = ahw->pci_base0 + in qlcnic_83xx_add_rings()
1125 intr_mask = ahw->intr_tbl[i].src; in qlcnic_83xx_add_rings()
1127 intr_mask = QLCRDX(ahw, QLCNIC_DEF_INT_MASK); in qlcnic_83xx_add_rings()
1129 sds->crb_intr_mask = ahw->pci_base0 + intr_mask; in qlcnic_83xx_add_rings()
1175 struct qlcnic_hardware_context *ahw = adapter->ahw; in qlcnic_83xx_create_rx_ctx() local
1217 intrpt_id = ahw->intr_tbl[i].id; in qlcnic_83xx_create_rx_ctx()
1219 intrpt_id = QLCRDX(ahw, QLCNIC_DEF_INT_ID); in qlcnic_83xx_create_rx_ctx()
1220 if (adapter->ahw->diag_test != QLCNIC_LOOPBACK_TEST) in qlcnic_83xx_create_rx_ctx()
1249 err = ahw->hw_ops->mbx_cmd(adapter, &cmd); in qlcnic_83xx_create_rx_ctx()
1264 rds->crb_rcv_producer = ahw->pci_base0 + in qlcnic_83xx_create_rx_ctx()
1268 rds->crb_rcv_producer = ahw->pci_base0 + in qlcnic_83xx_create_rx_ctx()
1273 sds->crb_sts_consumer = ahw->pci_base0 + in qlcnic_83xx_create_rx_ctx()
1276 intr_mask = ahw->intr_tbl[i].src; in qlcnic_83xx_create_rx_ctx()
1278 intr_mask = QLCRDX(ahw, QLCNIC_DEF_INT_MASK); in qlcnic_83xx_create_rx_ctx()
1279 sds->crb_intr_mask = ahw->pci_base0 + intr_mask; in qlcnic_83xx_create_rx_ctx()
1320 struct qlcnic_hardware_context *ahw = adapter->ahw; in qlcnic_83xx_create_tx_ctx() local
1341 msix_id = ahw->intr_tbl[msix_vector].id; in qlcnic_83xx_create_tx_ctx()
1343 msix_id = QLCRDX(ahw, QLCNIC_DEF_INT_ID); in qlcnic_83xx_create_tx_ctx()
1346 if (adapter->ahw->diag_test != QLCNIC_LOOPBACK_TEST) in qlcnic_83xx_create_tx_ctx()
1375 tx->crb_cmd_producer = ahw->pci_base0 + mbx_out->host_prod; in qlcnic_83xx_create_tx_ctx()
1379 intr_mask = ahw->intr_tbl[adapter->drv_sds_rings + ring].src; in qlcnic_83xx_create_tx_ctx()
1380 tx->crb_intr_mask = ahw->pci_base0 + intr_mask; in qlcnic_83xx_create_tx_ctx()
1408 adapter->ahw->diag_test = test; in qlcnic_83xx_diag_alloc_res()
1409 adapter->ahw->linkup = 0; in qlcnic_83xx_diag_alloc_res()
1433 if (adapter->ahw->diag_test == QLCNIC_INTERRUPT_TEST) { in qlcnic_83xx_diag_alloc_res()
1440 if (adapter->ahw->diag_test == QLCNIC_LOOPBACK_TEST) { in qlcnic_83xx_diag_alloc_res()
1441 adapter->ahw->loopback_state = 0; in qlcnic_83xx_diag_alloc_res()
1442 adapter->ahw->hw_ops->setup_link_event(adapter, 1); in qlcnic_83xx_diag_alloc_res()
1457 if (adapter->ahw->diag_test == QLCNIC_INTERRUPT_TEST) { in qlcnic_83xx_diag_free_res()
1468 adapter->ahw->diag_test = 0; in qlcnic_83xx_diag_free_res()
1483 struct qlcnic_hardware_context *ahw = adapter->ahw; in qlcnic_83xx_get_beacon_state() local
1494 ahw->beacon_state = QLC_83XX_BEACON_OFF; in qlcnic_83xx_get_beacon_state()
1496 ahw->beacon_state = QLC_83XX_BEACON_ON; in qlcnic_83xx_get_beacon_state()
1529 adapter->ahw->mbox_reg[i] = cmd.rsp.arg[i+1]; in qlcnic_83xx_config_led()
1561 cmd.req.arg[1] = adapter->ahw->mbox_reg[0]; in qlcnic_83xx_config_led()
1562 cmd.req.arg[2] = adapter->ahw->mbox_reg[1]; in qlcnic_83xx_config_led()
1563 cmd.req.arg[3] = adapter->ahw->mbox_reg[2]; in qlcnic_83xx_config_led()
1565 cmd.req.arg[4] = adapter->ahw->mbox_reg[3]; in qlcnic_83xx_config_led()
1581 if (adapter->ahw->op_mode == QLCNIC_NON_PRIV_FUNC) { in qlcnic_83xx_set_led()
1661 cmd.req.arg[1] = adapter->ahw->port_config; in qlcnic_83xx_set_port_config()
1682 adapter->ahw->port_config = cmd.rsp.arg[1]; in qlcnic_83xx_get_port_config()
1759 struct qlcnic_hardware_context *ahw = adapter->ahw; in qlcnic_83xx_loopback_test() local
1764 if (ahw->op_mode == QLCNIC_NON_PRIV_FUNC) { in qlcnic_83xx_loopback_test()
1809 } while ((adapter->ahw->linkup && ahw->has_link_events) != 1); in qlcnic_83xx_loopback_test()
1828 struct qlcnic_hardware_context *ahw = adapter->ahw; in qlcnic_extend_lb_idc_cmpltn_wait() local
1832 ahw->extend_lb_time); in qlcnic_extend_lb_idc_cmpltn_wait()
1833 temp = ahw->extend_lb_time * 1000; in qlcnic_extend_lb_idc_cmpltn_wait()
1835 ahw->extend_lb_time = 0; in qlcnic_extend_lb_idc_cmpltn_wait()
1840 struct qlcnic_hardware_context *ahw = adapter->ahw; in qlcnic_83xx_set_lb_mode() local
1845 ahw->extend_lb_time = 0; in qlcnic_83xx_set_lb_mode()
1851 config = ahw->port_config; in qlcnic_83xx_set_lb_mode()
1861 set_bit(QLC_83XX_IDC_COMP_AEN, &ahw->idc.status); in qlcnic_83xx_set_lb_mode()
1864 ahw->port_config |= QLC_83XX_CFG_LOOPBACK_HSS; in qlcnic_83xx_set_lb_mode()
1866 ahw->port_config |= QLC_83XX_CFG_LOOPBACK_EXT; in qlcnic_83xx_set_lb_mode()
1872 ahw->port_config); in qlcnic_83xx_set_lb_mode()
1873 ahw->port_config = config; in qlcnic_83xx_set_lb_mode()
1874 clear_bit(QLC_83XX_IDC_COMP_AEN, &ahw->idc.status); in qlcnic_83xx_set_lb_mode()
1885 clear_bit(QLC_83XX_IDC_COMP_AEN, &ahw->idc.status); in qlcnic_83xx_set_lb_mode()
1889 if (ahw->extend_lb_time) in qlcnic_83xx_set_lb_mode()
1896 clear_bit(QLC_83XX_IDC_COMP_AEN, &ahw->idc.status); in qlcnic_83xx_set_lb_mode()
1900 } while (test_bit(QLC_83XX_IDC_COMP_AEN, &ahw->idc.status)); in qlcnic_83xx_set_lb_mode()
1909 struct qlcnic_hardware_context *ahw = adapter->ahw; in qlcnic_83xx_clear_lb_mode() local
1910 u32 config = ahw->port_config, max_wait_count; in qlcnic_83xx_clear_lb_mode()
1914 ahw->extend_lb_time = 0; in qlcnic_83xx_clear_lb_mode()
1916 set_bit(QLC_83XX_IDC_COMP_AEN, &ahw->idc.status); in qlcnic_83xx_clear_lb_mode()
1918 ahw->port_config &= ~QLC_83XX_CFG_LOOPBACK_HSS; in qlcnic_83xx_clear_lb_mode()
1920 ahw->port_config &= ~QLC_83XX_CFG_LOOPBACK_EXT; in qlcnic_83xx_clear_lb_mode()
1926 ahw->port_config); in qlcnic_83xx_clear_lb_mode()
1927 ahw->port_config = config; in qlcnic_83xx_clear_lb_mode()
1928 clear_bit(QLC_83XX_IDC_COMP_AEN, &ahw->idc.status); in qlcnic_83xx_clear_lb_mode()
1939 clear_bit(QLC_83XX_IDC_COMP_AEN, &ahw->idc.status); in qlcnic_83xx_clear_lb_mode()
1943 if (ahw->extend_lb_time) in qlcnic_83xx_clear_lb_mode()
1950 clear_bit(QLC_83XX_IDC_COMP_AEN, &ahw->idc.status); in qlcnic_83xx_clear_lb_mode()
1953 } while (test_bit(QLC_83XX_IDC_COMP_AEN, &ahw->idc.status)); in qlcnic_83xx_clear_lb_mode()
2189 struct qlcnic_nic_intr_coalesce *coal = &adapter->ahw->coal; in qlcnic_83xx_set_rx_intr_coal()
2216 struct qlcnic_nic_intr_coalesce *coal = &adapter->ahw->coal; in qlcnic_83xx_set_tx_intr_coal()
2261 struct qlcnic_nic_intr_coalesce *coal = &adapter->ahw->coal; in qlcnic_83xx_config_intr_coal()
2316 struct qlcnic_hardware_context *ahw = adapter->ahw; in qlcnic_83xx_handle_link_aen() local
2321 ahw->link_speed = MSW(data[2]); in qlcnic_83xx_handle_link_aen()
2324 ahw->link_duplex = DUPLEX_FULL; in qlcnic_83xx_handle_link_aen()
2326 ahw->link_duplex = DUPLEX_HALF; in qlcnic_83xx_handle_link_aen()
2328 ahw->link_speed = SPEED_UNKNOWN; in qlcnic_83xx_handle_link_aen()
2329 ahw->link_duplex = DUPLEX_UNKNOWN; in qlcnic_83xx_handle_link_aen()
2332 ahw->link_autoneg = MSB(MSW(data[3])); in qlcnic_83xx_handle_link_aen()
2333 ahw->module_type = MSB(LSW(data[3])); in qlcnic_83xx_handle_link_aen()
2334 ahw->has_link_events = 1; in qlcnic_83xx_handle_link_aen()
2335 ahw->lb_mode = data[4] & QLCNIC_LB_MODE_MASK; in qlcnic_83xx_handle_link_aen()
2346 mbx = adapter->ahw->mailbox; in qlcnic_83xx_handle_aen()
2348 resp = QLCRDX(adapter->ahw, QLCNIC_FW_MBX_CTRL); in qlcnic_83xx_handle_aen()
2352 event = readl(QLCNIC_MBX_FW(adapter->ahw, 0)); in qlcnic_83xx_handle_aen()
2363 mask = QLCRDX(adapter->ahw, QLCNIC_DEF_INT_MASK); in qlcnic_83xx_handle_aen()
2364 writel(0, adapter->ahw->pci_base0 + mask); in qlcnic_83xx_handle_aen()
2375 if (adapter->ahw->op_mode != QLCNIC_MGMT_FUNC) { in qlcnic_83xx_set_nic_info()
2416 struct qlcnic_hardware_context *ahw = adapter->ahw; in qlcnic_83xx_get_nic_info() local
2422 if (func_id != ahw->pci_func) { in qlcnic_83xx_get_nic_info()
2426 cmd.req.arg[1] = ahw->pci_func << 16; in qlcnic_83xx_get_nic_info()
2454 memcpy(ahw->extra_capability, &cmd.rsp.arg[16], in qlcnic_83xx_get_nic_info()
2455 sizeof(ahw->extra_capability)); in qlcnic_83xx_get_nic_info()
2490 struct qlcnic_hardware_context *ahw = adapter->ahw; in qlcnic_83xx_get_pci_info() local
2503 ahw->total_nic_func = 0; in qlcnic_83xx_get_pci_info()
2505 ahw->max_pci_func = cmd.rsp.arg[1] & 0xFF; in qlcnic_83xx_get_pci_info()
2506 for (i = 2, j = 0; j < ahw->max_vnic_func; j++, pci_info++) { in qlcnic_83xx_get_pci_info()
2534 ahw->total_nic_func = nic; in qlcnic_83xx_get_pci_info()
2535 ahw->total_pci_func = nic + fcoe + iscsi; in qlcnic_83xx_get_pci_info()
2536 if (ahw->total_nic_func == 0 || ahw->total_pci_func == 0) { in qlcnic_83xx_get_pci_info()
2538 __func__, ahw->total_nic_func, ahw->total_pci_func); in qlcnic_83xx_get_pci_info()
2553 max_ints = adapter->ahw->num_msix - 1; in qlcnic_83xx_config_intrpt()
2561 cmd.req.arg[1] |= (adapter->ahw->pci_func << 8) | BIT_16; in qlcnic_83xx_config_intrpt()
2565 val = type | (adapter->ahw->intr_tbl[i].type << 4); in qlcnic_83xx_config_intrpt()
2566 if (adapter->ahw->intr_tbl[i].type == QLCNIC_INTRPT_MSIX) in qlcnic_83xx_config_intrpt()
2567 val |= (adapter->ahw->intr_tbl[i].id << 16); in qlcnic_83xx_config_intrpt()
2583 adapter->ahw->intr_tbl[i].id); in qlcnic_83xx_config_intrpt()
2587 adapter->ahw->intr_tbl[i].id = MSW(val); in qlcnic_83xx_config_intrpt()
2588 adapter->ahw->intr_tbl[i].enabled = 1; in qlcnic_83xx_config_intrpt()
2590 adapter->ahw->intr_tbl[i].src = temp; in qlcnic_83xx_config_intrpt()
2592 adapter->ahw->intr_tbl[i].id = i; in qlcnic_83xx_config_intrpt()
2593 adapter->ahw->intr_tbl[i].enabled = 0; in qlcnic_83xx_config_intrpt()
2594 adapter->ahw->intr_tbl[i].src = 0; in qlcnic_83xx_config_intrpt()
2721 cmd = adapter->ahw->fdt.write_statusreg_cmd; in qlcnic_83xx_enable_flash_write()
2725 adapter->ahw->fdt.write_enable_bits); in qlcnic_83xx_enable_flash_write()
2741 adapter->ahw->fdt.write_statusreg_cmd)); in qlcnic_83xx_disable_flash_write()
2743 adapter->ahw->fdt.write_disable_bits); in qlcnic_83xx_disable_flash_write()
2793 memset(&adapter->ahw->fdt, 0, fdt_size); in qlcnic_83xx_read_flash_descriptor_table()
2795 (u8 *)&adapter->ahw->fdt, in qlcnic_83xx_read_flash_descriptor_table()
2797 qlcnic_swap32_buffer((u32 *)&adapter->ahw->fdt, count); in qlcnic_83xx_read_flash_descriptor_table()
2811 if (adapter->ahw->fdt.mfg_id == adapter->flash_mfg_id) { in qlcnic_83xx_erase_flash_sector()
2836 cmd = QLC_83XX_FLASH_FDT_ERASE_DEF_SIG | adapter->ahw->fdt.erase_cmd; in qlcnic_83xx_erase_flash_sector()
2837 if (adapter->ahw->fdt.mfg_id == adapter->flash_mfg_id) in qlcnic_83xx_erase_flash_sector()
2853 if (adapter->ahw->fdt.mfg_id == adapter->flash_mfg_id) { in qlcnic_83xx_erase_flash_sector()
2977 val = QLCRDX(adapter->ahw, QLC_83XX_RECOVER_DRV_LOCK); in qlcnic_83xx_recover_driver_lock()
2984 QLCWRX(adapter->ahw, QLC_83XX_RECOVER_DRV_LOCK, val); in qlcnic_83xx_recover_driver_lock()
2988 val = QLCRDX(adapter->ahw, QLC_83XX_RECOVER_DRV_LOCK); in qlcnic_83xx_recover_driver_lock()
2993 QLCWRX(adapter->ahw, QLC_83XX_RECOVER_DRV_LOCK, val); in qlcnic_83xx_recover_driver_lock()
2995 QLCRDX(adapter->ahw, QLC_83XX_DRV_UNLOCK); in qlcnic_83xx_recover_driver_lock()
2998 QLCWRX(adapter->ahw, QLC_83XX_RECOVER_DRV_LOCK, val); in qlcnic_83xx_recover_driver_lock()
3019 status = QLCRDX(adapter->ahw, QLC_83XX_DRV_LOCK); in qlcnic_83xx_lock_driver()
3027 temp = QLCRDX(adapter->ahw, QLC_83XX_DRV_LOCK_ID); in qlcnic_83xx_lock_driver()
3030 val = QLCRDX(adapter->ahw, QLC_83XX_DRV_LOCK_ID); in qlcnic_83xx_lock_driver()
3054 val = QLCRDX(adapter->ahw, QLC_83XX_DRV_LOCK_ID); in qlcnic_83xx_lock_driver()
3058 QLCWRX(adapter->ahw, QLC_83XX_DRV_LOCK_ID, val); in qlcnic_83xx_lock_driver()
3067 val = QLCRDX(adapter->ahw, QLC_83XX_DRV_LOCK_ID); in qlcnic_83xx_unlock_driver()
3077 QLCWRX(adapter->ahw, QLC_83XX_DRV_LOCK_ID, val); in qlcnic_83xx_unlock_driver()
3078 QLCRDX(adapter->ahw, QLC_83XX_DRV_UNLOCK); in qlcnic_83xx_unlock_driver()
3091 mutex_lock(&adapter->ahw->mem_lock); in qlcnic_ms_mem_write128()
3099 mutex_unlock(&adapter->ahw->mem_lock); in qlcnic_ms_mem_write128()
3122 mutex_unlock(&adapter->ahw->mem_lock); in qlcnic_ms_mem_write128()
3127 mutex_unlock(&adapter->ahw->mem_lock); in qlcnic_ms_mem_write128()
3178 struct qlcnic_hardware_context *ahw = adapter->ahw; in qlcnic_83xx_test_link() local
3183 pci_func = ahw->pci_func; in qlcnic_83xx_test_link()
3185 state = readl(ahw->pci_base0 + QLC_83XX_LINK_STATE(pci_func)); in qlcnic_83xx_test_link()
3204 ahw->link_speed = SPEED_10; in qlcnic_83xx_test_link()
3207 ahw->link_speed = SPEED_100; in qlcnic_83xx_test_link()
3210 ahw->link_speed = SPEED_1000; in qlcnic_83xx_test_link()
3213 ahw->link_speed = SPEED_10000; in qlcnic_83xx_test_link()
3216 ahw->link_speed = 0; in qlcnic_83xx_test_link()
3224 ahw->supported_type = PORT_FIBRE; in qlcnic_83xx_test_link()
3225 ahw->port_type = QLCNIC_XGBE; in qlcnic_83xx_test_link()
3230 ahw->supported_type = PORT_FIBRE; in qlcnic_83xx_test_link()
3231 ahw->port_type = QLCNIC_GBE; in qlcnic_83xx_test_link()
3234 ahw->supported_type = PORT_TP; in qlcnic_83xx_test_link()
3235 ahw->port_type = QLCNIC_GBE; in qlcnic_83xx_test_link()
3241 ahw->supported_type = PORT_DA; in qlcnic_83xx_test_link()
3242 ahw->port_type = QLCNIC_XGBE; in qlcnic_83xx_test_link()
3245 ahw->supported_type = PORT_OTHER; in qlcnic_83xx_test_link()
3246 ahw->port_type = QLCNIC_XGBE; in qlcnic_83xx_test_link()
3259 struct qlcnic_hardware_context *ahw = adapter->ahw; in qlcnic_83xx_get_settings() local
3268 ahw->module_type = QLC_83XX_SFP_MODULE_TYPE(config); in qlcnic_83xx_get_settings()
3272 ahw->board_type = QLCNIC_BRDTYPE_83XX_10G; in qlcnic_83xx_get_settings()
3274 if (netif_running(adapter->netdev) && ahw->has_link_events) { in qlcnic_83xx_get_settings()
3275 ethtool_cmd_speed_set(ecmd, ahw->link_speed); in qlcnic_83xx_get_settings()
3276 ecmd->duplex = ahw->link_duplex; in qlcnic_83xx_get_settings()
3277 ecmd->autoneg = ahw->link_autoneg; in qlcnic_83xx_get_settings()
3291 if (ahw->port_config & QLC_83XX_10_CAPABLE) in qlcnic_83xx_get_settings()
3293 if (ahw->port_config & QLC_83XX_100_CAPABLE) in qlcnic_83xx_get_settings()
3295 if (ahw->port_config & QLC_83XX_1G_CAPABLE) in qlcnic_83xx_get_settings()
3297 if (ahw->port_config & QLC_83XX_10G_CAPABLE) in qlcnic_83xx_get_settings()
3299 if (ahw->port_config & QLC_83XX_AUTONEG_ENABLE) in qlcnic_83xx_get_settings()
3302 switch (ahw->link_speed) { in qlcnic_83xx_get_settings()
3321 switch (ahw->supported_type) { in qlcnic_83xx_get_settings()
3347 ecmd->phy_address = ahw->physical_port; in qlcnic_83xx_get_settings()
3354 struct qlcnic_hardware_context *ahw = adapter->ahw; in qlcnic_83xx_set_settings() local
3355 u32 config = adapter->ahw->port_config; in qlcnic_83xx_set_settings()
3366 ahw->port_config |= QLC_83XX_AUTONEG_ENABLE; in qlcnic_83xx_set_settings()
3367 ahw->port_config |= (QLC_83XX_100_CAPABLE | in qlcnic_83xx_set_settings()
3371 ahw->port_config &= ~QLC_83XX_AUTONEG_ENABLE; in qlcnic_83xx_set_settings()
3374 ahw->port_config &= ~(QLC_83XX_100_CAPABLE | in qlcnic_83xx_set_settings()
3377 ahw->port_config |= QLC_83XX_10_CAPABLE; in qlcnic_83xx_set_settings()
3380 ahw->port_config &= ~(QLC_83XX_10_CAPABLE | in qlcnic_83xx_set_settings()
3383 ahw->port_config |= QLC_83XX_100_CAPABLE; in qlcnic_83xx_set_settings()
3386 ahw->port_config &= ~(QLC_83XX_10_CAPABLE | in qlcnic_83xx_set_settings()
3389 ahw->port_config |= QLC_83XX_1G_CAPABLE; in qlcnic_83xx_set_settings()
3392 ahw->port_config &= ~(QLC_83XX_10_CAPABLE | in qlcnic_83xx_set_settings()
3395 ahw->port_config |= QLC_83XX_10G_CAPABLE; in qlcnic_83xx_set_settings()
3405 ahw->port_config = config; in qlcnic_83xx_set_settings()
3564 sizeof(*adapter->ahw->ext_reg_tbl)) + in qlcnic_83xx_get_regs_len()
3566 sizeof(*adapter->ahw->reg_tbl)); in qlcnic_83xx_get_regs_len()
3578 regs_buff[i++] = QLCRDX(adapter->ahw, j); in qlcnic_83xx_get_registers()
3585 struct qlcnic_hardware_context *ahw = adapter->ahw; in qlcnic_83xx_interrupt_test() local
3608 ahw->diag_cnt = 0; in qlcnic_83xx_interrupt_test()
3614 intrpt_id = ahw->intr_tbl[0].id; in qlcnic_83xx_interrupt_test()
3616 intrpt_id = QLCRDX(ahw, QLCNIC_DEF_INT_ID); in qlcnic_83xx_interrupt_test()
3637 ret = !ahw->diag_cnt; in qlcnic_83xx_interrupt_test()
3653 struct qlcnic_hardware_context *ahw = adapter->ahw; in qlcnic_83xx_get_pauseparam() local
3663 config = ahw->port_config; in qlcnic_83xx_get_pauseparam()
3689 struct qlcnic_hardware_context *ahw = adapter->ahw; in qlcnic_83xx_set_pauseparam() local
3699 config = ahw->port_config; in qlcnic_83xx_set_pauseparam()
3701 if (ahw->port_type == QLCNIC_GBE) { in qlcnic_83xx_set_pauseparam()
3703 ahw->port_config |= QLC_83XX_ENABLE_AUTONEG; in qlcnic_83xx_set_pauseparam()
3705 ahw->port_config &= ~QLC_83XX_ENABLE_AUTONEG; in qlcnic_83xx_set_pauseparam()
3706 } else if ((ahw->port_type == QLCNIC_XGBE) && (pause->autoneg)) { in qlcnic_83xx_set_pauseparam()
3711 ahw->port_config |= QLC_83XX_CFG_STD_PAUSE; in qlcnic_83xx_set_pauseparam()
3714 ahw->port_config |= QLC_83XX_CFG_STD_TX_RX_PAUSE; in qlcnic_83xx_set_pauseparam()
3716 ahw->port_config &= ~QLC_83XX_CFG_STD_TX_PAUSE; in qlcnic_83xx_set_pauseparam()
3717 ahw->port_config |= QLC_83XX_CFG_STD_RX_PAUSE; in qlcnic_83xx_set_pauseparam()
3719 ahw->port_config &= ~QLC_83XX_CFG_STD_RX_PAUSE; in qlcnic_83xx_set_pauseparam()
3720 ahw->port_config |= QLC_83XX_CFG_STD_TX_PAUSE; in qlcnic_83xx_set_pauseparam()
3722 ahw->port_config &= ~(QLC_83XX_CFG_STD_TX_RX_PAUSE | in qlcnic_83xx_set_pauseparam()
3729 ahw->port_config = config; in qlcnic_83xx_set_pauseparam()
3791 struct qlcnic_hardware_context *ahw = adapter->ahw; in qlcnic_83xx_resume() local
3792 struct qlc_83xx_idc *idc = &ahw->idc; in qlcnic_83xx_resume()
3799 if (ahw->nic_mode == QLCNIC_VNIC_MODE) { in qlcnic_83xx_resume()
3800 if (ahw->op_mode == QLCNIC_MGMT_FUNC) { in qlcnic_83xx_resume()
3849 struct qlcnic_mailbox *mbx = adapter->ahw->mailbox; in qlcnic_83xx_flush_mbx_queue()
3869 struct qlcnic_hardware_context *ahw = adapter->ahw; in qlcnic_83xx_check_mbx_status() local
3870 struct qlcnic_mailbox *mbx = ahw->mailbox; in qlcnic_83xx_check_mbx_status()
3876 host_mbx_ctrl = QLCRDX(ahw, QLCNIC_HOST_MBX_CTRL); in qlcnic_83xx_check_mbx_status()
3879 ahw->idc.collect_dump = 1; in qlcnic_83xx_check_mbx_status()
3890 QLCWRX(adapter->ahw, QLCNIC_HOST_MBX_CTRL, QLCNIC_SET_OWNER); in qlcnic_83xx_signal_mbx_cmd()
3892 QLCWRX(adapter->ahw, QLCNIC_FW_MBX_CTRL, QLCNIC_CLR_OWNER); in qlcnic_83xx_signal_mbx_cmd()
3898 struct qlcnic_mailbox *mbx = adapter->ahw->mailbox; in qlcnic_83xx_dequeue_mbx_cmd()
3914 struct qlcnic_hardware_context *ahw = adapter->ahw; in qlcnic_83xx_encode_mbx_cmd() local
3919 writel(mbx_cmd, QLCNIC_MBX_HOST(ahw, 0)); in qlcnic_83xx_encode_mbx_cmd()
3921 writel(cmd->req.arg[i], QLCNIC_MBX_HOST(ahw, i)); in qlcnic_83xx_encode_mbx_cmd()
3923 fw_hal_version = ahw->fw_hal_version; in qlcnic_83xx_encode_mbx_cmd()
3928 writel(mbx_cmd, QLCNIC_MBX_HOST(ahw, 0)); in qlcnic_83xx_encode_mbx_cmd()
3936 writel(mbx_cmd, QLCNIC_MBX_HOST(ahw, 1)); in qlcnic_83xx_encode_mbx_cmd()
3939 writel(*(cmd->hdr++), QLCNIC_MBX_HOST(ahw, i)); in qlcnic_83xx_encode_mbx_cmd()
3941 writel(*(cmd->pay++), QLCNIC_MBX_HOST(ahw, i)); in qlcnic_83xx_encode_mbx_cmd()
3947 struct qlcnic_mailbox *mbx = adapter->ahw->mailbox; in qlcnic_83xx_detach_mailbox_work()
3963 struct qlcnic_mailbox *mbx = adapter->ahw->mailbox; in qlcnic_83xx_enqueue_mbx_cmd()
3993 fw_data = readl(QLCNIC_MBX_FW(adapter->ahw, 2)); in qlcnic_83xx_check_mac_rcode()
4009 struct qlcnic_hardware_context *ahw = adapter->ahw; in qlcnic_83xx_decode_mbx_rsp() local
4014 fw_data = readl(QLCNIC_MBX_FW(ahw, 0)); in qlcnic_83xx_decode_mbx_rsp()
4028 __func__, cmd->cmd_op, cmd->type, ahw->pci_func, in qlcnic_83xx_decode_mbx_rsp()
4029 ahw->op_mode, mbx_err_code); in qlcnic_83xx_decode_mbx_rsp()
4039 struct qlcnic_hardware_context *ahw = adapter->ahw; in qlcnic_dump_mailbox_registers() local
4042 offset = QLCRDX(ahw, QLCNIC_DEF_INT_MASK); in qlcnic_dump_mailbox_registers()
4044 readl(ahw->pci_base0 + offset), in qlcnic_dump_mailbox_registers()
4045 QLCRDX(ahw, QLCNIC_MBX_INTR_ENBL), in qlcnic_dump_mailbox_registers()
4046 QLCRDX(ahw, QLCNIC_HOST_MBX_CTRL), in qlcnic_dump_mailbox_registers()
4047 QLCRDX(ahw, QLCNIC_FW_MBX_CTRL)); in qlcnic_dump_mailbox_registers()
4058 struct qlcnic_hardware_context *ahw; in qlcnic_83xx_mailbox_worker() local
4062 ahw = adapter->ahw; in qlcnic_83xx_mailbox_worker()
4093 __func__, cmd->cmd_op, cmd->type, ahw->pci_func, in qlcnic_83xx_mailbox_worker()
4094 ahw->op_mode); in qlcnic_83xx_mailbox_worker()
4117 struct qlcnic_hardware_context *ahw = adapter->ahw; in qlcnic_83xx_init_mailbox_work() local
4120 ahw->mailbox = kzalloc(sizeof(*mbx), GFP_KERNEL); in qlcnic_83xx_init_mailbox_work()
4121 if (!ahw->mailbox) in qlcnic_83xx_init_mailbox_work()
4124 mbx = ahw->mailbox; in qlcnic_83xx_init_mailbox_work()