Lines Matching refs:IRO
1680 #define YSTORM_FLOW_CONTROL_MODE_OFFSET (IRO[0].base)
1681 #define YSTORM_FLOW_CONTROL_MODE_SIZE (IRO[0].size)
1683 #define TSTORM_PORT_STAT_OFFSET(port_id) (IRO[1].base + \
1685 IRO[1].m1))
1686 #define TSTORM_PORT_STAT_SIZE (IRO[1].size)
1688 #define USTORM_VF_PF_CHANNEL_READY_OFFSET(vf_id) (IRO[2].base + \
1690 IRO[2].m1))
1691 #define USTORM_VF_PF_CHANNEL_READY_SIZE (IRO[2].size)
1693 #define USTORM_FLR_FINAL_ACK_OFFSET (IRO[3].base)
1694 #define USTORM_FLR_FINAL_ACK_SIZE (IRO[3].size)
1696 #define USTORM_EQE_CONS_OFFSET(pf_id) (IRO[4].base + \
1698 IRO[4].m1))
1699 #define USTORM_EQE_CONS_SIZE (IRO[4].size)
1701 #define USTORM_CQ_CONS_OFFSET(global_queue_id) (IRO[5].base + \
1703 IRO[5].m1))
1704 #define USTORM_CQ_CONS_SIZE (IRO[5].size)
1706 #define XSTORM_INTEG_TEST_DATA_OFFSET (IRO[6].base)
1707 #define XSTORM_INTEG_TEST_DATA_SIZE (IRO[6].size)
1709 #define YSTORM_INTEG_TEST_DATA_OFFSET (IRO[7].base)
1710 #define YSTORM_INTEG_TEST_DATA_SIZE (IRO[7].size)
1712 #define PSTORM_INTEG_TEST_DATA_OFFSET (IRO[8].base)
1713 #define PSTORM_INTEG_TEST_DATA_SIZE (IRO[8].size)
1715 #define TSTORM_INTEG_TEST_DATA_OFFSET (IRO[9].base)
1716 #define TSTORM_INTEG_TEST_DATA_SIZE (IRO[9].size)
1718 #define MSTORM_INTEG_TEST_DATA_OFFSET (IRO[10].base)
1719 #define MSTORM_INTEG_TEST_DATA_SIZE (IRO[10].size)
1721 #define USTORM_INTEG_TEST_DATA_OFFSET (IRO[11].base)
1722 #define USTORM_INTEG_TEST_DATA_SIZE (IRO[11].size)
1724 #define TSTORM_LL2_RX_PRODS_OFFSET(core_rx_queue_id) (IRO[12].base + \
1726 IRO[12].m1))
1727 #define TSTORM_LL2_RX_PRODS_SIZE (IRO[12].size)
1729 #define CORE_LL2_TSTORM_PER_QUEUE_STAT_OFFSET(core_rx_q_id) (IRO[13].base + \
1731 IRO[13].m1))
1732 #define CORE_LL2_TSTORM_PER_QUEUE_STAT_SIZE (IRO[13].size)
1734 #define CORE_LL2_USTORM_PER_QUEUE_STAT_OFFSET(core_rx_q_id) (IRO[14].base + \
1736 IRO[14].m1))
1737 #define CORE_LL2_USTORM_PER_QUEUE_STAT_SIZE (IRO[14].size)
1739 #define CORE_LL2_PSTORM_PER_QUEUE_STAT_OFFSET(core_txst_id) (IRO[15].base + \
1741 IRO[15].m1))
1742 #define CORE_LL2_PSTORM_PER_QUEUE_STAT_SIZE (IRO[15].size)
1744 #define MSTORM_QUEUE_STAT_OFFSET(stat_counter_id) (IRO[16].base + \
1746 IRO[16].m1))
1747 #define MSTORM_QUEUE_STAT_SIZE (IRO[16].size)
1749 #define MSTORM_PRODS_OFFSET(queue_id) (IRO[17].base + \
1751 IRO[17].m1))
1752 #define MSTORM_PRODS_SIZE (IRO[17].size)
1754 #define MSTORM_TPA_TIMEOUT_US_OFFSET (IRO[18].base)
1755 #define MSTORM_TPA_TIMEOUT_US_SIZE (IRO[18].size)
1757 #define USTORM_QUEUE_STAT_OFFSET(stat_counter_id) (IRO[19].base + \
1759 IRO[19].m1))
1760 #define USTORM_QUEUE_STAT_SIZE (IRO[19].size)
1762 #define USTORM_ETH_QUEUE_ZONE_OFFSET(queue_id) (IRO[20].base + \
1764 IRO[20].m1))
1765 #define USTORM_ETH_QUEUE_ZONE_SIZE (IRO[20].size)
1767 #define PSTORM_QUEUE_STAT_OFFSET(stat_counter_id) (IRO[21].base + \
1769 IRO[21].m1))
1770 #define PSTORM_QUEUE_STAT_SIZE (IRO[21].size)
1772 #define TSTORM_ETH_PRS_INPUT_OFFSET(pf_id) (IRO[22].base + \
1774 IRO[22].m1))
1775 #define TSTORM_ETH_PRS_INPUT_SIZE (IRO[22].size)
1777 #define YSTORM_ETH_QUEUE_ZONE_OFFSET(queue_id) (IRO[23].base + \
1779 IRO[23].m1))
1780 #define YSTORM_ETH_QUEUE_ZONE_SIZE (IRO[23].size)
1782 #define YSTORM_TOE_CQ_PROD_OFFSET(rss_id) (IRO[24].base + \
1784 IRO[24].m1))
1785 #define YSTORM_TOE_CQ_PROD_SIZE (IRO[24].size)
1787 #define USTORM_TOE_CQ_PROD_OFFSET(rss_id) (IRO[25].base + \
1789 IRO[25].m1))
1790 #define USTORM_TOE_CQ_PROD_SIZE (IRO[25].size)
1792 #define USTORM_TOE_GRQ_PROD_OFFSET(pf_id) (IRO[26].base + \
1794 IRO[26].m1))
1795 #define USTORM_TOE_GRQ_PROD_SIZE (IRO[26].size)
1797 #define TSTORM_SCSI_CMDQ_CONS_OFFSET(cmdq_queue_id) (IRO[27].base + \
1799 IRO[27].m1))
1800 #define TSTORM_SCSI_CMDQ_CONS_SIZE (IRO[27].size)
1802 #define MSTORM_SCSI_RQ_CONS_OFFSET(rq_queue_id) (IRO[28].base + \
1804 IRO[28].m1))
1805 #define MSTORM_SCSI_RQ_CONS_SIZE (IRO[28].size)
1807 #define PSTORM_ROCE_STAT_OFFSET(stat_counter_id) (IRO[29].base + \
1809 IRO[29].m1))
1810 #define PSTORM_ROCE_STAT_SIZE (IRO[29].size)
1812 #define TSTORM_ROCE_STAT_OFFSET(stat_counter_id) (IRO[30].base + \
1814 IRO[30].m1))
1815 #define TSTORM_ROCE_STAT_SIZE (IRO[30].size)