165 	mix_intena.u64 = cvmx_read_csr(p->mix + MIX_INTENA);  in octeon_mgmt_set_rx_irq()
177 	mix_intena.u64 = cvmx_read_csr(p->mix + MIX_INTENA);  in octeon_mgmt_set_tx_irq()
258 	mix_orcnt.u64 = cvmx_read_csr(p->mix + MIX_ORCNT);  in octeon_mgmt_clean_tx_buffers()
262 		mix_orcnt.u64 = cvmx_read_csr(p->mix + MIX_ORCNT);  in octeon_mgmt_clean_tx_buffers()
297 			ns = cvmx_read_csr(CVMX_MIXX_TSTAMP(p->port));  in octeon_mgmt_clean_tx_buffers()
308 		mix_orcnt.u64 = cvmx_read_csr(p->mix + MIX_ORCNT);  in octeon_mgmt_clean_tx_buffers()
329 	drop = cvmx_read_csr(p->agl + AGL_GMX_RX_STATS_PKTS_DRP);  in octeon_mgmt_update_rx_stats()
330 	bad = cvmx_read_csr(p->agl + AGL_GMX_RX_STATS_PKTS_BAD);  in octeon_mgmt_update_rx_stats()
350 	s0.u64 = cvmx_read_csr(p->agl + AGL_GMX_TX_STAT0);  in octeon_mgmt_update_tx_stats()
351 	s1.u64 = cvmx_read_csr(p->agl + AGL_GMX_TX_STAT1);  in octeon_mgmt_update_tx_stats()
479 	mix_ircnt.u64 = cvmx_read_csr(p->mix + MIX_IRCNT);  in octeon_mgmt_receive_packets()
487 		mix_ircnt.u64 = cvmx_read_csr(p->mix + MIX_IRCNT);  in octeon_mgmt_receive_packets()
523 		mix_ctl.u64 = cvmx_read_csr(p->mix + MIX_CTL);  in octeon_mgmt_reset_hw()
527 	cvmx_read_csr(p->mix + MIX_CTL);  in octeon_mgmt_reset_hw()
530 	mix_bist.u64 = cvmx_read_csr(p->mix + MIX_BIST);  in octeon_mgmt_reset_hw()
535 	agl_gmx_bist.u64 = cvmx_read_csr(CVMX_AGL_GMX_BIST);  in octeon_mgmt_reset_hw()
605 	agl_gmx_prtx.u64 = cvmx_read_csr(p->agl + AGL_GMX_PRT_CFG);  in octeon_mgmt_set_rx_filtering()
674 	mixx_isr.u64 = cvmx_read_csr(p->mix + MIX_ISR);  in octeon_mgmt_interrupt()
678 	cvmx_read_csr(p->mix + MIX_ISR);  in octeon_mgmt_interrupt()
710 		ptp.u64 = cvmx_read_csr(CVMX_MIO_PTP_CLOCK_CFG);  in octeon_mgmt_ioctl_hwtstamp()
723 			u64 clock_comp = cvmx_read_csr(CVMX_MIO_PTP_CLOCK_COMP);  in octeon_mgmt_ioctl_hwtstamp()
751 		rxx_frm_ctl.u64 = cvmx_read_csr(p->agl + AGL_GMX_RX_FRM_CTL);  in octeon_mgmt_ioctl_hwtstamp()
772 			rxx_frm_ctl.u64 = cvmx_read_csr(p->agl + AGL_GMX_RX_FRM_CTL);  in octeon_mgmt_ioctl_hwtstamp()
807 	prtx_cfg.u64 = cvmx_read_csr(p->agl + AGL_GMX_PRT_CFG);  in octeon_mgmt_disable_link()
816 			prtx_cfg.u64 = cvmx_read_csr(p->agl + AGL_GMX_PRT_CFG);  in octeon_mgmt_disable_link()
830 	prtx_cfg.u64 = cvmx_read_csr(p->agl + AGL_GMX_PRT_CFG);  in octeon_mgmt_enable_link()
841 	prtx_cfg.u64 = cvmx_read_csr(p->agl + AGL_GMX_PRT_CFG);  in octeon_mgmt_update_link()
886 	prtx_cfg.u64 = cvmx_read_csr(p->agl + AGL_GMX_PRT_CFG);  in octeon_mgmt_update_link()
892 		prtx_ctl.u64 = cvmx_read_csr(p->agl_prt_ctl);  in octeon_mgmt_update_link()
893 		agl_clk.u64 = cvmx_read_csr(p->agl + AGL_GMX_TX_CLK);  in octeon_mgmt_update_link()
1011 	mix_ctl.u64 = cvmx_read_csr(p->mix + MIX_CTL);  in octeon_mgmt_open()
1018 			mix_ctl.u64 = cvmx_read_csr(p->mix + MIX_CTL);  in octeon_mgmt_open()
1034 		drv_ctl.u64 = cvmx_read_csr(CVMX_AGL_GMX_DRV_CTL);  in octeon_mgmt_open()
1088 		agl_prtx_ctl.u64 = cvmx_read_csr(p->agl_prt_ctl);  in octeon_mgmt_open()
1099 		agl_prtx_ctl.u64 = cvmx_read_csr(p->agl_prt_ctl);  in octeon_mgmt_open()
1106 		cvmx_read_csr(p->agl_prt_ctl); /* Force write out before wait */  in octeon_mgmt_open()
1114 		agl_prtx_ctl.u64 = cvmx_read_csr(p->agl_prt_ctl);  in octeon_mgmt_open()
1119 		agl_prtx_ctl.u64 = cvmx_read_csr(p->agl_prt_ctl);  in octeon_mgmt_open()
1126 		cvmx_read_csr(p->agl_prt_ctl);  in octeon_mgmt_open()
1153 	cvmx_write_csr(p->mix + MIX_ISR, cvmx_read_csr(p->mix + MIX_ISR));  in octeon_mgmt_open()