393 		val32 = hldev->tim_int_mask1[VXGE_HW_VPATH_INTR_TX] |  in vxge_hw_device_intr_enable()
394 			hldev->tim_int_mask1[VXGE_HW_VPATH_INTR_RX];  in vxge_hw_device_intr_enable()
401 					&hldev->common_reg->tim_int_mask1);  in vxge_hw_device_intr_enable()
429 		&hldev->common_reg->tim_int_mask1);  in vxge_hw_device_intr_disable()
986 	if ((hldev->tim_int_mask1[VXGE_HW_VPATH_INTR_TX] != 0) ||  in vxge_hw_device_clear_tx_rx()
987 	   (hldev->tim_int_mask1[VXGE_HW_VPATH_INTR_RX] != 0)) {  in vxge_hw_device_clear_tx_rx()
989 				(hldev->tim_int_mask1[VXGE_HW_VPATH_INTR_TX] |  in vxge_hw_device_clear_tx_rx()
990 				 hldev->tim_int_mask1[VXGE_HW_VPATH_INTR_RX]),  in vxge_hw_device_clear_tx_rx()
2325 	u32	tim_int_mask1[4] = {[0 ...3] = 0};  in vxge_hw_vpath_inta_mask_tx_rx()  local
2330 		tim_int_mask1, vp->vpath->vp_id);  in vxge_hw_vpath_inta_mask_tx_rx()
2341 	val64 = readl(&hldev->common_reg->tim_int_mask1);  in vxge_hw_vpath_inta_mask_tx_rx()
2343 	if ((tim_int_mask1[VXGE_HW_VPATH_INTR_TX] != 0) ||  in vxge_hw_vpath_inta_mask_tx_rx()
2344 		(tim_int_mask1[VXGE_HW_VPATH_INTR_RX] != 0)) {  in vxge_hw_vpath_inta_mask_tx_rx()
2346 			(tim_int_mask1[VXGE_HW_VPATH_INTR_TX] |  in vxge_hw_vpath_inta_mask_tx_rx()
2347 			tim_int_mask1[VXGE_HW_VPATH_INTR_RX] | val64),  in vxge_hw_vpath_inta_mask_tx_rx()
2348 			&hldev->common_reg->tim_int_mask1);  in vxge_hw_vpath_inta_mask_tx_rx()
2363 	u32	tim_int_mask1[4] = {[0 ...3] = 0};  in vxge_hw_vpath_inta_unmask_tx_rx()  local
2368 		tim_int_mask1, vp->vpath->vp_id);  in vxge_hw_vpath_inta_unmask_tx_rx()
2379 	if ((tim_int_mask1[VXGE_HW_VPATH_INTR_TX] != 0) ||  in vxge_hw_vpath_inta_unmask_tx_rx()
2380 	   (tim_int_mask1[VXGE_HW_VPATH_INTR_RX] != 0)) {  in vxge_hw_vpath_inta_unmask_tx_rx()
2382 			(~(tim_int_mask1[VXGE_HW_VPATH_INTR_TX] |  in vxge_hw_vpath_inta_unmask_tx_rx()
2383 			  tim_int_mask1[VXGE_HW_VPATH_INTR_RX])) & val64,  in vxge_hw_vpath_inta_unmask_tx_rx()
2384 			&hldev->common_reg->tim_int_mask1);  in vxge_hw_vpath_inta_unmask_tx_rx()