Lines Matching refs:writeq
1144 writeq(val64, &bar0->tti_data1_mem); in init_tti()
1169 writeq(val64, &bar0->tti_data2_mem); in init_tti()
1174 writeq(val64, &bar0->tti_command_mem); in init_tti()
1219 writeq(val64, &bar0->sw_reset); in init_nic()
1226 writeq(val64, &bar0->sw_reset); in init_nic()
1248 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key); in init_nic()
1250 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key); in init_nic()
1260 writeq(vBIT(val64, 2, 14), &bar0->rmac_max_pyld_len); in init_nic()
1281 writeq(val64, &bar0->tx_fifo_partition_0); in init_nic()
1282 writeq(val64, &bar0->tx_fifo_partition_1); in init_nic()
1283 writeq(val64, &bar0->tx_fifo_partition_2); in init_nic()
1284 writeq(val64, &bar0->tx_fifo_partition_3); in init_nic()
1299 writeq(val64, &bar0->tx_fifo_partition_0); in init_nic()
1304 writeq(val64, &bar0->tx_fifo_partition_1); in init_nic()
1309 writeq(val64, &bar0->tx_fifo_partition_2); in init_nic()
1314 writeq(val64, &bar0->tx_fifo_partition_3); in init_nic()
1329 writeq(PCC_ENABLE_FOUR, &bar0->pcc_enable); in init_nic()
1344 writeq(val64, &bar0->tx_pa_cfg); in init_nic()
1353 writeq(val64, &bar0->rx_queue_priority); in init_nic()
1402 writeq(val64, &bar0->rx_queue_cfg); in init_nic()
1411 writeq(val64, &bar0->tx_w_round_robin_0); in init_nic()
1412 writeq(val64, &bar0->tx_w_round_robin_1); in init_nic()
1413 writeq(val64, &bar0->tx_w_round_robin_2); in init_nic()
1414 writeq(val64, &bar0->tx_w_round_robin_3); in init_nic()
1415 writeq(val64, &bar0->tx_w_round_robin_4); in init_nic()
1419 writeq(val64, &bar0->tx_w_round_robin_0); in init_nic()
1420 writeq(val64, &bar0->tx_w_round_robin_1); in init_nic()
1421 writeq(val64, &bar0->tx_w_round_robin_2); in init_nic()
1422 writeq(val64, &bar0->tx_w_round_robin_3); in init_nic()
1424 writeq(val64, &bar0->tx_w_round_robin_4); in init_nic()
1428 writeq(val64, &bar0->tx_w_round_robin_0); in init_nic()
1430 writeq(val64, &bar0->tx_w_round_robin_1); in init_nic()
1432 writeq(val64, &bar0->tx_w_round_robin_2); in init_nic()
1434 writeq(val64, &bar0->tx_w_round_robin_3); in init_nic()
1436 writeq(val64, &bar0->tx_w_round_robin_4); in init_nic()
1440 writeq(val64, &bar0->tx_w_round_robin_0); in init_nic()
1441 writeq(val64, &bar0->tx_w_round_robin_1); in init_nic()
1442 writeq(val64, &bar0->tx_w_round_robin_2); in init_nic()
1443 writeq(val64, &bar0->tx_w_round_robin_3); in init_nic()
1445 writeq(val64, &bar0->tx_w_round_robin_4); in init_nic()
1449 writeq(val64, &bar0->tx_w_round_robin_0); in init_nic()
1451 writeq(val64, &bar0->tx_w_round_robin_1); in init_nic()
1453 writeq(val64, &bar0->tx_w_round_robin_2); in init_nic()
1455 writeq(val64, &bar0->tx_w_round_robin_3); in init_nic()
1457 writeq(val64, &bar0->tx_w_round_robin_4); in init_nic()
1461 writeq(val64, &bar0->tx_w_round_robin_0); in init_nic()
1463 writeq(val64, &bar0->tx_w_round_robin_1); in init_nic()
1465 writeq(val64, &bar0->tx_w_round_robin_2); in init_nic()
1467 writeq(val64, &bar0->tx_w_round_robin_3); in init_nic()
1469 writeq(val64, &bar0->tx_w_round_robin_4); in init_nic()
1473 writeq(val64, &bar0->tx_w_round_robin_0); in init_nic()
1475 writeq(val64, &bar0->tx_w_round_robin_1); in init_nic()
1477 writeq(val64, &bar0->tx_w_round_robin_2); in init_nic()
1479 writeq(val64, &bar0->tx_w_round_robin_3); in init_nic()
1481 writeq(val64, &bar0->tx_w_round_robin_4); in init_nic()
1485 writeq(val64, &bar0->tx_w_round_robin_0); in init_nic()
1486 writeq(val64, &bar0->tx_w_round_robin_1); in init_nic()
1487 writeq(val64, &bar0->tx_w_round_robin_2); in init_nic()
1488 writeq(val64, &bar0->tx_w_round_robin_3); in init_nic()
1490 writeq(val64, &bar0->tx_w_round_robin_4); in init_nic()
1497 writeq(val64, &bar0->tx_fifo_partition_0); in init_nic()
1506 writeq(val64, &bar0->rx_w_round_robin_0); in init_nic()
1507 writeq(val64, &bar0->rx_w_round_robin_1); in init_nic()
1508 writeq(val64, &bar0->rx_w_round_robin_2); in init_nic()
1509 writeq(val64, &bar0->rx_w_round_robin_3); in init_nic()
1510 writeq(val64, &bar0->rx_w_round_robin_4); in init_nic()
1513 writeq(val64, &bar0->rts_qos_steering); in init_nic()
1517 writeq(val64, &bar0->rx_w_round_robin_0); in init_nic()
1518 writeq(val64, &bar0->rx_w_round_robin_1); in init_nic()
1519 writeq(val64, &bar0->rx_w_round_robin_2); in init_nic()
1520 writeq(val64, &bar0->rx_w_round_robin_3); in init_nic()
1522 writeq(val64, &bar0->rx_w_round_robin_4); in init_nic()
1525 writeq(val64, &bar0->rts_qos_steering); in init_nic()
1529 writeq(val64, &bar0->rx_w_round_robin_0); in init_nic()
1531 writeq(val64, &bar0->rx_w_round_robin_1); in init_nic()
1533 writeq(val64, &bar0->rx_w_round_robin_2); in init_nic()
1535 writeq(val64, &bar0->rx_w_round_robin_3); in init_nic()
1537 writeq(val64, &bar0->rx_w_round_robin_4); in init_nic()
1540 writeq(val64, &bar0->rts_qos_steering); in init_nic()
1544 writeq(val64, &bar0->rx_w_round_robin_0); in init_nic()
1545 writeq(val64, &bar0->rx_w_round_robin_1); in init_nic()
1546 writeq(val64, &bar0->rx_w_round_robin_2); in init_nic()
1547 writeq(val64, &bar0->rx_w_round_robin_3); in init_nic()
1549 writeq(val64, &bar0->rx_w_round_robin_4); in init_nic()
1552 writeq(val64, &bar0->rts_qos_steering); in init_nic()
1556 writeq(val64, &bar0->rx_w_round_robin_0); in init_nic()
1558 writeq(val64, &bar0->rx_w_round_robin_1); in init_nic()
1560 writeq(val64, &bar0->rx_w_round_robin_2); in init_nic()
1562 writeq(val64, &bar0->rx_w_round_robin_3); in init_nic()
1564 writeq(val64, &bar0->rx_w_round_robin_4); in init_nic()
1567 writeq(val64, &bar0->rts_qos_steering); in init_nic()
1571 writeq(val64, &bar0->rx_w_round_robin_0); in init_nic()
1573 writeq(val64, &bar0->rx_w_round_robin_1); in init_nic()
1575 writeq(val64, &bar0->rx_w_round_robin_2); in init_nic()
1577 writeq(val64, &bar0->rx_w_round_robin_3); in init_nic()
1579 writeq(val64, &bar0->rx_w_round_robin_4); in init_nic()
1582 writeq(val64, &bar0->rts_qos_steering); in init_nic()
1586 writeq(val64, &bar0->rx_w_round_robin_0); in init_nic()
1588 writeq(val64, &bar0->rx_w_round_robin_1); in init_nic()
1590 writeq(val64, &bar0->rx_w_round_robin_2); in init_nic()
1592 writeq(val64, &bar0->rx_w_round_robin_3); in init_nic()
1594 writeq(val64, &bar0->rx_w_round_robin_4); in init_nic()
1597 writeq(val64, &bar0->rts_qos_steering); in init_nic()
1601 writeq(val64, &bar0->rx_w_round_robin_0); in init_nic()
1602 writeq(val64, &bar0->rx_w_round_robin_1); in init_nic()
1603 writeq(val64, &bar0->rx_w_round_robin_2); in init_nic()
1604 writeq(val64, &bar0->rx_w_round_robin_3); in init_nic()
1606 writeq(val64, &bar0->rx_w_round_robin_4); in init_nic()
1609 writeq(val64, &bar0->rts_qos_steering); in init_nic()
1616 writeq(val64, &bar0->rts_frm_len_n[i]); in init_nic()
1621 writeq(val64, &bar0->rts_frm_len_n[i]); in init_nic()
1634 writeq(MAC_RTS_FRM_LEN_SET(rts_frm_len[i]), in init_nic()
1650 writeq(mac_control->stats_mem_phy, &bar0->stat_addr); in init_nic()
1654 writeq(val64, &bar0->stat_byte_cnt); in init_nic()
1663 writeq(val64, &bar0->mac_link_util); in init_nic()
1689 writeq(val64, &bar0->rti_data1_mem); in init_nic()
1699 writeq(val64, &bar0->rti_data2_mem); in init_nic()
1705 writeq(val64, &bar0->rti_command_mem); in init_nic()
1734 writeq(0xffbbffbbffbbffbbULL, &bar0->mc_pause_thresh_q0q3); in init_nic()
1735 writeq(0xffbbffbbffbbffbbULL, &bar0->mc_pause_thresh_q4q7); in init_nic()
1741 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key); in init_nic()
1743 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key); in init_nic()
1752 writeq(val64, &bar0->mac_cfg); in init_nic()
1754 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key); in init_nic()
1756 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key); in init_nic()
1767 writeq(val64, &bar0->rmac_pause_cfg); in init_nic()
1781 writeq(val64, &bar0->mc_pause_thresh_q0q3); in init_nic()
1789 writeq(val64, &bar0->mc_pause_thresh_q4q7); in init_nic()
1797 writeq(val64, &bar0->pic_control); in init_nic()
1800 writeq(TXREQTO_VAL(0x7f) | TXREQTO_EN, &bar0->txreqtimeout); in init_nic()
1801 writeq(0x0, &bar0->read_retry_delay); in init_nic()
1802 writeq(0x0, &bar0->write_retry_delay); in init_nic()
1812 writeq(val64, &bar0->misc_control); in init_nic()
1815 writeq(val64, &bar0->pic_control2); in init_nic()
1819 writeq(val64, &bar0->tmac_avg_ipg); in init_nic()
1854 writeq(temp64, addr); in do_s2io_write_bits()
1863 writeq(DISABLE_ALL_INTRS, &bar0->general_int_mask); in en_dis_err_alarms()
2021 writeq(DISABLE_ALL_INTRS, &bar0->pic_int_mask); in en_dis_able_nic_intrs()
2027 writeq(DISABLE_ALL_INTRS, &bar0->pic_int_mask); in en_dis_able_nic_intrs()
2039 writeq(0x0, &bar0->tx_traffic_mask); in en_dis_able_nic_intrs()
2045 writeq(DISABLE_ALL_INTRS, &bar0->tx_traffic_mask); in en_dis_able_nic_intrs()
2054 writeq(0x0, &bar0->rx_traffic_mask); in en_dis_able_nic_intrs()
2060 writeq(DISABLE_ALL_INTRS, &bar0->rx_traffic_mask); in en_dis_able_nic_intrs()
2069 writeq(temp64, &bar0->general_int_mask); in en_dis_able_nic_intrs()
2192 writeq(fix_mac[i++], &bar0->gpio_control); in fix_mac_address()
2224 writeq((u64)ring->rx_blocks[0].block_dma_addr, in start_nic()
2236 writeq(val64, &bar0->prc_ctrl_n[i]); in start_nic()
2243 writeq(val64, &bar0->rx_pa_cfg); in start_nic()
2249 writeq(val64, &bar0->rx_pa_cfg); in start_nic()
2268 writeq(val64, &bar0->adapter_control); in start_nic()
2293 writeq(val64, &bar0->adapter_control); in start_nic()
2308 writeq(val64, &bar0->gpio_control); in start_nic()
2310 writeq(val64, (void __iomem *)bar0 + 0x2700); in start_nic()
2425 writeq(val64, &bar0->adapter_control); in stop_nic()
2822 writeq(0, &bar0->rx_traffic_mask); in s2io_poll_inta()
2853 writeq(val64, &bar0->rx_traffic_int); in s2io_netpoll()
2854 writeq(val64, &bar0->tx_traffic_int); in s2io_netpoll()
3106 writeq(val64, &bar0->mdio_control); in s2io_mdio_write()
3108 writeq(val64, &bar0->mdio_control); in s2io_mdio_write()
3117 writeq(val64, &bar0->mdio_control); in s2io_mdio_write()
3119 writeq(val64, &bar0->mdio_control); in s2io_mdio_write()
3126 writeq(val64, &bar0->mdio_control); in s2io_mdio_write()
3128 writeq(val64, &bar0->mdio_control); in s2io_mdio_write()
3152 writeq(val64, &bar0->mdio_control); in s2io_mdio_read()
3154 writeq(val64, &bar0->mdio_control); in s2io_mdio_read()
3162 writeq(val64, &bar0->mdio_control); in s2io_mdio_read()
3164 writeq(val64, &bar0->mdio_control); in s2io_mdio_read()
3424 writeq(val64, &bar0->sw_reset); in s2io_reset()
3464 writeq(s2BIT(62), &bar0->txpic_int_reg); in s2io_reset()
3501 writeq(val64, &bar0->gpio_control); in s2io_reset()
3503 writeq(val64, (void __iomem *)bar0 + 0x2700); in s2io_reset()
3512 writeq(val64, &bar0->pcc_err_reg); in s2io_reset()
3550 writeq(value[i], &bar0->swapper_ctrl); in s2io_set_swapper()
3568 writeq(valt, &bar0->xmsi_address); in s2io_set_swapper()
3581 writeq((value[i] | valr), &bar0->swapper_ctrl); in s2io_set_swapper()
3582 writeq(valt, &bar0->xmsi_address); in s2io_set_swapper()
3616 writeq(val64, &bar0->swapper_ctrl); in s2io_set_swapper()
3640 writeq(val64, &bar0->swapper_ctrl); in s2io_set_swapper()
3692 writeq(nic->msix_info[i].addr, &bar0->xmsi_address); in restore_xmsi_data()
3693 writeq(nic->msix_info[i].data, &bar0->xmsi_data); in restore_xmsi_data()
3695 writeq(val64, &bar0->xmsi_access); in restore_xmsi_data()
3717 writeq(val64, &bar0->xmsi_access); in store_xmsi_data()
3786 writeq(rx_mat, &bar0->rx_mat); in s2io_enable_msi_x()
3850 writeq(val64, &bar0->scheduled_int_ctrl); in s2io_test_msi()
3865 writeq(saved64, &bar0->scheduled_int_ctrl); in s2io_test_msi()
4202 writeq(val64, &tx_fifo->TxDL_Pointer); in s2io_xmit()
4209 writeq(val64, &tx_fifo->List_Control); in s2io_xmit()
4298 writeq(S2IO_MINUS_ONE, &bar0->general_int_mask); in s2io_msix_fifo_handle()
4304 writeq(S2IO_MINUS_ONE, &bar0->tx_traffic_int); in s2io_msix_fifo_handle()
4309 writeq(sp->general_int_mask, &bar0->general_int_mask); in s2io_msix_fifo_handle()
4333 writeq(val64, &bar0->gpio_int_reg); in s2io_txpic_intr_handle()
4337 writeq(val64, &bar0->gpio_int_mask); in s2io_txpic_intr_handle()
4343 writeq(val64, &bar0->adapter_control); in s2io_txpic_intr_handle()
4345 writeq(val64, &bar0->adapter_control); in s2io_txpic_intr_handle()
4357 writeq(val64, &bar0->gpio_int_mask); in s2io_txpic_intr_handle()
4366 writeq(val64, &bar0->gpio_int_mask); in s2io_txpic_intr_handle()
4371 writeq(val64, &bar0->adapter_control); in s2io_txpic_intr_handle()
4393 writeq(val64, addr); in do_s2io_chk_alarm_bit()
4442 writeq(val64, &bar0->mac_rmac_err_reg); in s2io_handle_errors()
4674 writeq(val64, &bar0->mc_err_reg); in s2io_handle_errors()
4745 writeq(S2IO_MINUS_ONE, &bar0->general_int_mask); in s2io_isr()
4750 writeq(S2IO_MINUS_ONE, &bar0->rx_traffic_mask); in s2io_isr()
4751 writeq(S2IO_MINUS_ONE, &bar0->rx_traffic_int); in s2io_isr()
4761 writeq(S2IO_MINUS_ONE, &bar0->rx_traffic_int); in s2io_isr()
4776 writeq(S2IO_MINUS_ONE, &bar0->tx_traffic_int); in s2io_isr()
4794 writeq(sp->general_int_mask, &bar0->general_int_mask); in s2io_isr()
4820 writeq(val64, &bar0->stat_cfg); in s2io_updt_stats()
4948 writeq(RMAC_ADDR_DATA0_MEM_ADDR(multi_mac), in s2io_set_multicast()
4950 writeq(RMAC_ADDR_DATA1_MEM_MASK(mask), in s2io_set_multicast()
4955 writeq(val64, &bar0->rmac_addr_cmd_mem); in s2io_set_multicast()
4965 writeq(RMAC_ADDR_DATA0_MEM_ADDR(dis_addr), in s2io_set_multicast()
4967 writeq(RMAC_ADDR_DATA1_MEM_MASK(0x0), in s2io_set_multicast()
4972 writeq(val64, &bar0->rmac_addr_cmd_mem); in s2io_set_multicast()
4988 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key); in s2io_set_multicast()
4990 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key); in s2io_set_multicast()
4996 writeq(val64, &bar0->rx_pa_cfg); in s2io_set_multicast()
5010 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key); in s2io_set_multicast()
5012 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key); in s2io_set_multicast()
5018 writeq(val64, &bar0->rx_pa_cfg); in s2io_set_multicast()
5043 writeq(RMAC_ADDR_DATA0_MEM_ADDR(dis_addr), in s2io_set_multicast()
5045 writeq(RMAC_ADDR_DATA1_MEM_MASK(0ULL), in s2io_set_multicast()
5051 writeq(val64, &bar0->rmac_addr_cmd_mem); in s2io_set_multicast()
5073 writeq(RMAC_ADDR_DATA0_MEM_ADDR(mac_addr), in s2io_set_multicast()
5075 writeq(RMAC_ADDR_DATA1_MEM_MASK(0ULL), in s2io_set_multicast()
5081 writeq(val64, &bar0->rmac_addr_cmd_mem); in s2io_set_multicast()
5173 writeq(RMAC_ADDR_DATA0_MEM_ADDR(addr), in do_s2io_add_mac()
5178 writeq(val64, &bar0->rmac_addr_cmd_mem); in do_s2io_add_mac()
5222 writeq(val64, &bar0->rmac_addr_cmd_mem); in do_s2io_read_unicast_mc()
5442 writeq(val64, &bar0->gpio_control); in s2io_set_led()
5450 writeq(val64, &bar0->adapter_control); in s2io_set_led()
5497 writeq(sp->adapt_ctrl_org, &bar0->gpio_control); in s2io_ethtool_set_led()
5583 writeq(val64, &bar0->rmac_pause_cfg); in s2io_ethtool_setpause_data()
5699 writeq(SPI_DATA_WRITE(data, (cnt << 3)), &bar0->spi_data); in write_eeprom()
5929 writeq(val64, &bar0->xmsi_data); in s2io_register_test()
5937 writeq(val64, &bar0->xmsi_data); in s2io_register_test()
6134 writeq(val64, &bar0->adapter_control); in s2io_rldram_test()
6151 writeq(val64, &bar0->mc_rldram_test_d0); in s2io_rldram_test()
6156 writeq(val64, &bar0->mc_rldram_test_d1); in s2io_rldram_test()
6161 writeq(val64, &bar0->mc_rldram_test_d2); in s2io_rldram_test()
6164 writeq(val64, &bar0->mc_rldram_test_add); in s2io_rldram_test()
6708 writeq(vBIT(val64, 2, 14), &bar0->rmac_max_pyld_len); in s2io_change_mtu()
6754 writeq(val64, &bar0->adapter_control); in s2io_set_link()
6759 writeq(val64, &bar0->gpio_control); in s2io_set_link()
6763 writeq(val64, &bar0->adapter_control); in s2io_set_link()
6775 writeq(val64, &bar0->adapter_control); in s2io_set_link()
6782 writeq(val64, &bar0->gpio_control); in s2io_set_link()
6788 writeq(val64, &bar0->adapter_control); in s2io_set_link()
7661 writeq(val64, &bar0->rts_ds_mem_data); in rts_ds_steer()
7667 writeq(val64, &bar0->rts_ds_mem_ctrl); in rts_ds_steer()
7999 writeq(val64, &bar0->rmac_addr_cmd_mem); in s2io_init_nic()
8063 writeq(val64, &bar0->gpio_control); in s2io_init_nic()
8065 writeq(val64, (void __iomem *)bar0 + 0x2700); in s2io_init_nic()