76 static void encx24j600_dump_rsv(struct encx24j600_priv *priv, const char *msg,  in encx24j600_dump_rsv()  argument
79 	struct net_device *dev = priv->ndev;  in encx24j600_dump_rsv()
103 static u16 encx24j600_read_reg(struct encx24j600_priv *priv, u8 reg)  in encx24j600_read_reg()  argument
105 	struct net_device *dev = priv->ndev;  in encx24j600_read_reg()
107 	int ret = regmap_read(priv->ctx.regmap, reg, &val);  in encx24j600_read_reg()
109 		netif_err(priv, drv, dev, "%s: error %d reading reg %02x\n",  in encx24j600_read_reg()
114 static void encx24j600_write_reg(struct encx24j600_priv *priv, u8 reg, u16 val)  in encx24j600_write_reg()  argument
116 	struct net_device *dev = priv->ndev;  in encx24j600_write_reg()
117 	int ret = regmap_write(priv->ctx.regmap, reg, val);  in encx24j600_write_reg()
119 		netif_err(priv, drv, dev, "%s: error %d writing reg %02x=%04x\n",  in encx24j600_write_reg()
123 static void encx24j600_update_reg(struct encx24j600_priv *priv, u8 reg,  in encx24j600_update_reg()  argument
126 	struct net_device *dev = priv->ndev;  in encx24j600_update_reg()
127 	int ret = regmap_update_bits(priv->ctx.regmap, reg, mask, val);  in encx24j600_update_reg()
129 		netif_err(priv, drv, dev, "%s: error %d updating reg %02x=%04x~%04x\n",  in encx24j600_update_reg()
133 static u16 encx24j600_read_phy(struct encx24j600_priv *priv, u8 reg)  in encx24j600_read_phy()  argument
135 	struct net_device *dev = priv->ndev;  in encx24j600_read_phy()
137 	int ret = regmap_read(priv->ctx.phymap, reg, &val);  in encx24j600_read_phy()
139 		netif_err(priv, drv, dev, "%s: error %d reading %02x\n",  in encx24j600_read_phy()
144 static void encx24j600_write_phy(struct encx24j600_priv *priv, u8 reg, u16 val)  in encx24j600_write_phy()  argument
146 	struct net_device *dev = priv->ndev;  in encx24j600_write_phy()
147 	int ret = regmap_write(priv->ctx.phymap, reg, val);  in encx24j600_write_phy()
149 		netif_err(priv, drv, dev, "%s: error %d writing reg %02x=%04x\n",  in encx24j600_write_phy()
153 static void encx24j600_clr_bits(struct encx24j600_priv *priv, u8 reg, u16 mask)  in encx24j600_clr_bits()  argument
155 	encx24j600_update_reg(priv, reg, mask, 0);  in encx24j600_clr_bits()
158 static void encx24j600_set_bits(struct encx24j600_priv *priv, u8 reg, u16 mask)  in encx24j600_set_bits()  argument
160 	encx24j600_update_reg(priv, reg, mask, mask);  in encx24j600_set_bits()
163 static void encx24j600_cmd(struct encx24j600_priv *priv, u8 cmd)  in encx24j600_cmd()  argument
165 	struct net_device *dev = priv->ndev;  in encx24j600_cmd()
166 	int ret = regmap_write(priv->ctx.regmap, cmd, 0);  in encx24j600_cmd()
168 		netif_err(priv, drv, dev, "%s: error %d with cmd %02x\n",  in encx24j600_cmd()
172 static int encx24j600_raw_read(struct encx24j600_priv *priv, u8 reg, u8 *data,  in encx24j600_raw_read()  argument
176 	mutex_lock(&priv->ctx.mutex);  in encx24j600_raw_read()
177 	ret = regmap_encx24j600_spi_read(&priv->ctx, reg, data, count);  in encx24j600_raw_read()
178 	mutex_unlock(&priv->ctx.mutex);  in encx24j600_raw_read()
183 static int encx24j600_raw_write(struct encx24j600_priv *priv, u8 reg,  in encx24j600_raw_write()  argument
187 	mutex_lock(&priv->ctx.mutex);  in encx24j600_raw_write()
188 	ret = regmap_encx24j600_spi_write(&priv->ctx, reg, data, count);  in encx24j600_raw_write()
189 	mutex_unlock(&priv->ctx.mutex);  in encx24j600_raw_write()
194 static void encx24j600_update_phcon1(struct encx24j600_priv *priv)  in encx24j600_update_phcon1()  argument
196 	u16 phcon1 = encx24j600_read_phy(priv, PHCON1);  in encx24j600_update_phcon1()
197 	if (priv->autoneg == AUTONEG_ENABLE) {  in encx24j600_update_phcon1()
201 		if (priv->speed == SPEED_100)  in encx24j600_update_phcon1()
206 		if (priv->full_duplex)  in encx24j600_update_phcon1()
211 	encx24j600_write_phy(priv, PHCON1, phcon1);  in encx24j600_update_phcon1()
215 static int encx24j600_wait_for_autoneg(struct encx24j600_priv *priv)  in encx24j600_wait_for_autoneg()  argument
217 	struct net_device *dev = priv->ndev;  in encx24j600_wait_for_autoneg()
223 	phstat1 = encx24j600_read_phy(priv, PHSTAT1);  in encx24j600_wait_for_autoneg()
228 			netif_notice(priv, drv, dev, "timeout waiting for autoneg done\n");  in encx24j600_wait_for_autoneg()
230 			priv->autoneg = AUTONEG_DISABLE;  in encx24j600_wait_for_autoneg()
231 			phstat3 = encx24j600_read_phy(priv, PHSTAT3);  in encx24j600_wait_for_autoneg()
232 			priv->speed = (phstat3 & PHY3SPD100)  in encx24j600_wait_for_autoneg()
234 			priv->full_duplex = (phstat3 & PHY3DPX) ? 1 : 0;  in encx24j600_wait_for_autoneg()
235 			encx24j600_update_phcon1(priv);  in encx24j600_wait_for_autoneg()
236 			netif_notice(priv, drv, dev, "Using parallel detection: %s/%s",  in encx24j600_wait_for_autoneg()
237 				     priv->speed == SPEED_100 ? "100" : "10",  in encx24j600_wait_for_autoneg()
238 				     priv->full_duplex ? "Full" : "Half");  in encx24j600_wait_for_autoneg()
243 		phstat1 = encx24j600_read_phy(priv, PHSTAT1);  in encx24j600_wait_for_autoneg()
246 	estat = encx24j600_read_reg(priv, ESTAT);  in encx24j600_wait_for_autoneg()
248 		encx24j600_set_bits(priv, MACON2, FULDPX);  in encx24j600_wait_for_autoneg()
249 		encx24j600_write_reg(priv, MABBIPG, 0x15);  in encx24j600_wait_for_autoneg()
251 		encx24j600_clr_bits(priv, MACON2, FULDPX);  in encx24j600_wait_for_autoneg()
252 		encx24j600_write_reg(priv, MABBIPG, 0x12);  in encx24j600_wait_for_autoneg()
254 		encx24j600_write_reg(priv, MACLCON, 0x370f);  in encx24j600_wait_for_autoneg()
261 static void encx24j600_check_link_status(struct encx24j600_priv *priv)  in encx24j600_check_link_status()  argument
263 	struct net_device *dev = priv->ndev;  in encx24j600_check_link_status()
266 	estat = encx24j600_read_reg(priv, ESTAT);  in encx24j600_check_link_status()
269 		if (priv->autoneg == AUTONEG_ENABLE)  in encx24j600_check_link_status()
270 			encx24j600_wait_for_autoneg(priv);  in encx24j600_check_link_status()
273 		netif_info(priv, ifup, dev, "link up\n");  in encx24j600_check_link_status()
275 		netif_info(priv, ifdown, dev, "link down\n");  in encx24j600_check_link_status()
280 		priv->autoneg  = AUTONEG_ENABLE;  in encx24j600_check_link_status()
281 		priv->full_duplex = true;  in encx24j600_check_link_status()
282 		priv->speed = SPEED_100;  in encx24j600_check_link_status()
287 static void encx24j600_int_link_handler(struct encx24j600_priv *priv)  in encx24j600_int_link_handler()  argument
289 	struct net_device *dev = priv->ndev;  in encx24j600_int_link_handler()
291 	netif_dbg(priv, intr, dev, "%s", __func__);  in encx24j600_int_link_handler()
292 	encx24j600_check_link_status(priv);  in encx24j600_int_link_handler()
293 	encx24j600_clr_bits(priv, EIR, LINKIF);  in encx24j600_int_link_handler()
296 static void encx24j600_tx_complete(struct encx24j600_priv *priv, bool err)  in encx24j600_tx_complete()  argument
298 	struct net_device *dev = priv->ndev;  in encx24j600_tx_complete()
300 	if (!priv->tx_skb) {  in encx24j600_tx_complete()
305 	mutex_lock(&priv->lock);  in encx24j600_tx_complete()
312 	dev->stats.tx_bytes += priv->tx_skb->len;  in encx24j600_tx_complete()
314 	encx24j600_clr_bits(priv, EIR, TXIF | TXABTIF);  in encx24j600_tx_complete()
316 	netif_dbg(priv, tx_done, dev, "TX Done%s\n", err ? ": Err" : "");  in encx24j600_tx_complete()
318 	dev_kfree_skb(priv->tx_skb);  in encx24j600_tx_complete()
319 	priv->tx_skb = NULL;  in encx24j600_tx_complete()
323 	mutex_unlock(&priv->lock);  in encx24j600_tx_complete()
326 static int encx24j600_receive_packet(struct encx24j600_priv *priv,  in encx24j600_receive_packet()  argument
329 	struct net_device *dev = priv->ndev;  in encx24j600_receive_packet()
337 	encx24j600_raw_read(priv, RRXDATA, skb_put(skb, rsv->len), rsv->len);  in encx24j600_receive_packet()
339 	if (netif_msg_pktdata(priv))  in encx24j600_receive_packet()
349 	priv->next_packet = rsv->next_packet;  in encx24j600_receive_packet()
356 static void encx24j600_rx_packets(struct encx24j600_priv *priv, u8 packet_count)  in encx24j600_rx_packets()  argument
358 	struct net_device *dev = priv->ndev;  in encx24j600_rx_packets()
364 		encx24j600_write_reg(priv, ERXRDPT, priv->next_packet);  in encx24j600_rx_packets()
365 		encx24j600_raw_read(priv, RRXDATA, (u8 *)&rsv, sizeof(rsv));  in encx24j600_rx_packets()
367 		if (netif_msg_rx_status(priv))  in encx24j600_rx_packets()
368 			encx24j600_dump_rsv(priv, __func__, &rsv);  in encx24j600_rx_packets()
372 			netif_err(priv, rx_err, dev, "RX Error %04x\n",  in encx24j600_rx_packets()
383 			encx24j600_receive_packet(priv, &rsv);  in encx24j600_rx_packets()
386 		newrxtail = priv->next_packet - 2;  in encx24j600_rx_packets()
390 		encx24j600_cmd(priv, SETPKTDEC);  in encx24j600_rx_packets()
391 		encx24j600_write_reg(priv, ERXTAIL, newrxtail);  in encx24j600_rx_packets()
397 	struct encx24j600_priv *priv = dev_id;  in encx24j600_isr()  local
398 	struct net_device *dev = priv->ndev;  in encx24j600_isr()
402 	encx24j600_cmd(priv, CLREIE);  in encx24j600_isr()
404 	eir = encx24j600_read_reg(priv, EIR);  in encx24j600_isr()
407 		encx24j600_int_link_handler(priv);  in encx24j600_isr()
410 		encx24j600_tx_complete(priv, false);  in encx24j600_isr()
413 		encx24j600_tx_complete(priv, true);  in encx24j600_isr()
418 			netif_err(priv, rx_err, dev, "Packet counter full\n");  in encx24j600_isr()
421 		encx24j600_clr_bits(priv, EIR, RXABTIF);  in encx24j600_isr()
427 		mutex_lock(&priv->lock);  in encx24j600_isr()
429 		packet_count = encx24j600_read_reg(priv, ESTAT) & 0xff;  in encx24j600_isr()
431 			encx24j600_rx_packets(priv, packet_count);  in encx24j600_isr()
432 			packet_count = encx24j600_read_reg(priv, ESTAT) & 0xff;  in encx24j600_isr()
435 		mutex_unlock(&priv->lock);  in encx24j600_isr()
439 	encx24j600_cmd(priv, SETEIE);  in encx24j600_isr()
444 static int encx24j600_soft_reset(struct encx24j600_priv *priv)  in encx24j600_soft_reset()  argument
451 	regcache_cache_bypass(priv->ctx.regmap, true);  in encx24j600_soft_reset()
454 		encx24j600_write_reg(priv, EUDAST, EUDAST_TEST_VAL);  in encx24j600_soft_reset()
455 		eudast = encx24j600_read_reg(priv, EUDAST);  in encx24j600_soft_reset()
458 	regcache_cache_bypass(priv->ctx.regmap, false);  in encx24j600_soft_reset()
467 	while (!(encx24j600_read_reg(priv, ESTAT) & CLKRDY) && --timeout)  in encx24j600_soft_reset()
476 	encx24j600_cmd(priv, SETETHRST);  in encx24j600_soft_reset()
480 	if (encx24j600_read_reg(priv, EUDAST) != 0) {  in encx24j600_soft_reset()
492 static int encx24j600_hw_reset(struct encx24j600_priv *priv)  in encx24j600_hw_reset()  argument
496 	mutex_lock(&priv->lock);  in encx24j600_hw_reset()
497 	ret = encx24j600_soft_reset(priv);  in encx24j600_hw_reset()
498 	mutex_unlock(&priv->lock);  in encx24j600_hw_reset()
503 static void encx24j600_reset_hw_tx(struct encx24j600_priv *priv)  in encx24j600_reset_hw_tx()  argument
505 	encx24j600_set_bits(priv, ECON2, TXRST);  in encx24j600_reset_hw_tx()
506 	encx24j600_clr_bits(priv, ECON2, TXRST);  in encx24j600_reset_hw_tx()
509 static void encx24j600_hw_init_tx(struct encx24j600_priv *priv)  in encx24j600_hw_init_tx()  argument
512 	encx24j600_reset_hw_tx(priv);  in encx24j600_hw_init_tx()
515 	encx24j600_clr_bits(priv, EIR, TXIF | TXABTIF);  in encx24j600_hw_init_tx()
518 	encx24j600_write_reg(priv, EGPWRPT, ENC_TX_BUF_START);  in encx24j600_hw_init_tx()
521 static void encx24j600_hw_init_rx(struct encx24j600_priv *priv)  in encx24j600_hw_init_rx()  argument
523 	encx24j600_cmd(priv, DISABLERX);  in encx24j600_hw_init_rx()
526 	encx24j600_write_reg(priv, ERXST, ENC_RX_BUF_START);  in encx24j600_hw_init_rx()
529 	encx24j600_write_reg(priv, ERXRDPT, ENC_RX_BUF_START);  in encx24j600_hw_init_rx()
531 	priv->next_packet = ENC_RX_BUF_START;  in encx24j600_hw_init_rx()
534 	encx24j600_write_reg(priv, ERXTAIL, ENC_SRAM_SIZE - 2);  in encx24j600_hw_init_rx()
537 	encx24j600_write_reg(priv, EUDAST, ENC_SRAM_SIZE);  in encx24j600_hw_init_rx()
538 	encx24j600_write_reg(priv, EUDAND, ENC_SRAM_SIZE + 1);  in encx24j600_hw_init_rx()
541 	encx24j600_write_reg(priv, MAMXFL, MAX_FRAMELEN);  in encx24j600_hw_init_rx()
544 static void encx24j600_dump_config(struct encx24j600_priv *priv,  in encx24j600_dump_config()  argument
550 	pr_info(DRV_NAME " ECON1:   %04X\n", encx24j600_read_reg(priv, ECON1));  in encx24j600_dump_config()
551 	pr_info(DRV_NAME " ECON2:   %04X\n", encx24j600_read_reg(priv, ECON2));  in encx24j600_dump_config()
552 	pr_info(DRV_NAME " ERXFCON: %04X\n", encx24j600_read_reg(priv,  in encx24j600_dump_config()
554 	pr_info(DRV_NAME " ESTAT:   %04X\n", encx24j600_read_reg(priv, ESTAT));  in encx24j600_dump_config()
555 	pr_info(DRV_NAME " EIR:     %04X\n", encx24j600_read_reg(priv, EIR));  in encx24j600_dump_config()
556 	pr_info(DRV_NAME " EIDLED:  %04X\n", encx24j600_read_reg(priv, EIDLED));  in encx24j600_dump_config()
559 	pr_info(DRV_NAME " MACON1:  %04X\n", encx24j600_read_reg(priv, MACON1));  in encx24j600_dump_config()
560 	pr_info(DRV_NAME " MACON2:  %04X\n", encx24j600_read_reg(priv, MACON2));  in encx24j600_dump_config()
561 	pr_info(DRV_NAME " MAIPG:   %04X\n", encx24j600_read_reg(priv, MAIPG));  in encx24j600_dump_config()
562 	pr_info(DRV_NAME " MACLCON: %04X\n", encx24j600_read_reg(priv,  in encx24j600_dump_config()
564 	pr_info(DRV_NAME " MABBIPG: %04X\n", encx24j600_read_reg(priv,  in encx24j600_dump_config()
568 	pr_info(DRV_NAME " PHCON1:  %04X\n", encx24j600_read_phy(priv, PHCON1));  in encx24j600_dump_config()
569 	pr_info(DRV_NAME " PHCON2:  %04X\n", encx24j600_read_phy(priv, PHCON2));  in encx24j600_dump_config()
570 	pr_info(DRV_NAME " PHANA:   %04X\n", encx24j600_read_phy(priv, PHANA));  in encx24j600_dump_config()
571 	pr_info(DRV_NAME " PHANLPA: %04X\n", encx24j600_read_phy(priv,  in encx24j600_dump_config()
573 	pr_info(DRV_NAME " PHANE:   %04X\n", encx24j600_read_phy(priv, PHANE));  in encx24j600_dump_config()
574 	pr_info(DRV_NAME " PHSTAT1: %04X\n", encx24j600_read_phy(priv,  in encx24j600_dump_config()
576 	pr_info(DRV_NAME " PHSTAT2: %04X\n", encx24j600_read_phy(priv,  in encx24j600_dump_config()
578 	pr_info(DRV_NAME " PHSTAT3: %04X\n", encx24j600_read_phy(priv,  in encx24j600_dump_config()
582 static void encx24j600_set_rxfilter_mode(struct encx24j600_priv *priv)  in encx24j600_set_rxfilter_mode()  argument
584 	switch (priv->rxfilter) {  in encx24j600_set_rxfilter_mode()
586 		encx24j600_set_bits(priv, MACON1, PASSALL);  in encx24j600_set_rxfilter_mode()
587 		encx24j600_write_reg(priv, ERXFCON, UCEN | MCEN | NOTMEEN);  in encx24j600_set_rxfilter_mode()
590 		encx24j600_clr_bits(priv, MACON1, PASSALL);  in encx24j600_set_rxfilter_mode()
591 		encx24j600_write_reg(priv, ERXFCON, UCEN | CRCEN | BCEN | MCEN);  in encx24j600_set_rxfilter_mode()
595 		encx24j600_clr_bits(priv, MACON1, PASSALL);  in encx24j600_set_rxfilter_mode()
596 		encx24j600_write_reg(priv, ERXFCON, UCEN | CRCEN | BCEN);  in encx24j600_set_rxfilter_mode()
601 static int encx24j600_hw_init(struct encx24j600_priv *priv)  in encx24j600_hw_init()  argument
603 	struct net_device *dev = priv->ndev;  in encx24j600_hw_init()
608 	priv->hw_enabled = false;  in encx24j600_hw_init()
610 	eidled = encx24j600_read_reg(priv, EIDLED);  in encx24j600_hw_init()
616 	netif_info(priv, drv, dev, "Silicon rev ID: 0x%02x\n",  in encx24j600_hw_init()
623 	encx24j600_update_reg(priv, EIDLED, 0xff00, 0xcb00);  in encx24j600_hw_init()
626 	encx24j600_write_reg(priv, MACON1, 0x9);  in encx24j600_hw_init()
629 	encx24j600_write_reg(priv, MAIPG, 0x0c12);  in encx24j600_hw_init()
632 	encx24j600_write_phy(priv, PHANA, PHANA_DEFAULT);  in encx24j600_hw_init()
634 	encx24j600_update_phcon1(priv);  in encx24j600_hw_init()
635 	encx24j600_check_link_status(priv);  in encx24j600_hw_init()
638 	if ((priv->autoneg == AUTONEG_DISABLE) && priv->full_duplex)  in encx24j600_hw_init()
641 	encx24j600_set_bits(priv, MACON2, macon2);  in encx24j600_hw_init()
643 	priv->rxfilter = RXFILTER_NORMAL;  in encx24j600_hw_init()
644 	encx24j600_set_rxfilter_mode(priv);  in encx24j600_hw_init()
647 	encx24j600_write_reg(priv, MAMXFL, MAX_FRAMELEN);  in encx24j600_hw_init()
650 	encx24j600_hw_init_tx(priv);  in encx24j600_hw_init()
653 	encx24j600_hw_init_rx(priv);  in encx24j600_hw_init()
655 	if (netif_msg_hw(priv))  in encx24j600_hw_init()
656 		encx24j600_dump_config(priv, "Hw is initialized");  in encx24j600_hw_init()
662 static void encx24j600_hw_enable(struct encx24j600_priv *priv)  in encx24j600_hw_enable()  argument
665 	encx24j600_clr_bits(priv, EIR, (PCFULIF | RXABTIF | TXABTIF | TXIF |  in encx24j600_hw_enable()
669 	encx24j600_write_reg(priv, EIE, (PCFULIE | RXABTIE | TXABTIE | TXIE |  in encx24j600_hw_enable()
673 	encx24j600_cmd(priv, ENABLERX);  in encx24j600_hw_enable()
675 	priv->hw_enabled = true;  in encx24j600_hw_enable()
678 static void encx24j600_hw_disable(struct encx24j600_priv *priv)  in encx24j600_hw_disable()  argument
681 	encx24j600_write_reg(priv, EIE, 0);  in encx24j600_hw_disable()
684 	encx24j600_cmd(priv, DISABLERX);  in encx24j600_hw_disable()
686 	priv->hw_enabled = false;  in encx24j600_hw_disable()
692 	struct encx24j600_priv *priv = netdev_priv(dev);  in encx24j600_setlink()  local
695 	if (!priv->hw_enabled) {  in encx24j600_setlink()
700 			priv->autoneg = (autoneg == AUTONEG_ENABLE);  in encx24j600_setlink()
701 			priv->full_duplex = (duplex == DUPLEX_FULL);  in encx24j600_setlink()
702 			priv->speed = (speed == SPEED_100);  in encx24j600_setlink()
704 			netif_warn(priv, link, dev, "unsupported link speed setting\n");  in encx24j600_setlink()
710 		netif_warn(priv, link, dev, "Warning: hw must be disabled to set link mode\n");  in encx24j600_setlink()
716 static void encx24j600_hw_get_macaddr(struct encx24j600_priv *priv,  in encx24j600_hw_get_macaddr()  argument
721 	val = encx24j600_read_reg(priv, MAADR1);  in encx24j600_hw_get_macaddr()
726 	val = encx24j600_read_reg(priv, MAADR2);  in encx24j600_hw_get_macaddr()
731 	val = encx24j600_read_reg(priv, MAADR3);  in encx24j600_hw_get_macaddr()
740 	struct encx24j600_priv *priv = netdev_priv(dev);  in encx24j600_set_hw_macaddr()  local
742 	if (priv->hw_enabled) {  in encx24j600_set_hw_macaddr()
743 		netif_info(priv, drv, dev, "Hardware must be disabled to set Mac address\n");  in encx24j600_set_hw_macaddr()
747 	mutex_lock(&priv->lock);  in encx24j600_set_hw_macaddr()
749 	netif_info(priv, drv, dev, "%s: Setting MAC address to %pM\n",  in encx24j600_set_hw_macaddr()
752 	encx24j600_write_reg(priv, MAADR3, (dev->dev_addr[4] |  in encx24j600_set_hw_macaddr()
754 	encx24j600_write_reg(priv, MAADR2, (dev->dev_addr[2] |  in encx24j600_set_hw_macaddr()
756 	encx24j600_write_reg(priv, MAADR1, (dev->dev_addr[0] |  in encx24j600_set_hw_macaddr()
759 	mutex_unlock(&priv->lock);  in encx24j600_set_hw_macaddr()
780 	struct encx24j600_priv *priv = netdev_priv(dev);  in encx24j600_open()  local
782 	int ret = request_threaded_irq(priv->ctx.spi->irq, NULL, encx24j600_isr,  in encx24j600_open()
784 				       DRV_NAME, priv);  in encx24j600_open()
787 			   priv->ctx.spi->irq, ret);  in encx24j600_open()
791 	encx24j600_hw_disable(priv);  in encx24j600_open()
792 	encx24j600_hw_init(priv);  in encx24j600_open()
793 	encx24j600_hw_enable(priv);  in encx24j600_open()
801 	struct encx24j600_priv *priv = netdev_priv(dev);  in encx24j600_stop()  local
804 	free_irq(priv->ctx.spi->irq, priv);  in encx24j600_stop()
810 	struct encx24j600_priv *priv =  in encx24j600_setrx_proc()  local
813 	mutex_lock(&priv->lock);  in encx24j600_setrx_proc()
814 	encx24j600_set_rxfilter_mode(priv);  in encx24j600_setrx_proc()
815 	mutex_unlock(&priv->lock);  in encx24j600_setrx_proc()
820 	struct encx24j600_priv *priv = netdev_priv(dev);  in encx24j600_set_multicast_list()  local
821 	int oldfilter = priv->rxfilter;  in encx24j600_set_multicast_list()
824 		netif_dbg(priv, link, dev, "promiscuous mode\n");  in encx24j600_set_multicast_list()
825 		priv->rxfilter = RXFILTER_PROMISC;  in encx24j600_set_multicast_list()
827 		netif_dbg(priv, link, dev, "%smulticast mode\n",  in encx24j600_set_multicast_list()
829 		priv->rxfilter = RXFILTER_MULTI;  in encx24j600_set_multicast_list()
831 		netif_dbg(priv, link, dev, "normal mode\n");  in encx24j600_set_multicast_list()
832 		priv->rxfilter = RXFILTER_NORMAL;  in encx24j600_set_multicast_list()
835 	if (oldfilter != priv->rxfilter)  in encx24j600_set_multicast_list()
836 		queue_kthread_work(&priv->kworker, &priv->setrx_work);  in encx24j600_set_multicast_list()
839 static void encx24j600_hw_tx(struct encx24j600_priv *priv)  in encx24j600_hw_tx()  argument
841 	struct net_device *dev = priv->ndev;  in encx24j600_hw_tx()
842 	netif_info(priv, tx_queued, dev, "TX Packet Len:%d\n",  in encx24j600_hw_tx()
843 		   priv->tx_skb->len);  in encx24j600_hw_tx()
845 	if (netif_msg_pktdata(priv))  in encx24j600_hw_tx()
846 		dump_packet("TX", priv->tx_skb->len, priv->tx_skb->data);  in encx24j600_hw_tx()
848 	if (encx24j600_read_reg(priv, EIR) & TXABTIF)  in encx24j600_hw_tx()
850 		encx24j600_reset_hw_tx(priv);  in encx24j600_hw_tx()
853 	encx24j600_clr_bits(priv, EIR, TXIF);  in encx24j600_hw_tx()
856 	encx24j600_write_reg(priv, EGPWRPT, ENC_TX_BUF_START);  in encx24j600_hw_tx()
859 	encx24j600_raw_write(priv, WGPDATA, (u8 *)priv->tx_skb->data,  in encx24j600_hw_tx()
860 			     priv->tx_skb->len);  in encx24j600_hw_tx()
863 	encx24j600_write_reg(priv, ETXST, ENC_TX_BUF_START);  in encx24j600_hw_tx()
866 	encx24j600_write_reg(priv, ETXLEN, priv->tx_skb->len);  in encx24j600_hw_tx()
869 	encx24j600_cmd(priv, SETTXRTS);  in encx24j600_hw_tx()
874 	struct encx24j600_priv *priv =  in encx24j600_tx_proc()  local
877 	mutex_lock(&priv->lock);  in encx24j600_tx_proc()
878 	encx24j600_hw_tx(priv);  in encx24j600_tx_proc()
879 	mutex_unlock(&priv->lock);  in encx24j600_tx_proc()
884 	struct encx24j600_priv *priv = netdev_priv(dev);  in encx24j600_tx()  local
892 	priv->tx_skb = skb;  in encx24j600_tx()
894 	queue_kthread_work(&priv->kworker, &priv->tx_work);  in encx24j600_tx()
902 	struct encx24j600_priv *priv = netdev_priv(dev);  in encx24j600_tx_timeout()  local
904 	netif_err(priv, tx_err, dev, "TX timeout at %ld, latency %ld\n",  in encx24j600_tx_timeout()
920 	struct encx24j600_priv *priv = netdev_priv(dev);  in encx24j600_get_regs()  local
925 	mutex_lock(&priv->lock);  in encx24j600_get_regs()
929 		regmap_read(priv->ctx.regmap, reg, &val);  in encx24j600_get_regs()
932 	mutex_unlock(&priv->lock);  in encx24j600_get_regs()
947 	struct encx24j600_priv *priv = netdev_priv(dev);  in encx24j600_get_settings()  local
954 	ethtool_cmd_speed_set(cmd, priv->speed);  in encx24j600_get_settings()
955 	cmd->duplex = priv->full_duplex ? DUPLEX_FULL : DUPLEX_HALF;  in encx24j600_get_settings()
957 	cmd->autoneg = priv->autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE;  in encx24j600_get_settings()
971 	struct encx24j600_priv *priv = netdev_priv(dev);  in encx24j600_get_msglevel()  local
972 	return priv->msg_enable;  in encx24j600_get_msglevel()
977 	struct encx24j600_priv *priv = netdev_priv(dev);  in encx24j600_set_msglevel()  local
978 	priv->msg_enable = val;  in encx24j600_set_msglevel()
1006 	struct encx24j600_priv *priv;  in encx24j600_spi_probe()  local
1015 	priv = netdev_priv(ndev);  in encx24j600_spi_probe()
1016 	spi_set_drvdata(spi, priv);  in encx24j600_spi_probe()
1017 	dev_set_drvdata(&spi->dev, priv);  in encx24j600_spi_probe()
1020 	priv->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);  in encx24j600_spi_probe()
1021 	priv->ndev = ndev;  in encx24j600_spi_probe()
1024 	priv->full_duplex = true;  in encx24j600_spi_probe()
1025 	priv->autoneg = AUTONEG_ENABLE;  in encx24j600_spi_probe()
1026 	priv->speed = SPEED_100;  in encx24j600_spi_probe()
1028 	priv->ctx.spi = spi;  in encx24j600_spi_probe()
1029 	devm_regmap_init_encx24j600(&spi->dev, &priv->ctx);  in encx24j600_spi_probe()
1033 	mutex_init(&priv->lock);  in encx24j600_spi_probe()
1036 	if (encx24j600_hw_reset(priv)) {  in encx24j600_spi_probe()
1037 		netif_err(priv, probe, ndev,  in encx24j600_spi_probe()
1044 	if (encx24j600_hw_init(priv)) {  in encx24j600_spi_probe()
1045 		netif_err(priv, probe, ndev,  in encx24j600_spi_probe()
1051 	init_kthread_worker(&priv->kworker);  in encx24j600_spi_probe()
1052 	init_kthread_work(&priv->tx_work, encx24j600_tx_proc);  in encx24j600_spi_probe()
1053 	init_kthread_work(&priv->setrx_work, encx24j600_setrx_proc);  in encx24j600_spi_probe()
1055 	priv->kworker_task = kthread_run(kthread_worker_fn, &priv->kworker,  in encx24j600_spi_probe()
1058 	if (IS_ERR(priv->kworker_task)) {  in encx24j600_spi_probe()
1059 		ret = PTR_ERR(priv->kworker_task);  in encx24j600_spi_probe()
1064 	encx24j600_hw_get_macaddr(priv, ndev->dev_addr);  in encx24j600_spi_probe()
1070 		netif_err(priv, probe, ndev, "Error %d initializing card encx24j600 card\n",  in encx24j600_spi_probe()
1075 	netif_info(priv, drv, priv->ndev, "MAC address %pM\n", ndev->dev_addr);  in encx24j600_spi_probe()
1088 	struct encx24j600_priv *priv = dev_get_drvdata(&spi->dev);  in encx24j600_spi_remove()  local
1090 	unregister_netdev(priv->ndev);  in encx24j600_spi_remove()
1092 	free_netdev(priv->ndev);  in encx24j600_spi_remove()