Lines Matching refs:encx24j600_write_reg
114 static void encx24j600_write_reg(struct encx24j600_priv *priv, u8 reg, u16 val) in encx24j600_write_reg() function
249 encx24j600_write_reg(priv, MABBIPG, 0x15); in encx24j600_wait_for_autoneg()
252 encx24j600_write_reg(priv, MABBIPG, 0x12); in encx24j600_wait_for_autoneg()
254 encx24j600_write_reg(priv, MACLCON, 0x370f); in encx24j600_wait_for_autoneg()
364 encx24j600_write_reg(priv, ERXRDPT, priv->next_packet); in encx24j600_rx_packets()
391 encx24j600_write_reg(priv, ERXTAIL, newrxtail); in encx24j600_rx_packets()
454 encx24j600_write_reg(priv, EUDAST, EUDAST_TEST_VAL); in encx24j600_soft_reset()
518 encx24j600_write_reg(priv, EGPWRPT, ENC_TX_BUF_START); in encx24j600_hw_init_tx()
526 encx24j600_write_reg(priv, ERXST, ENC_RX_BUF_START); in encx24j600_hw_init_rx()
529 encx24j600_write_reg(priv, ERXRDPT, ENC_RX_BUF_START); in encx24j600_hw_init_rx()
534 encx24j600_write_reg(priv, ERXTAIL, ENC_SRAM_SIZE - 2); in encx24j600_hw_init_rx()
537 encx24j600_write_reg(priv, EUDAST, ENC_SRAM_SIZE); in encx24j600_hw_init_rx()
538 encx24j600_write_reg(priv, EUDAND, ENC_SRAM_SIZE + 1); in encx24j600_hw_init_rx()
541 encx24j600_write_reg(priv, MAMXFL, MAX_FRAMELEN); in encx24j600_hw_init_rx()
587 encx24j600_write_reg(priv, ERXFCON, UCEN | MCEN | NOTMEEN); in encx24j600_set_rxfilter_mode()
591 encx24j600_write_reg(priv, ERXFCON, UCEN | CRCEN | BCEN | MCEN); in encx24j600_set_rxfilter_mode()
596 encx24j600_write_reg(priv, ERXFCON, UCEN | CRCEN | BCEN); in encx24j600_set_rxfilter_mode()
626 encx24j600_write_reg(priv, MACON1, 0x9); in encx24j600_hw_init()
629 encx24j600_write_reg(priv, MAIPG, 0x0c12); in encx24j600_hw_init()
647 encx24j600_write_reg(priv, MAMXFL, MAX_FRAMELEN); in encx24j600_hw_init()
669 encx24j600_write_reg(priv, EIE, (PCFULIE | RXABTIE | TXABTIE | TXIE | in encx24j600_hw_enable()
681 encx24j600_write_reg(priv, EIE, 0); in encx24j600_hw_disable()
752 encx24j600_write_reg(priv, MAADR3, (dev->dev_addr[4] | in encx24j600_set_hw_macaddr()
754 encx24j600_write_reg(priv, MAADR2, (dev->dev_addr[2] | in encx24j600_set_hw_macaddr()
756 encx24j600_write_reg(priv, MAADR1, (dev->dev_addr[0] | in encx24j600_set_hw_macaddr()
856 encx24j600_write_reg(priv, EGPWRPT, ENC_TX_BUF_START); in encx24j600_hw_tx()
863 encx24j600_write_reg(priv, ETXST, ENC_TX_BUF_START); in encx24j600_hw_tx()
866 encx24j600_write_reg(priv, ETXLEN, priv->tx_skb->len); in encx24j600_hw_tx()