Lines Matching refs:hw
1353 struct ksz_hw *hw; member
1427 struct ksz_hw hw; member
1499 static inline void hw_ack_intr(struct ksz_hw *hw, uint interrupt) in hw_ack_intr() argument
1501 writel(interrupt, hw->io + KS884X_INTERRUPTS_STATUS); in hw_ack_intr()
1504 static inline void hw_dis_intr(struct ksz_hw *hw) in hw_dis_intr() argument
1506 hw->intr_blocked = hw->intr_mask; in hw_dis_intr()
1507 writel(0, hw->io + KS884X_INTERRUPTS_ENABLE); in hw_dis_intr()
1508 hw->intr_set = readl(hw->io + KS884X_INTERRUPTS_ENABLE); in hw_dis_intr()
1511 static inline void hw_set_intr(struct ksz_hw *hw, uint interrupt) in hw_set_intr() argument
1513 hw->intr_set = interrupt; in hw_set_intr()
1514 writel(interrupt, hw->io + KS884X_INTERRUPTS_ENABLE); in hw_set_intr()
1517 static inline void hw_ena_intr(struct ksz_hw *hw) in hw_ena_intr() argument
1519 hw->intr_blocked = 0; in hw_ena_intr()
1520 hw_set_intr(hw, hw->intr_mask); in hw_ena_intr()
1523 static inline void hw_dis_intr_bit(struct ksz_hw *hw, uint bit) in hw_dis_intr_bit() argument
1525 hw->intr_mask &= ~(bit); in hw_dis_intr_bit()
1528 static inline void hw_turn_off_intr(struct ksz_hw *hw, uint interrupt) in hw_turn_off_intr() argument
1532 read_intr = readl(hw->io + KS884X_INTERRUPTS_ENABLE); in hw_turn_off_intr()
1533 hw->intr_set = read_intr & ~interrupt; in hw_turn_off_intr()
1534 writel(hw->intr_set, hw->io + KS884X_INTERRUPTS_ENABLE); in hw_turn_off_intr()
1535 hw_dis_intr_bit(hw, interrupt); in hw_turn_off_intr()
1546 static void hw_turn_on_intr(struct ksz_hw *hw, u32 bit) in hw_turn_on_intr() argument
1548 hw->intr_mask |= bit; in hw_turn_on_intr()
1550 if (!hw->intr_blocked) in hw_turn_on_intr()
1551 hw_set_intr(hw, hw->intr_mask); in hw_turn_on_intr()
1554 static inline void hw_ena_intr_bit(struct ksz_hw *hw, uint interrupt) in hw_ena_intr_bit() argument
1558 read_intr = readl(hw->io + KS884X_INTERRUPTS_ENABLE); in hw_ena_intr_bit()
1559 hw->intr_set = read_intr | interrupt; in hw_ena_intr_bit()
1560 writel(hw->intr_set, hw->io + KS884X_INTERRUPTS_ENABLE); in hw_ena_intr_bit()
1563 static inline void hw_read_intr(struct ksz_hw *hw, uint *status) in hw_read_intr() argument
1565 *status = readl(hw->io + KS884X_INTERRUPTS_STATUS); in hw_read_intr()
1566 *status = *status & hw->intr_set; in hw_read_intr()
1569 static inline void hw_restore_intr(struct ksz_hw *hw, uint interrupt) in hw_restore_intr() argument
1572 hw_ena_intr(hw); in hw_restore_intr()
1583 static uint hw_block_intr(struct ksz_hw *hw) in hw_block_intr() argument
1587 if (!hw->intr_blocked) { in hw_block_intr()
1588 hw_dis_intr(hw); in hw_block_intr()
1589 interrupt = hw->intr_blocked; in hw_block_intr()
1658 #define HW_DELAY(hw, reg) \ argument
1661 dummy = readw(hw->io + reg); \
1674 static void sw_r_table(struct ksz_hw *hw, int table, u16 addr, u32 *data) in sw_r_table() argument
1681 interrupt = hw_block_intr(hw); in sw_r_table()
1683 writew(ctrl_addr, hw->io + KS884X_IACR_OFFSET); in sw_r_table()
1684 HW_DELAY(hw, KS884X_IACR_OFFSET); in sw_r_table()
1685 *data = readl(hw->io + KS884X_ACC_DATA_0_OFFSET); in sw_r_table()
1687 hw_restore_intr(hw, interrupt); in sw_r_table()
1701 static void sw_w_table_64(struct ksz_hw *hw, int table, u16 addr, u32 data_hi, in sw_w_table_64() argument
1709 interrupt = hw_block_intr(hw); in sw_w_table_64()
1711 writel(data_hi, hw->io + KS884X_ACC_DATA_4_OFFSET); in sw_w_table_64()
1712 writel(data_lo, hw->io + KS884X_ACC_DATA_0_OFFSET); in sw_w_table_64()
1714 writew(ctrl_addr, hw->io + KS884X_IACR_OFFSET); in sw_w_table_64()
1715 HW_DELAY(hw, KS884X_IACR_OFFSET); in sw_w_table_64()
1717 hw_restore_intr(hw, interrupt); in sw_w_table_64()
1734 static void sw_w_sta_mac_table(struct ksz_hw *hw, u16 addr, u8 *mac_addr, in sw_w_sta_mac_table() argument
1755 sw_w_table_64(hw, TABLE_STATIC_MAC, addr, data_hi, data_lo); in sw_w_sta_mac_table()
1771 static int sw_r_vlan_table(struct ksz_hw *hw, u16 addr, u16 *vid, u8 *fid, in sw_r_vlan_table() argument
1776 sw_r_table(hw, TABLE_VLAN, addr, &data); in sw_r_vlan_table()
1797 static void port_r_mib_cnt(struct ksz_hw *hw, int port, u16 addr, u64 *cnt) in port_r_mib_cnt() argument
1806 interrupt = hw_block_intr(hw); in port_r_mib_cnt()
1809 writew(ctrl_addr, hw->io + KS884X_IACR_OFFSET); in port_r_mib_cnt()
1810 HW_DELAY(hw, KS884X_IACR_OFFSET); in port_r_mib_cnt()
1813 data = readl(hw->io + KS884X_ACC_DATA_0_OFFSET); in port_r_mib_cnt()
1823 hw_restore_intr(hw, interrupt); in port_r_mib_cnt()
1835 static void port_r_mib_pkt(struct ksz_hw *hw, int port, u32 *last, u64 *cnt) in port_r_mib_pkt() argument
1845 interrupt = hw_block_intr(hw); in port_r_mib_pkt()
1850 writew(ctrl_addr, hw->io + KS884X_IACR_OFFSET); in port_r_mib_pkt()
1851 HW_DELAY(hw, KS884X_IACR_OFFSET); in port_r_mib_pkt()
1852 data = readl(hw->io + KS884X_ACC_DATA_0_OFFSET); in port_r_mib_pkt()
1854 hw_restore_intr(hw, interrupt); in port_r_mib_pkt()
1883 static int port_r_cnt(struct ksz_hw *hw, int port) in port_r_cnt() argument
1885 struct ksz_port_mib *mib = &hw->port_mib[port]; in port_r_cnt()
1889 port_r_mib_cnt(hw, port, mib->cnt_ptr, in port_r_cnt()
1893 if (hw->mib_cnt > PORT_COUNTER_NUM) in port_r_cnt()
1894 port_r_mib_pkt(hw, port, mib->dropped, in port_r_cnt()
1908 static void port_init_cnt(struct ksz_hw *hw, int port) in port_init_cnt() argument
1910 struct ksz_port_mib *mib = &hw->port_mib[port]; in port_init_cnt()
1915 port_r_mib_cnt(hw, port, mib->cnt_ptr, in port_init_cnt()
1919 if (hw->mib_cnt > PORT_COUNTER_NUM) in port_init_cnt()
1920 port_r_mib_pkt(hw, port, mib->dropped, in port_init_cnt()
1942 static int port_chk(struct ksz_hw *hw, int port, int offset, u16 bits) in port_chk() argument
1949 data = readw(hw->io + addr); in port_chk()
1963 static void port_cfg(struct ksz_hw *hw, int port, int offset, u16 bits, in port_cfg() argument
1971 data = readw(hw->io + addr); in port_cfg()
1976 writew(data, hw->io + addr); in port_cfg()
1991 static int port_chk_shift(struct ksz_hw *hw, int port, u32 addr, int shift) in port_chk_shift() argument
1996 data = readw(hw->io + addr); in port_chk_shift()
2011 static void port_cfg_shift(struct ksz_hw *hw, int port, u32 addr, int shift, in port_cfg_shift() argument
2017 data = readw(hw->io + addr); in port_cfg_shift()
2023 writew(data, hw->io + addr); in port_cfg_shift()
2035 static void port_r8(struct ksz_hw *hw, int port, int offset, u8 *data) in port_r8() argument
2041 *data = readb(hw->io + addr); in port_r8()
2053 static void port_r16(struct ksz_hw *hw, int port, int offset, u16 *data) in port_r16() argument
2059 *data = readw(hw->io + addr); in port_r16()
2071 static void port_w16(struct ksz_hw *hw, int port, int offset, u16 data) in port_w16() argument
2077 writew(data, hw->io + addr); in port_w16()
2091 static int sw_chk(struct ksz_hw *hw, u32 addr, u16 bits) in sw_chk() argument
2095 data = readw(hw->io + addr); in sw_chk()
2108 static void sw_cfg(struct ksz_hw *hw, u32 addr, u16 bits, int set) in sw_cfg() argument
2112 data = readw(hw->io + addr); in sw_cfg()
2117 writew(data, hw->io + addr); in sw_cfg()
2122 static inline void port_cfg_broad_storm(struct ksz_hw *hw, int p, int set) in port_cfg_broad_storm() argument
2124 port_cfg(hw, p, in port_cfg_broad_storm()
2128 static inline int port_chk_broad_storm(struct ksz_hw *hw, int p) in port_chk_broad_storm() argument
2130 return port_chk(hw, p, in port_chk_broad_storm()
2147 static void sw_cfg_broad_storm(struct ksz_hw *hw, u8 percent) in sw_cfg_broad_storm() argument
2155 data = readw(hw->io + KS8842_SWITCH_CTRL_3_OFFSET); in sw_cfg_broad_storm()
2158 writew(data, hw->io + KS8842_SWITCH_CTRL_3_OFFSET); in sw_cfg_broad_storm()
2168 static void sw_get_broad_storm(struct ksz_hw *hw, u8 *percent) in sw_get_broad_storm() argument
2173 data = readw(hw->io + KS8842_SWITCH_CTRL_3_OFFSET); in sw_get_broad_storm()
2188 static void sw_dis_broad_storm(struct ksz_hw *hw, int port) in sw_dis_broad_storm() argument
2190 port_cfg_broad_storm(hw, port, 0); in sw_dis_broad_storm()
2200 static void sw_ena_broad_storm(struct ksz_hw *hw, int port) in sw_ena_broad_storm() argument
2202 sw_cfg_broad_storm(hw, hw->ksz_switch->broad_per); in sw_ena_broad_storm()
2203 port_cfg_broad_storm(hw, port, 1); in sw_ena_broad_storm()
2212 static void sw_init_broad_storm(struct ksz_hw *hw) in sw_init_broad_storm() argument
2216 hw->ksz_switch->broad_per = 1; in sw_init_broad_storm()
2217 sw_cfg_broad_storm(hw, hw->ksz_switch->broad_per); in sw_init_broad_storm()
2219 sw_dis_broad_storm(hw, port); in sw_init_broad_storm()
2220 sw_cfg(hw, KS8842_SWITCH_CTRL_2_OFFSET, MULTICAST_STORM_DISABLE, 1); in sw_init_broad_storm()
2231 static void hw_cfg_broad_storm(struct ksz_hw *hw, u8 percent) in hw_cfg_broad_storm() argument
2236 sw_cfg_broad_storm(hw, percent); in hw_cfg_broad_storm()
2237 sw_get_broad_storm(hw, &percent); in hw_cfg_broad_storm()
2238 hw->ksz_switch->broad_per = percent; in hw_cfg_broad_storm()
2248 static void sw_dis_prio_rate(struct ksz_hw *hw, int port) in sw_dis_prio_rate() argument
2254 writel(0, hw->io + addr); in sw_dis_prio_rate()
2263 static void sw_init_prio_rate(struct ksz_hw *hw) in sw_init_prio_rate() argument
2267 struct ksz_switch *sw = hw->ksz_switch; in sw_init_prio_rate()
2274 sw_dis_prio_rate(hw, port); in sw_init_prio_rate()
2280 static inline void port_cfg_back_pressure(struct ksz_hw *hw, int p, int set) in port_cfg_back_pressure() argument
2282 port_cfg(hw, p, in port_cfg_back_pressure()
2286 static inline void port_cfg_force_flow_ctrl(struct ksz_hw *hw, int p, int set) in port_cfg_force_flow_ctrl() argument
2288 port_cfg(hw, p, in port_cfg_force_flow_ctrl()
2292 static inline int port_chk_back_pressure(struct ksz_hw *hw, int p) in port_chk_back_pressure() argument
2294 return port_chk(hw, p, in port_chk_back_pressure()
2298 static inline int port_chk_force_flow_ctrl(struct ksz_hw *hw, int p) in port_chk_force_flow_ctrl() argument
2300 return port_chk(hw, p, in port_chk_force_flow_ctrl()
2306 static inline void port_cfg_rx(struct ksz_hw *hw, int p, int set) in port_cfg_rx() argument
2308 port_cfg(hw, p, in port_cfg_rx()
2312 static inline void port_cfg_tx(struct ksz_hw *hw, int p, int set) in port_cfg_tx() argument
2314 port_cfg(hw, p, in port_cfg_tx()
2318 static inline void sw_cfg_fast_aging(struct ksz_hw *hw, int set) in sw_cfg_fast_aging() argument
2320 sw_cfg(hw, KS8842_SWITCH_CTRL_1_OFFSET, SWITCH_FAST_AGING, set); in sw_cfg_fast_aging()
2323 static inline void sw_flush_dyn_mac_table(struct ksz_hw *hw) in sw_flush_dyn_mac_table() argument
2325 if (!(hw->overrides & FAST_AGING)) { in sw_flush_dyn_mac_table()
2326 sw_cfg_fast_aging(hw, 1); in sw_flush_dyn_mac_table()
2328 sw_cfg_fast_aging(hw, 0); in sw_flush_dyn_mac_table()
2334 static inline void port_cfg_ins_tag(struct ksz_hw *hw, int p, int insert) in port_cfg_ins_tag() argument
2336 port_cfg(hw, p, in port_cfg_ins_tag()
2340 static inline void port_cfg_rmv_tag(struct ksz_hw *hw, int p, int remove) in port_cfg_rmv_tag() argument
2342 port_cfg(hw, p, in port_cfg_rmv_tag()
2346 static inline int port_chk_ins_tag(struct ksz_hw *hw, int p) in port_chk_ins_tag() argument
2348 return port_chk(hw, p, in port_chk_ins_tag()
2352 static inline int port_chk_rmv_tag(struct ksz_hw *hw, int p) in port_chk_rmv_tag() argument
2354 return port_chk(hw, p, in port_chk_rmv_tag()
2358 static inline void port_cfg_dis_non_vid(struct ksz_hw *hw, int p, int set) in port_cfg_dis_non_vid() argument
2360 port_cfg(hw, p, in port_cfg_dis_non_vid()
2364 static inline void port_cfg_in_filter(struct ksz_hw *hw, int p, int set) in port_cfg_in_filter() argument
2366 port_cfg(hw, p, in port_cfg_in_filter()
2370 static inline int port_chk_dis_non_vid(struct ksz_hw *hw, int p) in port_chk_dis_non_vid() argument
2372 return port_chk(hw, p, in port_chk_dis_non_vid()
2376 static inline int port_chk_in_filter(struct ksz_hw *hw, int p) in port_chk_in_filter() argument
2378 return port_chk(hw, p, in port_chk_in_filter()
2384 static inline void port_cfg_mirror_sniffer(struct ksz_hw *hw, int p, int set) in port_cfg_mirror_sniffer() argument
2386 port_cfg(hw, p, in port_cfg_mirror_sniffer()
2390 static inline void port_cfg_mirror_rx(struct ksz_hw *hw, int p, int set) in port_cfg_mirror_rx() argument
2392 port_cfg(hw, p, in port_cfg_mirror_rx()
2396 static inline void port_cfg_mirror_tx(struct ksz_hw *hw, int p, int set) in port_cfg_mirror_tx() argument
2398 port_cfg(hw, p, in port_cfg_mirror_tx()
2402 static inline void sw_cfg_mirror_rx_tx(struct ksz_hw *hw, int set) in sw_cfg_mirror_rx_tx() argument
2404 sw_cfg(hw, KS8842_SWITCH_CTRL_2_OFFSET, SWITCH_MIRROR_RX_TX, set); in sw_cfg_mirror_rx_tx()
2407 static void sw_init_mirror(struct ksz_hw *hw) in sw_init_mirror() argument
2412 port_cfg_mirror_sniffer(hw, port, 0); in sw_init_mirror()
2413 port_cfg_mirror_rx(hw, port, 0); in sw_init_mirror()
2414 port_cfg_mirror_tx(hw, port, 0); in sw_init_mirror()
2416 sw_cfg_mirror_rx_tx(hw, 0); in sw_init_mirror()
2419 static inline void sw_cfg_unk_def_deliver(struct ksz_hw *hw, int set) in sw_cfg_unk_def_deliver() argument
2421 sw_cfg(hw, KS8842_SWITCH_CTRL_7_OFFSET, in sw_cfg_unk_def_deliver()
2425 static inline int sw_cfg_chk_unk_def_deliver(struct ksz_hw *hw) in sw_cfg_chk_unk_def_deliver() argument
2427 return sw_chk(hw, KS8842_SWITCH_CTRL_7_OFFSET, in sw_cfg_chk_unk_def_deliver()
2431 static inline void sw_cfg_unk_def_port(struct ksz_hw *hw, int port, int set) in sw_cfg_unk_def_port() argument
2433 port_cfg_shift(hw, port, KS8842_SWITCH_CTRL_7_OFFSET, 0, set); in sw_cfg_unk_def_port()
2436 static inline int sw_chk_unk_def_port(struct ksz_hw *hw, int port) in sw_chk_unk_def_port() argument
2438 return port_chk_shift(hw, port, KS8842_SWITCH_CTRL_7_OFFSET, 0); in sw_chk_unk_def_port()
2443 static inline void port_cfg_diffserv(struct ksz_hw *hw, int p, int set) in port_cfg_diffserv() argument
2445 port_cfg(hw, p, in port_cfg_diffserv()
2449 static inline void port_cfg_802_1p(struct ksz_hw *hw, int p, int set) in port_cfg_802_1p() argument
2451 port_cfg(hw, p, in port_cfg_802_1p()
2455 static inline void port_cfg_replace_vid(struct ksz_hw *hw, int p, int set) in port_cfg_replace_vid() argument
2457 port_cfg(hw, p, in port_cfg_replace_vid()
2461 static inline void port_cfg_prio(struct ksz_hw *hw, int p, int set) in port_cfg_prio() argument
2463 port_cfg(hw, p, in port_cfg_prio()
2467 static inline int port_chk_diffserv(struct ksz_hw *hw, int p) in port_chk_diffserv() argument
2469 return port_chk(hw, p, in port_chk_diffserv()
2473 static inline int port_chk_802_1p(struct ksz_hw *hw, int p) in port_chk_802_1p() argument
2475 return port_chk(hw, p, in port_chk_802_1p()
2479 static inline int port_chk_replace_vid(struct ksz_hw *hw, int p) in port_chk_replace_vid() argument
2481 return port_chk(hw, p, in port_chk_replace_vid()
2485 static inline int port_chk_prio(struct ksz_hw *hw, int p) in port_chk_prio() argument
2487 return port_chk(hw, p, in port_chk_prio()
2498 static void sw_dis_diffserv(struct ksz_hw *hw, int port) in sw_dis_diffserv() argument
2500 port_cfg_diffserv(hw, port, 0); in sw_dis_diffserv()
2510 static void sw_dis_802_1p(struct ksz_hw *hw, int port) in sw_dis_802_1p() argument
2512 port_cfg_802_1p(hw, port, 0); in sw_dis_802_1p()
2521 static void sw_cfg_replace_null_vid(struct ksz_hw *hw, int set) in sw_cfg_replace_null_vid() argument
2523 sw_cfg(hw, KS8842_SWITCH_CTRL_3_OFFSET, SWITCH_REPLACE_NULL_VID, set); in sw_cfg_replace_null_vid()
2537 static void sw_cfg_replace_vid(struct ksz_hw *hw, int port, int set) in sw_cfg_replace_vid() argument
2539 port_cfg_replace_vid(hw, port, set); in sw_cfg_replace_vid()
2550 static void sw_cfg_port_based(struct ksz_hw *hw, int port, u8 prio) in sw_cfg_port_based() argument
2557 hw->ksz_switch->port_cfg[port].port_prio = prio; in sw_cfg_port_based()
2559 port_r16(hw, port, KS8842_PORT_CTRL_1_OFFSET, &data); in sw_cfg_port_based()
2562 port_w16(hw, port, KS8842_PORT_CTRL_1_OFFSET, data); in sw_cfg_port_based()
2573 static void sw_dis_multi_queue(struct ksz_hw *hw, int port) in sw_dis_multi_queue() argument
2575 port_cfg_prio(hw, port, 0); in sw_dis_multi_queue()
2584 static void sw_init_prio(struct ksz_hw *hw) in sw_init_prio() argument
2588 struct ksz_switch *sw = hw->ksz_switch; in sw_init_prio()
2612 sw_dis_multi_queue(hw, port); in sw_init_prio()
2613 sw_dis_diffserv(hw, port); in sw_init_prio()
2614 sw_dis_802_1p(hw, port); in sw_init_prio()
2615 sw_cfg_replace_vid(hw, port, 0); in sw_init_prio()
2618 sw_cfg_port_based(hw, port, sw->port_cfg[port].port_prio); in sw_init_prio()
2620 sw_cfg_replace_null_vid(hw, 0); in sw_init_prio()
2631 static void port_get_def_vid(struct ksz_hw *hw, int port, u16 *vid) in port_get_def_vid() argument
2637 *vid = readw(hw->io + addr); in port_get_def_vid()
2646 static void sw_init_vlan(struct ksz_hw *hw) in sw_init_vlan() argument
2650 struct ksz_switch *sw = hw->ksz_switch; in sw_init_vlan()
2654 sw_r_vlan_table(hw, entry, in sw_init_vlan()
2661 port_get_def_vid(hw, port, &sw->port_cfg[port].vid); in sw_init_vlan()
2674 static void sw_cfg_port_base_vlan(struct ksz_hw *hw, int port, u8 member) in sw_cfg_port_base_vlan() argument
2682 data = readb(hw->io + addr); in sw_cfg_port_base_vlan()
2685 writeb(data, hw->io + addr); in sw_cfg_port_base_vlan()
2687 hw->ksz_switch->port_cfg[port].member = member; in sw_cfg_port_base_vlan()
2697 static inline void sw_get_addr(struct ksz_hw *hw, u8 *mac_addr) in sw_get_addr() argument
2702 mac_addr[i] = readb(hw->io + KS8842_MAC_ADDR_0_OFFSET + i); in sw_get_addr()
2703 mac_addr[1 + i] = readb(hw->io + KS8842_MAC_ADDR_1_OFFSET + i); in sw_get_addr()
2714 static void sw_set_addr(struct ksz_hw *hw, u8 *mac_addr) in sw_set_addr() argument
2719 writeb(mac_addr[i], hw->io + KS8842_MAC_ADDR_0_OFFSET + i); in sw_set_addr()
2720 writeb(mac_addr[1 + i], hw->io + KS8842_MAC_ADDR_1_OFFSET + i); in sw_set_addr()
2730 static void sw_set_global_ctrl(struct ksz_hw *hw) in sw_set_global_ctrl() argument
2735 data = readw(hw->io + KS8842_SWITCH_CTRL_3_OFFSET); in sw_set_global_ctrl()
2737 writew(data, hw->io + KS8842_SWITCH_CTRL_3_OFFSET); in sw_set_global_ctrl()
2739 data = readw(hw->io + KS8842_SWITCH_CTRL_1_OFFSET); in sw_set_global_ctrl()
2748 if (hw->overrides & FAST_AGING) in sw_set_global_ctrl()
2752 writew(data, hw->io + KS8842_SWITCH_CTRL_1_OFFSET); in sw_set_global_ctrl()
2754 data = readw(hw->io + KS8842_SWITCH_CTRL_2_OFFSET); in sw_set_global_ctrl()
2758 writew(data, hw->io + KS8842_SWITCH_CTRL_2_OFFSET); in sw_set_global_ctrl()
2778 static void port_set_stp_state(struct ksz_hw *hw, int port, int state) in port_set_stp_state() argument
2782 port_r16(hw, port, KS8842_PORT_CTRL_2_OFFSET, &data); in port_set_stp_state()
2819 port_w16(hw, port, KS8842_PORT_CTRL_2_OFFSET, data); in port_set_stp_state()
2820 hw->ksz_switch->port_cfg[port].stp_state = state; in port_set_stp_state()
2834 static void sw_clr_sta_mac_table(struct ksz_hw *hw) in sw_clr_sta_mac_table() argument
2840 entry = &hw->ksz_switch->mac_table[i]; in sw_clr_sta_mac_table()
2841 sw_w_sta_mac_table(hw, i, in sw_clr_sta_mac_table()
2854 static void sw_init_stp(struct ksz_hw *hw) in sw_init_stp() argument
2858 entry = &hw->ksz_switch->mac_table[STP_ENTRY]; in sw_init_stp()
2868 sw_w_sta_mac_table(hw, STP_ENTRY, in sw_init_stp()
2880 static void sw_block_addr(struct ksz_hw *hw) in sw_block_addr() argument
2886 entry = &hw->ksz_switch->mac_table[i]; in sw_block_addr()
2888 sw_w_sta_mac_table(hw, i, in sw_block_addr()
2904 static inline void hw_r_phy_ctrl(struct ksz_hw *hw, int phy, u16 *data) in hw_r_phy_ctrl() argument
2906 *data = readw(hw->io + phy + KS884X_PHY_CTRL_OFFSET); in hw_r_phy_ctrl()
2909 static inline void hw_w_phy_ctrl(struct ksz_hw *hw, int phy, u16 data) in hw_w_phy_ctrl() argument
2911 writew(data, hw->io + phy + KS884X_PHY_CTRL_OFFSET); in hw_w_phy_ctrl()
2914 static inline void hw_r_phy_link_stat(struct ksz_hw *hw, int phy, u16 *data) in hw_r_phy_link_stat() argument
2916 *data = readw(hw->io + phy + KS884X_PHY_STATUS_OFFSET); in hw_r_phy_link_stat()
2919 static inline void hw_r_phy_auto_neg(struct ksz_hw *hw, int phy, u16 *data) in hw_r_phy_auto_neg() argument
2921 *data = readw(hw->io + phy + KS884X_PHY_AUTO_NEG_OFFSET); in hw_r_phy_auto_neg()
2924 static inline void hw_w_phy_auto_neg(struct ksz_hw *hw, int phy, u16 data) in hw_w_phy_auto_neg() argument
2926 writew(data, hw->io + phy + KS884X_PHY_AUTO_NEG_OFFSET); in hw_w_phy_auto_neg()
2929 static inline void hw_r_phy_rem_cap(struct ksz_hw *hw, int phy, u16 *data) in hw_r_phy_rem_cap() argument
2931 *data = readw(hw->io + phy + KS884X_PHY_REMOTE_CAP_OFFSET); in hw_r_phy_rem_cap()
2934 static inline void hw_r_phy_crossover(struct ksz_hw *hw, int phy, u16 *data) in hw_r_phy_crossover() argument
2936 *data = readw(hw->io + phy + KS884X_PHY_CTRL_OFFSET); in hw_r_phy_crossover()
2939 static inline void hw_w_phy_crossover(struct ksz_hw *hw, int phy, u16 data) in hw_w_phy_crossover() argument
2941 writew(data, hw->io + phy + KS884X_PHY_CTRL_OFFSET); in hw_w_phy_crossover()
2944 static inline void hw_r_phy_polarity(struct ksz_hw *hw, int phy, u16 *data) in hw_r_phy_polarity() argument
2946 *data = readw(hw->io + phy + KS884X_PHY_PHY_CTRL_OFFSET); in hw_r_phy_polarity()
2949 static inline void hw_w_phy_polarity(struct ksz_hw *hw, int phy, u16 data) in hw_w_phy_polarity() argument
2951 writew(data, hw->io + phy + KS884X_PHY_PHY_CTRL_OFFSET); in hw_w_phy_polarity()
2954 static inline void hw_r_phy_link_md(struct ksz_hw *hw, int phy, u16 *data) in hw_r_phy_link_md() argument
2956 *data = readw(hw->io + phy + KS884X_PHY_LINK_MD_OFFSET); in hw_r_phy_link_md()
2959 static inline void hw_w_phy_link_md(struct ksz_hw *hw, int phy, u16 data) in hw_w_phy_link_md() argument
2961 writew(data, hw->io + phy + KS884X_PHY_LINK_MD_OFFSET); in hw_w_phy_link_md()
2973 static void hw_r_phy(struct ksz_hw *hw, int port, u16 reg, u16 *val) in hw_r_phy() argument
2978 *val = readw(hw->io + phy); in hw_r_phy()
2990 static void hw_w_phy(struct ksz_hw *hw, int port, u16 reg, u16 val) in hw_w_phy() argument
2995 writew(val, hw->io + phy); in hw_w_phy()
3014 static inline void drop_gpio(struct ksz_hw *hw, u8 gpio) in drop_gpio() argument
3018 data = readw(hw->io + KS884X_EEPROM_CTRL_OFFSET); in drop_gpio()
3020 writew(data, hw->io + KS884X_EEPROM_CTRL_OFFSET); in drop_gpio()
3023 static inline void raise_gpio(struct ksz_hw *hw, u8 gpio) in raise_gpio() argument
3027 data = readw(hw->io + KS884X_EEPROM_CTRL_OFFSET); in raise_gpio()
3029 writew(data, hw->io + KS884X_EEPROM_CTRL_OFFSET); in raise_gpio()
3032 static inline u8 state_gpio(struct ksz_hw *hw, u8 gpio) in state_gpio() argument
3036 data = readw(hw->io + KS884X_EEPROM_CTRL_OFFSET); in state_gpio()
3040 static void eeprom_clk(struct ksz_hw *hw) in eeprom_clk() argument
3042 raise_gpio(hw, EEPROM_SERIAL_CLOCK); in eeprom_clk()
3044 drop_gpio(hw, EEPROM_SERIAL_CLOCK); in eeprom_clk()
3048 static u16 spi_r(struct ksz_hw *hw) in spi_r() argument
3054 raise_gpio(hw, EEPROM_SERIAL_CLOCK); in spi_r()
3057 temp |= (state_gpio(hw, EEPROM_DATA_IN)) ? 1 << i : 0; in spi_r()
3059 drop_gpio(hw, EEPROM_SERIAL_CLOCK); in spi_r()
3065 static void spi_w(struct ksz_hw *hw, u16 data) in spi_w() argument
3070 (data & (0x01 << i)) ? raise_gpio(hw, EEPROM_DATA_OUT) : in spi_w()
3071 drop_gpio(hw, EEPROM_DATA_OUT); in spi_w()
3072 eeprom_clk(hw); in spi_w()
3076 static void spi_reg(struct ksz_hw *hw, u8 data, u8 reg) in spi_reg() argument
3081 raise_gpio(hw, EEPROM_DATA_OUT); in spi_reg()
3082 eeprom_clk(hw); in spi_reg()
3086 (data & (0x01 << i)) ? raise_gpio(hw, EEPROM_DATA_OUT) : in spi_reg()
3087 drop_gpio(hw, EEPROM_DATA_OUT); in spi_reg()
3088 eeprom_clk(hw); in spi_reg()
3093 (reg & (0x01 << i)) ? raise_gpio(hw, EEPROM_DATA_OUT) : in spi_reg()
3094 drop_gpio(hw, EEPROM_DATA_OUT); in spi_reg()
3095 eeprom_clk(hw); in spi_reg()
3119 static u16 eeprom_read(struct ksz_hw *hw, u8 reg) in eeprom_read() argument
3123 raise_gpio(hw, EEPROM_ACCESS_ENABLE | EEPROM_CHIP_SELECT); in eeprom_read()
3125 spi_reg(hw, AT93C_READ, reg); in eeprom_read()
3126 data = spi_r(hw); in eeprom_read()
3128 drop_gpio(hw, EEPROM_ACCESS_ENABLE | EEPROM_CHIP_SELECT); in eeprom_read()
3141 static void eeprom_write(struct ksz_hw *hw, u8 reg, u16 data) in eeprom_write() argument
3145 raise_gpio(hw, EEPROM_ACCESS_ENABLE | EEPROM_CHIP_SELECT); in eeprom_write()
3148 spi_reg(hw, AT93C_CODE, AT93C_WR_ON); in eeprom_write()
3149 drop_gpio(hw, EEPROM_CHIP_SELECT); in eeprom_write()
3153 raise_gpio(hw, EEPROM_CHIP_SELECT); in eeprom_write()
3154 spi_reg(hw, AT93C_ERASE, reg); in eeprom_write()
3155 drop_gpio(hw, EEPROM_CHIP_SELECT); in eeprom_write()
3159 raise_gpio(hw, EEPROM_CHIP_SELECT); in eeprom_write()
3164 } while (!state_gpio(hw, EEPROM_DATA_IN) && --timeout); in eeprom_write()
3165 drop_gpio(hw, EEPROM_CHIP_SELECT); in eeprom_write()
3169 raise_gpio(hw, EEPROM_CHIP_SELECT); in eeprom_write()
3170 spi_reg(hw, AT93C_WRITE, reg); in eeprom_write()
3171 spi_w(hw, data); in eeprom_write()
3172 drop_gpio(hw, EEPROM_CHIP_SELECT); in eeprom_write()
3176 raise_gpio(hw, EEPROM_CHIP_SELECT); in eeprom_write()
3181 } while (!state_gpio(hw, EEPROM_DATA_IN) && --timeout); in eeprom_write()
3182 drop_gpio(hw, EEPROM_CHIP_SELECT); in eeprom_write()
3186 raise_gpio(hw, EEPROM_CHIP_SELECT); in eeprom_write()
3187 spi_reg(hw, AT93C_CODE, AT93C_WR_OFF); in eeprom_write()
3189 drop_gpio(hw, EEPROM_ACCESS_ENABLE | EEPROM_CHIP_SELECT); in eeprom_write()
3212 static void set_flow_ctrl(struct ksz_hw *hw, int rx, int tx) in set_flow_ctrl() argument
3217 rx_cfg = hw->rx_cfg; in set_flow_ctrl()
3218 tx_cfg = hw->tx_cfg; in set_flow_ctrl()
3220 hw->rx_cfg |= DMA_RX_FLOW_ENABLE; in set_flow_ctrl()
3222 hw->rx_cfg &= ~DMA_RX_FLOW_ENABLE; in set_flow_ctrl()
3224 hw->tx_cfg |= DMA_TX_FLOW_ENABLE; in set_flow_ctrl()
3226 hw->tx_cfg &= ~DMA_TX_FLOW_ENABLE; in set_flow_ctrl()
3227 if (hw->enabled) { in set_flow_ctrl()
3228 if (rx_cfg != hw->rx_cfg) in set_flow_ctrl()
3229 writel(hw->rx_cfg, hw->io + KS_DMA_RX_CTRL); in set_flow_ctrl()
3230 if (tx_cfg != hw->tx_cfg) in set_flow_ctrl()
3231 writel(hw->tx_cfg, hw->io + KS_DMA_TX_CTRL); in set_flow_ctrl()
3235 static void determine_flow_ctrl(struct ksz_hw *hw, struct ksz_port *port, in determine_flow_ctrl() argument
3241 if (hw->overrides & PAUSE_FLOW_CTRL) in determine_flow_ctrl()
3259 if (!hw->ksz_switch) in determine_flow_ctrl()
3260 set_flow_ctrl(hw, rx, tx); in determine_flow_ctrl()
3263 static inline void port_cfg_change(struct ksz_hw *hw, struct ksz_port *port, in port_cfg_change() argument
3266 if ((hw->features & HALF_DUPLEX_SIGNAL_BUG) && in port_cfg_change()
3267 !(hw->overrides & PAUSE_FLOW_CTRL)) { in port_cfg_change()
3268 u32 cfg = hw->tx_cfg; in port_cfg_change()
3272 hw->tx_cfg &= ~DMA_TX_FLOW_ENABLE; in port_cfg_change()
3273 if (hw->enabled && cfg != hw->tx_cfg) in port_cfg_change()
3274 writel(hw->tx_cfg, hw->io + KS_DMA_TX_CTRL); in port_cfg_change()
3290 struct ksz_hw *hw = port->hw; in port_get_link_speed() local
3299 interrupt = hw_block_intr(hw); in port_get_link_speed()
3302 info = &hw->port_info[p]; in port_get_link_speed()
3303 port_r16(hw, p, KS884X_PORT_CTRL_4_OFFSET, &data); in port_get_link_speed()
3304 port_r16(hw, p, KS884X_PORT_STATUS_OFFSET, &status); in port_get_link_speed()
3335 hw_r_phy(hw, p, KS884X_PHY_AUTO_NEG_OFFSET, in port_get_link_speed()
3337 hw_r_phy(hw, p, KS884X_PHY_REMOTE_CAP_OFFSET, in port_get_link_speed()
3339 determine_flow_ctrl(hw, port, data, status); in port_get_link_speed()
3340 if (hw->ksz_switch) { in port_get_link_speed()
3341 port_cfg_back_pressure(hw, p, in port_get_link_speed()
3345 port_cfg_change(hw, port, info, status); in port_get_link_speed()
3353 hw->port_mib[p].link_down = 1; in port_get_link_speed()
3357 hw->port_mib[p].state = (u8) info->state; in port_get_link_speed()
3363 hw_restore_intr(hw, interrupt); in port_get_link_speed()
3377 struct ksz_hw *hw = port->hw; in port_set_link_speed() local
3385 info = &hw->port_info[p]; in port_set_link_speed()
3387 port_r16(hw, p, KS884X_PORT_CTRL_4_OFFSET, &data); in port_set_link_speed()
3388 port_r8(hw, p, KS884X_PORT_STATUS_OFFSET, &status); in port_set_link_speed()
3417 port_w16(hw, p, KS884X_PORT_CTRL_4_OFFSET, data); in port_set_link_speed()
3430 struct ksz_hw *hw = port->hw; in port_force_link_speed() local
3438 hw_r_phy_ctrl(hw, phy, &data); in port_force_link_speed()
3450 hw_w_phy_ctrl(hw, phy, data); in port_force_link_speed()
3456 struct ksz_hw *hw = port->hw; in port_set_power_saving() local
3461 port_cfg(hw, p, in port_set_power_saving()
3477 static int hw_chk_wol_pme_status(struct ksz_hw *hw) in hw_chk_wol_pme_status() argument
3479 struct dev_info *hw_priv = container_of(hw, struct dev_info, hw); in hw_chk_wol_pme_status()
3495 static void hw_clr_wol_pme_status(struct ksz_hw *hw) in hw_clr_wol_pme_status() argument
3497 struct dev_info *hw_priv = container_of(hw, struct dev_info, hw); in hw_clr_wol_pme_status()
3517 static void hw_cfg_wol_pme(struct ksz_hw *hw, int set) in hw_cfg_wol_pme() argument
3519 struct dev_info *hw_priv = container_of(hw, struct dev_info, hw); in hw_cfg_wol_pme()
3542 static void hw_cfg_wol(struct ksz_hw *hw, u16 frame, int set) in hw_cfg_wol() argument
3546 data = readw(hw->io + KS8841_WOL_CTRL_OFFSET); in hw_cfg_wol()
3551 writew(data, hw->io + KS8841_WOL_CTRL_OFFSET); in hw_cfg_wol()
3565 static void hw_set_wol_frame(struct ksz_hw *hw, int i, uint mask_size, in hw_set_wol_frame() argument
3582 writel(0, hw->io + KS8841_WOL_FRAME_BYTE0_OFFSET + i); in hw_set_wol_frame()
3583 writel(0, hw->io + KS8841_WOL_FRAME_BYTE2_OFFSET + i); in hw_set_wol_frame()
3595 writeb(val, hw->io + KS8841_WOL_FRAME_BYTE0_OFFSET + i in hw_set_wol_frame()
3608 writeb(bits, hw->io + KS8841_WOL_FRAME_BYTE0_OFFSET + i + len - in hw_set_wol_frame()
3612 writel(crc, hw->io + KS8841_WOL_FRAME_CRC_OFFSET + i); in hw_set_wol_frame()
3622 static void hw_add_wol_arp(struct ksz_hw *hw, const u8 *ip_addr) in hw_add_wol_arp() argument
3636 hw_set_wol_frame(hw, 3, 6, mask, 42, pattern); in hw_add_wol_arp()
3645 static void hw_add_wol_bcast(struct ksz_hw *hw) in hw_add_wol_bcast() argument
3650 hw_set_wol_frame(hw, 2, 1, mask, ETH_ALEN, pattern); in hw_add_wol_bcast()
3663 static void hw_add_wol_mcast(struct ksz_hw *hw) in hw_add_wol_mcast() argument
3668 memcpy(&pattern[3], &hw->override_addr[3], 3); in hw_add_wol_mcast()
3669 hw_set_wol_frame(hw, 1, 1, mask, 6, pattern); in hw_add_wol_mcast()
3681 static void hw_add_wol_ucast(struct ksz_hw *hw) in hw_add_wol_ucast() argument
3685 hw_set_wol_frame(hw, 0, 1, mask, ETH_ALEN, hw->override_addr); in hw_add_wol_ucast()
3696 static void hw_enable_wol(struct ksz_hw *hw, u32 wol_enable, const u8 *net_addr) in hw_enable_wol() argument
3698 hw_cfg_wol(hw, KS8841_WOL_MAGIC_ENABLE, (wol_enable & WAKE_MAGIC)); in hw_enable_wol()
3699 hw_cfg_wol(hw, KS8841_WOL_FRAME0_ENABLE, (wol_enable & WAKE_UCAST)); in hw_enable_wol()
3700 hw_add_wol_ucast(hw); in hw_enable_wol()
3701 hw_cfg_wol(hw, KS8841_WOL_FRAME1_ENABLE, (wol_enable & WAKE_MCAST)); in hw_enable_wol()
3702 hw_add_wol_mcast(hw); in hw_enable_wol()
3703 hw_cfg_wol(hw, KS8841_WOL_FRAME2_ENABLE, (wol_enable & WAKE_BCAST)); in hw_enable_wol()
3704 hw_cfg_wol(hw, KS8841_WOL_FRAME3_ENABLE, (wol_enable & WAKE_ARP)); in hw_enable_wol()
3705 hw_add_wol_arp(hw, net_addr); in hw_enable_wol()
3717 static int hw_init(struct ksz_hw *hw) in hw_init() argument
3724 writew(BUS_SPEED_125_MHZ, hw->io + KS884X_BUS_CTRL_OFFSET); in hw_init()
3727 data = readw(hw->io + KS884X_CHIP_ID_OFFSET); in hw_init()
3740 hw->features |= SMALL_PACKET_TX_BUG; in hw_init()
3742 hw->features |= HALF_DUPLEX_SIGNAL_BUG; in hw_init()
3753 static void hw_reset(struct ksz_hw *hw) in hw_reset() argument
3755 writew(GLOBAL_SOFTWARE_RESET, hw->io + KS884X_GLOBAL_CTRL_OFFSET); in hw_reset()
3761 writew(0, hw->io + KS884X_GLOBAL_CTRL_OFFSET); in hw_reset()
3770 static void hw_setup(struct ksz_hw *hw) in hw_setup() argument
3776 data = readw(hw->io + KS8842_SWITCH_CTRL_5_OFFSET); in hw_setup()
3779 writew(data, hw->io + KS8842_SWITCH_CTRL_5_OFFSET); in hw_setup()
3783 hw->tx_cfg = (DMA_TX_PAD_ENABLE | DMA_TX_CRC_ENABLE | in hw_setup()
3787 hw->rx_cfg = (DMA_RX_BROADCAST | DMA_RX_UNICAST | in hw_setup()
3789 hw->rx_cfg |= KS884X_DMA_RX_MULTICAST; in hw_setup()
3792 hw->rx_cfg |= (DMA_RX_CSUM_TCP | DMA_RX_CSUM_IP); in hw_setup()
3794 if (hw->all_multi) in hw_setup()
3795 hw->rx_cfg |= DMA_RX_ALL_MULTICAST; in hw_setup()
3796 if (hw->promiscuous) in hw_setup()
3797 hw->rx_cfg |= DMA_RX_PROMISCUOUS; in hw_setup()
3806 static void hw_setup_intr(struct ksz_hw *hw) in hw_setup_intr() argument
3808 hw->intr_mask = KS884X_INT_MASK | KS884X_INT_RX_OVERRUN; in hw_setup_intr()
3869 static void hw_set_desc_base(struct ksz_hw *hw, u32 tx_addr, u32 rx_addr) in hw_set_desc_base() argument
3872 writel(tx_addr, hw->io + KS_DMA_TX_ADDR); in hw_set_desc_base()
3873 writel(rx_addr, hw->io + KS_DMA_RX_ADDR); in hw_set_desc_base()
3883 static inline void hw_resume_rx(struct ksz_hw *hw) in hw_resume_rx() argument
3885 writel(DMA_START, hw->io + KS_DMA_RX_START); in hw_resume_rx()
3894 static void hw_start_rx(struct ksz_hw *hw) in hw_start_rx() argument
3896 writel(hw->rx_cfg, hw->io + KS_DMA_RX_CTRL); in hw_start_rx()
3899 hw->intr_mask |= KS884X_INT_RX_STOPPED; in hw_start_rx()
3901 writel(DMA_START, hw->io + KS_DMA_RX_START); in hw_start_rx()
3902 hw_ack_intr(hw, KS884X_INT_RX_STOPPED); in hw_start_rx()
3903 hw->rx_stop++; in hw_start_rx()
3906 if (0 == hw->rx_stop) in hw_start_rx()
3907 hw->rx_stop = 2; in hw_start_rx()
3916 static void hw_stop_rx(struct ksz_hw *hw) in hw_stop_rx() argument
3918 hw->rx_stop = 0; in hw_stop_rx()
3919 hw_turn_off_intr(hw, KS884X_INT_RX_STOPPED); in hw_stop_rx()
3920 writel((hw->rx_cfg & ~DMA_RX_ENABLE), hw->io + KS_DMA_RX_CTRL); in hw_stop_rx()
3929 static void hw_start_tx(struct ksz_hw *hw) in hw_start_tx() argument
3931 writel(hw->tx_cfg, hw->io + KS_DMA_TX_CTRL); in hw_start_tx()
3940 static void hw_stop_tx(struct ksz_hw *hw) in hw_stop_tx() argument
3942 writel((hw->tx_cfg & ~DMA_TX_ENABLE), hw->io + KS_DMA_TX_CTRL); in hw_stop_tx()
3951 static void hw_disable(struct ksz_hw *hw) in hw_disable() argument
3953 hw_stop_rx(hw); in hw_disable()
3954 hw_stop_tx(hw); in hw_disable()
3955 hw->enabled = 0; in hw_disable()
3964 static void hw_enable(struct ksz_hw *hw) in hw_enable() argument
3966 hw_start_tx(hw); in hw_enable()
3967 hw_start_rx(hw); in hw_enable()
3968 hw->enabled = 1; in hw_enable()
3981 static int hw_alloc_pkt(struct ksz_hw *hw, int length, int physical) in hw_alloc_pkt() argument
3984 if (hw->tx_desc_info.avail <= 1) in hw_alloc_pkt()
3988 get_tx_pkt(&hw->tx_desc_info, &hw->tx_desc_info.cur); in hw_alloc_pkt()
3989 hw->tx_desc_info.cur->sw.buf.tx.first_seg = 1; in hw_alloc_pkt()
3992 ++hw->tx_int_cnt; in hw_alloc_pkt()
3993 hw->tx_size += length; in hw_alloc_pkt()
3996 if (hw->tx_size >= MAX_TX_HELD_SIZE) in hw_alloc_pkt()
3997 hw->tx_int_cnt = hw->tx_int_mask + 1; in hw_alloc_pkt()
3999 if (physical > hw->tx_desc_info.avail) in hw_alloc_pkt()
4002 return hw->tx_desc_info.avail; in hw_alloc_pkt()
4011 static void hw_send_pkt(struct ksz_hw *hw) in hw_send_pkt() argument
4013 struct ksz_desc *cur = hw->tx_desc_info.cur; in hw_send_pkt()
4018 if (hw->tx_int_cnt > hw->tx_int_mask) { in hw_send_pkt()
4020 hw->tx_int_cnt = 0; in hw_send_pkt()
4021 hw->tx_size = 0; in hw_send_pkt()
4025 cur->sw.buf.tx.dest_port = hw->dst_ports; in hw_send_pkt()
4029 writel(0, hw->io + KS_DMA_TX_START); in hw_send_pkt()
4047 static void hw_set_addr(struct ksz_hw *hw) in hw_set_addr() argument
4052 writeb(hw->override_addr[MAC_ADDR_ORDER(i)], in hw_set_addr()
4053 hw->io + KS884X_ADDR_0_OFFSET + i); in hw_set_addr()
4055 sw_set_addr(hw, hw->override_addr); in hw_set_addr()
4064 static void hw_read_addr(struct ksz_hw *hw) in hw_read_addr() argument
4069 hw->perm_addr[MAC_ADDR_ORDER(i)] = readb(hw->io + in hw_read_addr()
4072 if (!hw->mac_override) { in hw_read_addr()
4073 memcpy(hw->override_addr, hw->perm_addr, ETH_ALEN); in hw_read_addr()
4074 if (empty_addr(hw->override_addr)) { in hw_read_addr()
4075 memcpy(hw->perm_addr, DEFAULT_MAC_ADDRESS, ETH_ALEN); in hw_read_addr()
4076 memcpy(hw->override_addr, DEFAULT_MAC_ADDRESS, in hw_read_addr()
4078 hw->override_addr[5] += hw->id; in hw_read_addr()
4079 hw_set_addr(hw); in hw_read_addr()
4084 static void hw_ena_add_addr(struct ksz_hw *hw, int index, u8 *mac_addr) in hw_ena_add_addr() argument
4103 writel(mac_addr_lo, hw->io + index + KS_ADD_ADDR_0_LO); in hw_ena_add_addr()
4104 writel(mac_addr_hi, hw->io + index + KS_ADD_ADDR_0_HI); in hw_ena_add_addr()
4107 static void hw_set_add_addr(struct ksz_hw *hw) in hw_set_add_addr() argument
4112 if (empty_addr(hw->address[i])) in hw_set_add_addr()
4113 writel(0, hw->io + ADD_ADDR_INCR * i + in hw_set_add_addr()
4116 hw_ena_add_addr(hw, i, hw->address[i]); in hw_set_add_addr()
4120 static int hw_add_addr(struct ksz_hw *hw, u8 *mac_addr) in hw_add_addr() argument
4125 if (ether_addr_equal(hw->override_addr, mac_addr)) in hw_add_addr()
4127 for (i = 0; i < hw->addr_list_size; i++) { in hw_add_addr()
4128 if (ether_addr_equal(hw->address[i], mac_addr)) in hw_add_addr()
4130 if (ADDITIONAL_ENTRIES == j && empty_addr(hw->address[i])) in hw_add_addr()
4134 memcpy(hw->address[j], mac_addr, ETH_ALEN); in hw_add_addr()
4135 hw_ena_add_addr(hw, j, hw->address[j]); in hw_add_addr()
4141 static int hw_del_addr(struct ksz_hw *hw, u8 *mac_addr) in hw_del_addr() argument
4145 for (i = 0; i < hw->addr_list_size; i++) { in hw_del_addr()
4146 if (ether_addr_equal(hw->address[i], mac_addr)) { in hw_del_addr()
4147 eth_zero_addr(hw->address[i]); in hw_del_addr()
4148 writel(0, hw->io + ADD_ADDR_INCR * i + in hw_del_addr()
4162 static void hw_clr_multicast(struct ksz_hw *hw) in hw_clr_multicast() argument
4167 hw->multi_bits[i] = 0; in hw_clr_multicast()
4169 writeb(0, hw->io + KS884X_MULTICAST_0_OFFSET + i); in hw_clr_multicast()
4180 static void hw_set_grp_addr(struct ksz_hw *hw) in hw_set_grp_addr() argument
4187 memset(hw->multi_bits, 0, sizeof(u8) * HW_MULTICAST_SIZE); in hw_set_grp_addr()
4189 for (i = 0; i < hw->multi_list_size; i++) { in hw_set_grp_addr()
4190 position = (ether_crc(6, hw->multi_list[i]) >> 26) & 0x3f; in hw_set_grp_addr()
4193 hw->multi_bits[index] |= (u8) value; in hw_set_grp_addr()
4197 writeb(hw->multi_bits[i], hw->io + KS884X_MULTICAST_0_OFFSET + in hw_set_grp_addr()
4208 static void hw_set_multicast(struct ksz_hw *hw, u8 multicast) in hw_set_multicast() argument
4211 hw_stop_rx(hw); in hw_set_multicast()
4214 hw->rx_cfg |= DMA_RX_ALL_MULTICAST; in hw_set_multicast()
4216 hw->rx_cfg &= ~DMA_RX_ALL_MULTICAST; in hw_set_multicast()
4218 if (hw->enabled) in hw_set_multicast()
4219 hw_start_rx(hw); in hw_set_multicast()
4229 static void hw_set_promiscuous(struct ksz_hw *hw, u8 prom) in hw_set_promiscuous() argument
4232 hw_stop_rx(hw); in hw_set_promiscuous()
4235 hw->rx_cfg |= DMA_RX_PROMISCUOUS; in hw_set_promiscuous()
4237 hw->rx_cfg &= ~DMA_RX_PROMISCUOUS; in hw_set_promiscuous()
4239 if (hw->enabled) in hw_set_promiscuous()
4240 hw_start_rx(hw); in hw_set_promiscuous()
4250 static void sw_enable(struct ksz_hw *hw, int enable) in sw_enable() argument
4255 if (hw->dev_count > 1) { in sw_enable()
4257 sw_cfg_port_base_vlan(hw, port, in sw_enable()
4259 port_set_stp_state(hw, port, STP_STATE_DISABLED); in sw_enable()
4261 sw_cfg_port_base_vlan(hw, port, PORT_MASK); in sw_enable()
4262 port_set_stp_state(hw, port, STP_STATE_FORWARDING); in sw_enable()
4265 if (hw->dev_count > 1) in sw_enable()
4266 port_set_stp_state(hw, SWITCH_PORT_NUM, STP_STATE_SIMPLE); in sw_enable()
4268 port_set_stp_state(hw, SWITCH_PORT_NUM, STP_STATE_FORWARDING); in sw_enable()
4272 writew(enable, hw->io + KS884X_CHIP_ID_OFFSET); in sw_enable()
4281 static void sw_setup(struct ksz_hw *hw) in sw_setup() argument
4285 sw_set_global_ctrl(hw); in sw_setup()
4288 sw_init_broad_storm(hw); in sw_setup()
4289 hw_cfg_broad_storm(hw, BROADCAST_STORM_PROTECTION_RATE); in sw_setup()
4291 sw_ena_broad_storm(hw, port); in sw_setup()
4293 sw_init_prio(hw); in sw_setup()
4295 sw_init_mirror(hw); in sw_setup()
4297 sw_init_prio_rate(hw); in sw_setup()
4299 sw_init_vlan(hw); in sw_setup()
4301 if (hw->features & STP_SUPPORT) in sw_setup()
4302 sw_init_stp(hw); in sw_setup()
4303 if (!sw_chk(hw, KS8842_SWITCH_CTRL_1_OFFSET, in sw_setup()
4305 hw->overrides |= PAUSE_FLOW_CTRL; in sw_setup()
4306 sw_enable(hw, 1); in sw_setup()
4394 struct ksz_hw *hw = &adapter->hw; in ksz_alloc_desc() local
4399 hw->rx_desc_info.size * hw->rx_desc_info.alloc + in ksz_alloc_desc()
4400 hw->tx_desc_info.size * hw->tx_desc_info.alloc + in ksz_alloc_desc()
4420 hw->rx_desc_info.ring_virt = (struct ksz_hw_desc *) in ksz_alloc_desc()
4422 hw->rx_desc_info.ring_phys = adapter->desc_pool.phys; in ksz_alloc_desc()
4423 offset = hw->rx_desc_info.alloc * hw->rx_desc_info.size; in ksz_alloc_desc()
4424 hw->tx_desc_info.ring_virt = (struct ksz_hw_desc *) in ksz_alloc_desc()
4426 hw->tx_desc_info.ring_phys = adapter->desc_pool.phys + offset; in ksz_alloc_desc()
4428 if (ksz_alloc_soft_desc(&hw->rx_desc_info, 0)) in ksz_alloc_desc()
4430 if (ksz_alloc_soft_desc(&hw->tx_desc_info, 1)) in ksz_alloc_desc()
4462 struct ksz_hw *hw = &adapter->hw; in ksz_init_rx_buffers() local
4463 struct ksz_desc_info *info = &hw->rx_desc_info; in ksz_init_rx_buffers()
4465 for (i = 0; i < hw->rx_desc_info.alloc; i++) { in ksz_init_rx_buffers()
4499 struct ksz_hw *hw = &adapter->hw; in ksz_alloc_mem() local
4502 hw->rx_desc_info.alloc = NUM_OF_RX_DESC; in ksz_alloc_mem()
4503 hw->tx_desc_info.alloc = NUM_OF_TX_DESC; in ksz_alloc_mem()
4506 hw->tx_int_cnt = 0; in ksz_alloc_mem()
4507 hw->tx_int_mask = NUM_OF_TX_DESC / 4; in ksz_alloc_mem()
4508 if (hw->tx_int_mask > 8) in ksz_alloc_mem()
4509 hw->tx_int_mask = 8; in ksz_alloc_mem()
4510 while (hw->tx_int_mask) { in ksz_alloc_mem()
4511 hw->tx_int_cnt++; in ksz_alloc_mem()
4512 hw->tx_int_mask >>= 1; in ksz_alloc_mem()
4514 if (hw->tx_int_cnt) { in ksz_alloc_mem()
4515 hw->tx_int_mask = (1 << (hw->tx_int_cnt - 1)) - 1; in ksz_alloc_mem()
4516 hw->tx_int_cnt = 0; in ksz_alloc_mem()
4520 hw->rx_desc_info.size = in ksz_alloc_mem()
4523 hw->tx_desc_info.size = in ksz_alloc_mem()
4526 if (hw->rx_desc_info.size != sizeof(struct ksz_hw_desc)) in ksz_alloc_mem()
4528 ksz_check_desc_num(&hw->rx_desc_info); in ksz_alloc_mem()
4529 ksz_check_desc_num(&hw->tx_desc_info); in ksz_alloc_mem()
4547 struct ksz_hw *hw = &adapter->hw; in ksz_free_desc() local
4550 hw->rx_desc_info.ring_virt = NULL; in ksz_free_desc()
4551 hw->tx_desc_info.ring_virt = NULL; in ksz_free_desc()
4552 hw->rx_desc_info.ring_phys = 0; in ksz_free_desc()
4553 hw->tx_desc_info.ring_phys = 0; in ksz_free_desc()
4567 kfree(hw->rx_desc_info.ring); in ksz_free_desc()
4568 hw->rx_desc_info.ring = NULL; in ksz_free_desc()
4569 kfree(hw->tx_desc_info.ring); in ksz_free_desc()
4570 hw->tx_desc_info.ring = NULL; in ksz_free_desc()
4604 ksz_free_buffers(adapter, &adapter->hw.tx_desc_info, in ksz_free_mem()
4608 ksz_free_buffers(adapter, &adapter->hw.rx_desc_info, in ksz_free_mem()
4615 static void get_mib_counters(struct ksz_hw *hw, int first, int cnt, in get_mib_counters() argument
4625 port_mib = &hw->port_mib[port]; in get_mib_counters()
4626 for (mib = port_mib->mib_start; mib < hw->mib_cnt; mib++) in get_mib_counters()
4644 struct ksz_hw *hw = &hw_priv->hw; in send_packet() local
4645 struct ksz_desc_info *info = &hw->tx_desc_info; in send_packet()
4654 if (hw->dev_count > 1) in send_packet()
4655 hw->dst_ports = 1 << priv->port.first_port; in send_packet()
4685 ++hw->tx_int_cnt; in send_packet()
4732 hw_send_pkt(hw); in send_packet()
4749 struct ksz_hw *hw = &hw_priv->hw; in transmit_cleanup() local
4750 struct ksz_desc_info *info = &hw->tx_desc_info; in transmit_cleanup()
4805 struct ksz_hw *hw = &hw_priv->hw; in tx_done() local
4810 for (port = 0; port < hw->dev_count; port++) { in tx_done()
4811 struct net_device *dev = hw->port_info[port].pdev; in tx_done()
4842 struct ksz_hw *hw = &hw_priv->hw; in netdev_tx() local
4847 if (hw->features & SMALL_PACKET_TX_BUG) { in netdev_tx()
4870 left = hw_alloc_pkt(hw, skb->len, num); in netdev_tx()
4916 struct ksz_hw *hw = &hw_priv->hw; in netdev_tx_timeout() local
4919 if (hw->dev_count > 1) { in netdev_tx_timeout()
4930 hw_dis_intr(hw); in netdev_tx_timeout()
4931 hw_disable(hw); in netdev_tx_timeout()
4934 hw_reset_pkts(&hw->rx_desc_info); in netdev_tx_timeout()
4935 hw_reset_pkts(&hw->tx_desc_info); in netdev_tx_timeout()
4938 hw_reset(hw); in netdev_tx_timeout()
4940 hw_set_desc_base(hw, in netdev_tx_timeout()
4941 hw->tx_desc_info.ring_phys, in netdev_tx_timeout()
4942 hw->rx_desc_info.ring_phys); in netdev_tx_timeout()
4943 hw_set_addr(hw); in netdev_tx_timeout()
4944 if (hw->all_multi) in netdev_tx_timeout()
4945 hw_set_multicast(hw, hw->all_multi); in netdev_tx_timeout()
4946 else if (hw->multi_list_size) in netdev_tx_timeout()
4947 hw_set_grp_addr(hw); in netdev_tx_timeout()
4949 if (hw->dev_count > 1) { in netdev_tx_timeout()
4950 hw_set_add_addr(hw); in netdev_tx_timeout()
4954 port_set_stp_state(hw, port, in netdev_tx_timeout()
4957 port_dev = hw->port_info[port].pdev; in netdev_tx_timeout()
4959 port_set_stp_state(hw, port, in netdev_tx_timeout()
4964 hw_enable(hw); in netdev_tx_timeout()
4965 hw_ena_intr(hw); in netdev_tx_timeout()
4991 static inline int rx_proc(struct net_device *dev, struct ksz_hw* hw, in rx_proc() argument
5029 if (hw->rx_cfg & (DMA_RX_CSUM_UDP | DMA_RX_CSUM_TCP)) in rx_proc()
5046 struct ksz_hw *hw = &hw_priv->hw; in dev_rcv_packets() local
5047 struct net_device *dev = hw->port_info[0].pdev; in dev_rcv_packets()
5048 struct ksz_desc_info *info = &hw->rx_desc_info; in dev_rcv_packets()
5063 if (rx_proc(dev, hw, desc, status)) in dev_rcv_packets()
5082 struct ksz_hw *hw = &hw_priv->hw; in port_rcv_packets() local
5083 struct net_device *dev = hw->port_info[0].pdev; in port_rcv_packets()
5084 struct ksz_desc_info *info = &hw->rx_desc_info; in port_rcv_packets()
5097 if (hw->dev_count > 1) { in port_rcv_packets()
5101 dev = hw->port_info[p].pdev; in port_rcv_packets()
5108 if (rx_proc(dev, hw, desc, status)) in port_rcv_packets()
5127 struct ksz_hw *hw = &hw_priv->hw; in dev_rcv_special() local
5128 struct net_device *dev = hw->port_info[0].pdev; in dev_rcv_special()
5129 struct ksz_desc_info *info = &hw->rx_desc_info; in dev_rcv_special()
5142 if (hw->dev_count > 1) { in dev_rcv_special()
5146 dev = hw->port_info[p].pdev; in dev_rcv_special()
5161 if (rx_proc(dev, hw, desc, status)) in dev_rcv_special()
5185 struct ksz_hw *hw = &hw_priv->hw; in rx_proc_task() local
5187 if (!hw->enabled) in rx_proc_task()
5192 hw_resume_rx(hw); in rx_proc_task()
5196 hw_turn_on_intr(hw, KS884X_INT_RX_MASK); in rx_proc_task()
5199 hw_ack_intr(hw, KS884X_INT_RX); in rx_proc_task()
5207 struct ksz_hw *hw = &hw_priv->hw; in tx_proc_task() local
5209 hw_ack_intr(hw, KS884X_INT_TX_MASK); in tx_proc_task()
5215 hw_turn_on_intr(hw, KS884X_INT_TX); in tx_proc_task()
5219 static inline void handle_rx_stop(struct ksz_hw *hw) in handle_rx_stop() argument
5222 if (0 == hw->rx_stop) in handle_rx_stop()
5223 hw->intr_mask &= ~KS884X_INT_RX_STOPPED; in handle_rx_stop()
5224 else if (hw->rx_stop > 1) { in handle_rx_stop()
5225 if (hw->enabled && (hw->rx_cfg & DMA_RX_ENABLE)) { in handle_rx_stop()
5226 hw_start_rx(hw); in handle_rx_stop()
5228 hw->intr_mask &= ~KS884X_INT_RX_STOPPED; in handle_rx_stop()
5229 hw->rx_stop = 0; in handle_rx_stop()
5233 hw->rx_stop++; in handle_rx_stop()
5251 struct ksz_hw *hw = &hw_priv->hw; in netdev_intr() local
5255 hw_read_intr(hw, &int_enable); in netdev_intr()
5264 hw_ack_intr(hw, int_enable); in netdev_intr()
5265 int_enable &= hw->intr_mask; in netdev_intr()
5268 hw_dis_intr_bit(hw, KS884X_INT_TX_MASK); in netdev_intr()
5273 hw_dis_intr_bit(hw, KS884X_INT_RX); in netdev_intr()
5279 hw_resume_rx(hw); in netdev_intr()
5285 hw->features |= LINK_INT_WORKING; in netdev_intr()
5290 handle_rx_stop(hw); in netdev_intr()
5297 hw->intr_mask &= ~KS884X_INT_TX_STOPPED; in netdev_intr()
5299 data = readl(hw->io + KS_DMA_TX_CTRL); in netdev_intr()
5306 hw_ena_intr(hw); in netdev_intr()
5325 hw_dis_intr(&hw_priv->hw); in netdev_netpoll()
5330 static void bridge_change(struct ksz_hw *hw) in bridge_change() argument
5334 struct ksz_switch *sw = hw->ksz_switch; in bridge_change()
5338 port_set_stp_state(hw, SWITCH_PORT_NUM, STP_STATE_SIMPLE); in bridge_change()
5339 sw_block_addr(hw); in bridge_change()
5347 sw_cfg_port_base_vlan(hw, port, member); in bridge_change()
5365 struct ksz_hw *hw = &hw_priv->hw; in netdev_close() local
5373 if (hw->dev_count > 1) { in netdev_close()
5374 port_set_stp_state(hw, port->first_port, STP_STATE_DISABLED); in netdev_close()
5377 if (hw->features & STP_SUPPORT) { in netdev_close()
5379 if (hw->ksz_switch->member & pi) { in netdev_close()
5380 hw->ksz_switch->member &= ~pi; in netdev_close()
5381 bridge_change(hw); in netdev_close()
5386 hw_del_addr(hw, dev->dev_addr); in netdev_close()
5391 --hw->all_multi; in netdev_close()
5393 --hw->promiscuous; in netdev_close()
5400 hw_dis_intr(hw); in netdev_close()
5401 hw_disable(hw); in netdev_close()
5402 hw_clr_multicast(hw); in netdev_close()
5412 hw_reset_pkts(&hw->rx_desc_info); in netdev_close()
5413 hw_reset_pkts(&hw->tx_desc_info); in netdev_close()
5416 if (hw->features & STP_SUPPORT) in netdev_close()
5417 sw_clr_sta_mac_table(hw); in netdev_close()
5423 static void hw_cfg_huge_frame(struct dev_info *hw_priv, struct ksz_hw *hw) in hw_cfg_huge_frame() argument
5425 if (hw->ksz_switch) { in hw_cfg_huge_frame()
5428 data = readw(hw->io + KS8842_SWITCH_CTRL_2_OFFSET); in hw_cfg_huge_frame()
5429 if (hw->features & RX_HUGE_FRAME) in hw_cfg_huge_frame()
5433 writew(data, hw->io + KS8842_SWITCH_CTRL_2_OFFSET); in hw_cfg_huge_frame()
5435 if (hw->features & RX_HUGE_FRAME) { in hw_cfg_huge_frame()
5436 hw->rx_cfg |= DMA_RX_ERROR; in hw_cfg_huge_frame()
5439 hw->rx_cfg &= ~DMA_RX_ERROR; in hw_cfg_huge_frame()
5440 if (hw->dev_count > 1) in hw_cfg_huge_frame()
5451 struct ksz_hw *hw = &hw_priv->hw; in prepare_hardware() local
5464 hw->promiscuous = 0; in prepare_hardware()
5465 hw->all_multi = 0; in prepare_hardware()
5466 hw->multi_list_size = 0; in prepare_hardware()
5468 hw_reset(hw); in prepare_hardware()
5470 hw_set_desc_base(hw, in prepare_hardware()
5471 hw->tx_desc_info.ring_phys, hw->rx_desc_info.ring_phys); in prepare_hardware()
5472 hw_set_addr(hw); in prepare_hardware()
5473 hw_cfg_huge_frame(hw_priv, hw); in prepare_hardware()
5503 struct ksz_hw *hw = &hw_priv->hw; in netdev_open() local
5521 for (i = 0; i < hw->mib_port_cnt; i++) { in netdev_open()
5527 hw->port_mib[i].state = media_disconnected; in netdev_open()
5528 port_init_cnt(hw, i); in netdev_open()
5530 if (hw->ksz_switch) in netdev_open()
5531 hw->port_mib[HOST_PORT].state = media_connected; in netdev_open()
5533 hw_add_wol_bcast(hw); in netdev_open()
5534 hw_cfg_wol_pme(hw, 0); in netdev_open()
5535 hw_clr_wol_pme_status(&hw_priv->hw); in netdev_open()
5545 hw->port_info[p].partner = 0xFF; in netdev_open()
5546 hw->port_info[p].state = media_disconnected; in netdev_open()
5550 if (hw->dev_count > 1) { in netdev_open()
5551 port_set_stp_state(hw, port->first_port, STP_STATE_SIMPLE); in netdev_open()
5553 hw_add_addr(hw, dev->dev_addr); in netdev_open()
5563 hw_setup_intr(hw); in netdev_open()
5564 hw_enable(hw); in netdev_open()
5565 hw_ena_intr(hw); in netdev_open()
5567 if (hw->mib_port_cnt) in netdev_open()
5608 struct ksz_hw *hw = &priv->adapter->hw; in netdev_query_statistics() local
5625 mib = &hw->port_mib[p]; in netdev_query_statistics()
5664 struct ksz_hw *hw = &hw_priv->hw; in netdev_set_mac_address() local
5669 hw_del_addr(hw, dev->dev_addr); in netdev_set_mac_address()
5671 hw->mac_override = 1; in netdev_set_mac_address()
5672 memcpy(hw->override_addr, mac->sa_data, ETH_ALEN); in netdev_set_mac_address()
5677 interrupt = hw_block_intr(hw); in netdev_set_mac_address()
5680 hw_add_addr(hw, dev->dev_addr); in netdev_set_mac_address()
5682 hw_set_addr(hw); in netdev_set_mac_address()
5683 hw_restore_intr(hw, interrupt); in netdev_set_mac_address()
5689 struct ksz_hw *hw, int promiscuous) in dev_set_promiscuous() argument
5692 u8 prev_state = hw->promiscuous; in dev_set_promiscuous()
5695 ++hw->promiscuous; in dev_set_promiscuous()
5697 --hw->promiscuous; in dev_set_promiscuous()
5701 if (hw->promiscuous <= 1 && prev_state <= 1) in dev_set_promiscuous()
5702 hw_set_promiscuous(hw, hw->promiscuous); in dev_set_promiscuous()
5708 if ((hw->features & STP_SUPPORT) && !promiscuous && in dev_set_promiscuous()
5710 struct ksz_switch *sw = hw->ksz_switch; in dev_set_promiscuous()
5713 port_set_stp_state(hw, port, STP_STATE_DISABLED); in dev_set_promiscuous()
5717 bridge_change(hw); in dev_set_promiscuous()
5723 static void dev_set_multicast(struct dev_priv *priv, struct ksz_hw *hw, in dev_set_multicast() argument
5727 u8 all_multi = hw->all_multi; in dev_set_multicast()
5730 ++hw->all_multi; in dev_set_multicast()
5732 --hw->all_multi; in dev_set_multicast()
5736 if (hw->all_multi <= 1 && all_multi <= 1) in dev_set_multicast()
5737 hw_set_multicast(hw, hw->all_multi); in dev_set_multicast()
5752 struct ksz_hw *hw = &hw_priv->hw; in netdev_set_rx_mode() local
5756 dev_set_promiscuous(dev, priv, hw, (dev->flags & IFF_PROMISC)); in netdev_set_rx_mode()
5758 if (hw_priv->hw.dev_count > 1) in netdev_set_rx_mode()
5760 dev_set_multicast(priv, hw, multicast); in netdev_set_rx_mode()
5763 if (hw_priv->hw.dev_count > 1) in netdev_set_rx_mode()
5771 if (MAX_MULTICAST_LIST != hw->multi_list_size) { in netdev_set_rx_mode()
5772 hw->multi_list_size = MAX_MULTICAST_LIST; in netdev_set_rx_mode()
5773 ++hw->all_multi; in netdev_set_rx_mode()
5774 hw_set_multicast(hw, hw->all_multi); in netdev_set_rx_mode()
5782 memcpy(hw->multi_list[i++], ha->addr, ETH_ALEN); in netdev_set_rx_mode()
5784 hw->multi_list_size = (u8) i; in netdev_set_rx_mode()
5785 hw_set_grp_addr(hw); in netdev_set_rx_mode()
5787 if (MAX_MULTICAST_LIST == hw->multi_list_size) { in netdev_set_rx_mode()
5788 --hw->all_multi; in netdev_set_rx_mode()
5789 hw_set_multicast(hw, hw->all_multi); in netdev_set_rx_mode()
5791 hw->multi_list_size = 0; in netdev_set_rx_mode()
5792 hw_clr_multicast(hw); in netdev_set_rx_mode()
5800 struct ksz_hw *hw = &hw_priv->hw; in netdev_change_mtu() local
5807 if (hw->dev_count > 1) in netdev_change_mtu()
5818 hw->features |= RX_HUGE_FRAME; in netdev_change_mtu()
5821 hw->features &= ~RX_HUGE_FRAME; in netdev_change_mtu()
5845 struct ksz_hw *hw = &hw_priv->hw; in netdev_ioctl() local
5865 hw_r_phy(hw, port->linked->port_id, data->reg_num, in netdev_ioctl()
5876 hw_w_phy(hw, port->linked->port_id, data->reg_num, in netdev_ioctl()
5907 struct ksz_hw *hw = port->hw; in mdio_read() local
5910 hw_r_phy(hw, port->linked->port_id, reg_num << 1, &val_out); in mdio_read()
5927 struct ksz_hw *hw = port->hw; in mdio_write() local
5932 hw_w_phy(hw, pi, reg_num << 1, val); in mdio_write()
6138 struct ksz_hw *hw = &hw_priv->hw; in netdev_get_regs() local
6151 *buf = readl(hw->io + len); in netdev_get_regs()
6208 hw_enable_wol(&hw_priv->hw, hw_priv->wol_enable, net_addr); in netdev_set_wol()
6277 eeprom_data[i] = eeprom_read(&hw_priv->hw, i); in netdev_get_eeprom()
6309 eeprom_data[i] = eeprom_read(&hw_priv->hw, i); in netdev_set_eeprom()
6315 eeprom_write(&hw_priv->hw, i, eeprom_data[i]); in netdev_set_eeprom()
6333 struct ksz_hw *hw = &hw_priv->hw; in netdev_get_pauseparam() local
6335 pause->autoneg = (hw->overrides & PAUSE_FLOW_CTRL) ? 0 : 1; in netdev_get_pauseparam()
6336 if (!hw->ksz_switch) { in netdev_get_pauseparam()
6338 (hw->rx_cfg & DMA_RX_FLOW_ENABLE) ? 1 : 0; in netdev_get_pauseparam()
6340 (hw->tx_cfg & DMA_TX_FLOW_ENABLE) ? 1 : 0; in netdev_get_pauseparam()
6343 (sw_chk(hw, KS8842_SWITCH_CTRL_1_OFFSET, in netdev_get_pauseparam()
6346 (sw_chk(hw, KS8842_SWITCH_CTRL_1_OFFSET, in netdev_get_pauseparam()
6366 struct ksz_hw *hw = &hw_priv->hw; in netdev_set_pauseparam() local
6375 hw->overrides &= ~PAUSE_FLOW_CTRL; in netdev_set_pauseparam()
6377 if (hw->ksz_switch) { in netdev_set_pauseparam()
6378 sw_cfg(hw, KS8842_SWITCH_CTRL_1_OFFSET, in netdev_set_pauseparam()
6380 sw_cfg(hw, KS8842_SWITCH_CTRL_1_OFFSET, in netdev_set_pauseparam()
6385 hw->overrides |= PAUSE_FLOW_CTRL; in netdev_set_pauseparam()
6386 if (hw->ksz_switch) { in netdev_set_pauseparam()
6387 sw_cfg(hw, KS8842_SWITCH_CTRL_1_OFFSET, in netdev_set_pauseparam()
6389 sw_cfg(hw, KS8842_SWITCH_CTRL_1_OFFSET, in netdev_set_pauseparam()
6392 set_flow_ctrl(hw, pause->rx_pause, pause->tx_pause); in netdev_set_pauseparam()
6411 struct ksz_hw *hw = &hw_priv->hw; in netdev_get_ringparam() local
6414 ring->tx_pending = hw->tx_desc_info.alloc; in netdev_get_ringparam()
6416 ring->rx_pending = hw->rx_desc_info.alloc; in netdev_get_ringparam()
6474 struct ksz_hw *hw = &hw_priv->hw; in netdev_get_strings() local
6478 ETH_GSTRING_LEN * hw->mib_cnt); in netdev_get_strings()
6494 struct ksz_hw *hw = &hw_priv->hw; in netdev_get_sset_count() local
6498 return hw->mib_cnt; in netdev_get_sset_count()
6517 struct ksz_hw *hw = &hw_priv->hw; in netdev_get_ethtool_stats() local
6529 if (media_connected == hw->port_mib[p].state) { in netdev_get_ethtool_stats()
6555 } else if (hw->port_mib[p].cnt_ptr) { in netdev_get_ethtool_stats()
6563 get_mib_counters(hw, port->first_port, port->mib_port_cnt, counter); in netdev_get_ethtool_stats()
6564 n = hw->mib_cnt; in netdev_get_ethtool_stats()
6586 struct ksz_hw *hw = &hw_priv->hw; in netdev_set_features() local
6592 hw->rx_cfg |= DMA_RX_CSUM_TCP | DMA_RX_CSUM_IP; in netdev_set_features()
6594 hw->rx_cfg &= ~(DMA_RX_CSUM_TCP | DMA_RX_CSUM_IP); in netdev_set_features()
6596 if (hw->enabled) in netdev_set_features()
6597 writel(hw->rx_cfg, hw->io + KS_DMA_RX_CTRL); in netdev_set_features()
6645 struct ksz_hw *hw = &hw_priv->hw; in mib_read_work() local
6650 for (i = 0; i < hw->mib_port_cnt; i++) { in mib_read_work()
6651 mib = &hw->port_mib[i]; in mib_read_work()
6657 if (port_r_cnt(hw, i)) in mib_read_work()
6671 next_jiffies += HZ * 1 * hw->mib_port_cnt; in mib_read_work()
6693 hw_clr_wol_pme_status(&hw_priv->hw); in mib_monitor()
6696 } else if (hw_chk_wol_pme_status(&hw_priv->hw)) { in mib_monitor()
6716 struct ksz_hw *hw = &hw_priv->hw; in dev_monitor() local
6719 if (!(hw->features & LINK_INT_WORKING)) in dev_monitor()
6873 hw_priv->hw.override_addr[j++] = (u8) num; in get_mac_addr()
6874 hw_priv->hw.override_addr[5] += in get_mac_addr()
6875 hw_priv->hw.id; in get_mac_addr()
6877 hw_priv->hw.ksz_switch->other_addr[j++] = in get_mac_addr()
6879 hw_priv->hw.ksz_switch->other_addr[5] += in get_mac_addr()
6880 hw_priv->hw.id; in get_mac_addr()
6888 hw_priv->hw.mac_override = 1; in get_mac_addr()
6894 static void read_other_addr(struct ksz_hw *hw) in read_other_addr() argument
6898 struct ksz_switch *sw = hw->ksz_switch; in read_other_addr()
6901 data[i] = eeprom_read(hw, i + EEPROM_DATA_OTHER_MAC_ADDR); in read_other_addr()
6921 struct ksz_hw *hw; in pcidev_init() local
6963 hw = &hw_priv->hw; in pcidev_init()
6965 hw->io = ioremap(reg_base, reg_len); in pcidev_init()
6966 if (!hw->io) in pcidev_init()
6969 cnt = hw_init(hw); in pcidev_init()
6980 dev_dbg(&hw_priv->pdev->dev, "Mem = %p; IRQ = %d\n", hw->io, pdev->irq); in pcidev_init()
6983 hw->dev_count = 1; in pcidev_init()
6986 hw->addr_list_size = 0; in pcidev_init()
6987 hw->mib_cnt = PORT_COUNTER_NUM; in pcidev_init()
6988 hw->mib_port_cnt = 1; in pcidev_init()
6993 hw->overrides |= FAST_AGING; in pcidev_init()
6995 hw->mib_cnt = TOTAL_PORT_COUNTER_NUM; in pcidev_init()
6999 hw->dev_count = SWITCH_PORT_NUM; in pcidev_init()
7000 hw->addr_list_size = SWITCH_PORT_NUM - 1; in pcidev_init()
7004 if (1 == hw->dev_count) { in pcidev_init()
7008 hw->mib_port_cnt = TOTAL_PORT_NUM; in pcidev_init()
7009 hw->ksz_switch = kzalloc(sizeof(struct ksz_switch), GFP_KERNEL); in pcidev_init()
7010 if (!hw->ksz_switch) in pcidev_init()
7013 sw = hw->ksz_switch; in pcidev_init()
7015 for (i = 0; i < hw->mib_port_cnt; i++) in pcidev_init()
7016 hw->port_mib[i].mib_start = 0; in pcidev_init()
7018 hw->parent = hw_priv; in pcidev_init()
7026 hw_priv->hw.id = net_device_present; in pcidev_init()
7038 hw_read_addr(hw); in pcidev_init()
7041 if (hw->dev_count > 1) { in pcidev_init()
7042 memcpy(sw->other_addr, hw->override_addr, ETH_ALEN); in pcidev_init()
7043 read_other_addr(hw); in pcidev_init()
7048 hw_setup(hw); in pcidev_init()
7049 if (hw->ksz_switch) in pcidev_init()
7050 sw_setup(hw); in pcidev_init()
7062 for (i = 0; i < hw->dev_count; i++) { in pcidev_init()
7079 port->hw = hw; in pcidev_init()
7080 port->linked = &hw->port_info[port->first_port]; in pcidev_init()
7083 hw->port_info[pi].port_id = pi; in pcidev_init()
7084 hw->port_info[pi].pdev = dev; in pcidev_init()
7085 hw->port_info[pi].state = media_disconnected; in pcidev_init()
7088 dev->mem_start = (unsigned long) hw->io; in pcidev_init()
7092 memcpy(dev->dev_addr, hw_priv->hw.override_addr, in pcidev_init()
7096 if (ether_addr_equal(sw->other_addr, hw->override_addr)) in pcidev_init()
7112 for (i = 0; i < hw->dev_count; i++) { in pcidev_init()
7121 kfree(hw->ksz_switch); in pcidev_init()
7124 iounmap(hw->io); in pcidev_init()
7143 for (i = 0; i < hw_priv->hw.dev_count; i++) { in pcidev_exit()
7147 if (hw_priv->hw.io) in pcidev_exit()
7148 iounmap(hw_priv->hw.io); in pcidev_exit()
7150 kfree(hw_priv->hw.ksz_switch); in pcidev_exit()
7161 struct ksz_hw *hw = &hw_priv->hw; in pcidev_resume() local
7168 hw_cfg_wol_pme(hw, 0); in pcidev_resume()
7169 for (i = 0; i < hw->dev_count; i++) { in pcidev_resume()
7187 struct ksz_hw *hw = &hw_priv->hw; in pcidev_suspend() local
7192 for (i = 0; i < hw->dev_count; i++) { in pcidev_suspend()
7203 hw_enable_wol(hw, hw_priv->wol_enable, net_addr); in pcidev_suspend()
7204 hw_cfg_wol_pme(hw, 1); in pcidev_suspend()