Lines Matching refs:MLX4_PUT
70 #define MLX4_PUT(dest, source, offset) \ macro
184 MLX4_PUT(inbox, cfg->log_pg_sz, MOD_STAT_CFG_PG_SZ_OFFSET); in mlx4_MOD_STAT_CFG()
185 MLX4_PUT(inbox, cfg->log_pg_sz_m, MOD_STAT_CFG_PG_SZ_M_OFFSET); in mlx4_MOD_STAT_CFG()
328 MLX4_PUT(outbox->buf, field, QUERY_FUNC_CAP_PHYS_PORT_OFFSET); in mlx4_QUERY_FUNC_CAP_wrapper()
339 MLX4_PUT(outbox->buf, qkey, in mlx4_QUERY_FUNC_CAP_wrapper()
342 MLX4_PUT(outbox->buf, field, QUERY_FUNC_CAP_FLAGS1_OFFSET); in mlx4_QUERY_FUNC_CAP_wrapper()
346 MLX4_PUT(outbox->buf, size, QUERY_FUNC_CAP_QP0_TUNNEL); in mlx4_QUERY_FUNC_CAP_wrapper()
349 MLX4_PUT(outbox->buf, size, QUERY_FUNC_CAP_QP1_TUNNEL); in mlx4_QUERY_FUNC_CAP_wrapper()
351 MLX4_PUT(outbox->buf, proxy_qp, QUERY_FUNC_CAP_QP0_PROXY); in mlx4_QUERY_FUNC_CAP_wrapper()
353 MLX4_PUT(outbox->buf, proxy_qp, QUERY_FUNC_CAP_QP1_PROXY); in mlx4_QUERY_FUNC_CAP_wrapper()
355 MLX4_PUT(outbox->buf, dev->caps.phys_port_id[vhcr->in_modifier], in mlx4_QUERY_FUNC_CAP_wrapper()
360 MLX4_PUT(outbox->buf, field, in mlx4_QUERY_FUNC_CAP_wrapper()
373 MLX4_PUT(outbox->buf, field, QUERY_FUNC_CAP_FLAGS_OFFSET); in mlx4_QUERY_FUNC_CAP_wrapper()
378 MLX4_PUT(outbox->buf, field, QUERY_FUNC_CAP_NUM_PORTS_OFFSET); in mlx4_QUERY_FUNC_CAP_wrapper()
381 MLX4_PUT(outbox->buf, size, QUERY_FUNC_CAP_PF_BHVR_OFFSET); in mlx4_QUERY_FUNC_CAP_wrapper()
384 MLX4_PUT(outbox->buf, field, QUERY_FUNC_CAP_FMR_OFFSET); in mlx4_QUERY_FUNC_CAP_wrapper()
387 MLX4_PUT(outbox->buf, size, QUERY_FUNC_CAP_QP_QUOTA_OFFSET); in mlx4_QUERY_FUNC_CAP_wrapper()
389 MLX4_PUT(outbox->buf, size, QUERY_FUNC_CAP_QP_QUOTA_OFFSET_DEP); in mlx4_QUERY_FUNC_CAP_wrapper()
392 MLX4_PUT(outbox->buf, size, QUERY_FUNC_CAP_SRQ_QUOTA_OFFSET); in mlx4_QUERY_FUNC_CAP_wrapper()
394 MLX4_PUT(outbox->buf, size, QUERY_FUNC_CAP_SRQ_QUOTA_OFFSET_DEP); in mlx4_QUERY_FUNC_CAP_wrapper()
397 MLX4_PUT(outbox->buf, size, QUERY_FUNC_CAP_CQ_QUOTA_OFFSET); in mlx4_QUERY_FUNC_CAP_wrapper()
399 MLX4_PUT(outbox->buf, size, QUERY_FUNC_CAP_CQ_QUOTA_OFFSET_DEP); in mlx4_QUERY_FUNC_CAP_wrapper()
407 MLX4_PUT(outbox->buf, size, QUERY_FUNC_CAP_MAX_EQ_OFFSET); in mlx4_QUERY_FUNC_CAP_wrapper()
409 MLX4_PUT(outbox->buf, size, QUERY_FUNC_CAP_RESERVED_EQ_OFFSET); in mlx4_QUERY_FUNC_CAP_wrapper()
415 MLX4_PUT(outbox->buf, size, QUERY_FUNC_CAP_MAX_EQ_OFFSET); in mlx4_QUERY_FUNC_CAP_wrapper()
417 MLX4_PUT(outbox->buf, size, QUERY_FUNC_CAP_RESERVED_EQ_OFFSET); in mlx4_QUERY_FUNC_CAP_wrapper()
421 MLX4_PUT(outbox->buf, size, QUERY_FUNC_CAP_MPT_QUOTA_OFFSET); in mlx4_QUERY_FUNC_CAP_wrapper()
423 MLX4_PUT(outbox->buf, size, QUERY_FUNC_CAP_MPT_QUOTA_OFFSET_DEP); in mlx4_QUERY_FUNC_CAP_wrapper()
426 MLX4_PUT(outbox->buf, size, QUERY_FUNC_CAP_MTT_QUOTA_OFFSET); in mlx4_QUERY_FUNC_CAP_wrapper()
428 MLX4_PUT(outbox->buf, size, QUERY_FUNC_CAP_MTT_QUOTA_OFFSET_DEP); in mlx4_QUERY_FUNC_CAP_wrapper()
431 MLX4_PUT(outbox->buf, size, QUERY_FUNC_CAP_MCG_QUOTA_OFFSET); in mlx4_QUERY_FUNC_CAP_wrapper()
432 MLX4_PUT(outbox->buf, size, QUERY_FUNC_CAP_MCG_QUOTA_OFFSET_DEP); in mlx4_QUERY_FUNC_CAP_wrapper()
436 MLX4_PUT(outbox->buf, size, QUERY_FUNC_CAP_EXTRA_FLAGS_OFFSET); in mlx4_QUERY_FUNC_CAP_wrapper()
439 MLX4_PUT(outbox->buf, size, QUERY_FUNC_CAP_QP_RESD_LKEY_OFFSET); in mlx4_QUERY_FUNC_CAP_wrapper()
1185 MLX4_PUT(outbox->buf, flags, QUERY_DEV_CAP_EXT_FLAGS_OFFSET); in mlx4_QUERY_DEV_CAP_wrapper()
1190 MLX4_PUT(outbox->buf, field, QUERY_DEV_CAP_VL_PORT_OFFSET); in mlx4_QUERY_DEV_CAP_wrapper()
1195 MLX4_PUT(outbox->buf, field, QUERY_DEV_CAP_CQ_TS_SUPPORT_OFFSET); in mlx4_QUERY_DEV_CAP_wrapper()
1200 MLX4_PUT(outbox->buf, field, QUERY_DEV_CAP_VXLAN); in mlx4_QUERY_DEV_CAP_wrapper()
1205 MLX4_PUT(outbox->buf, field, QUERY_DEV_CAP_PORT_BEACON_OFFSET); in mlx4_QUERY_DEV_CAP_wrapper()
1210 MLX4_PUT(outbox->buf, field, QUERY_DEV_CAP_BF_OFFSET); in mlx4_QUERY_DEV_CAP_wrapper()
1216 MLX4_PUT(outbox->buf, bmme_flags, QUERY_DEV_CAP_BMME_FLAGS_OFFSET); in mlx4_QUERY_DEV_CAP_wrapper()
1223 MLX4_PUT(outbox->buf, field, in mlx4_QUERY_DEV_CAP_wrapper()
1230 MLX4_PUT(outbox->buf, field, QUERY_DEV_CAP_FLOW_STEERING_IPOIB_OFFSET); in mlx4_QUERY_DEV_CAP_wrapper()
1236 MLX4_PUT(outbox->buf, field32, QUERY_DEV_CAP_EXT_2_FLAGS_OFFSET); in mlx4_QUERY_DEV_CAP_wrapper()
1241 MLX4_PUT(outbox->buf, field, QUERY_DEV_CAP_ECN_QCN_VER_OFFSET); in mlx4_QUERY_DEV_CAP_wrapper()
1245 MLX4_PUT(outbox->buf, field16, QUERY_DEV_CAP_QP_RATE_LIMIT_NUM_OFFSET); in mlx4_QUERY_DEV_CAP_wrapper()
1250 MLX4_PUT(outbox->buf, field, QUERY_DEV_CAP_CQ_EQ_CACHE_LINE_STRIDE); in mlx4_QUERY_DEV_CAP_wrapper()
1255 MLX4_PUT(outbox->buf, field, QUERY_DEV_CAP_CONFIG_DEV_OFFSET); in mlx4_QUERY_DEV_CAP_wrapper()
1297 MLX4_PUT(outbox->buf, def_mac, QUERY_PORT_MAC_OFFSET); in mlx4_QUERY_PORT_wrapper()
1314 MLX4_PUT(outbox->buf, port_type, in mlx4_QUERY_PORT_wrapper()
1321 MLX4_PUT(outbox->buf, short_field, in mlx4_QUERY_PORT_wrapper()
1325 MLX4_PUT(outbox->buf, short_field, in mlx4_QUERY_PORT_wrapper()
1799 MLX4_PUT(inbox, (u8)((ilog2(dev->caps.eqe_size) - 5) << 4 | in mlx4_INIT_HCA()
1812 MLX4_PUT(inbox, param->qpc_base, INIT_HCA_QPC_BASE_OFFSET); in mlx4_INIT_HCA()
1813 MLX4_PUT(inbox, param->log_num_qps, INIT_HCA_LOG_QP_OFFSET); in mlx4_INIT_HCA()
1814 MLX4_PUT(inbox, param->srqc_base, INIT_HCA_SRQC_BASE_OFFSET); in mlx4_INIT_HCA()
1815 MLX4_PUT(inbox, param->log_num_srqs, INIT_HCA_LOG_SRQ_OFFSET); in mlx4_INIT_HCA()
1816 MLX4_PUT(inbox, param->cqc_base, INIT_HCA_CQC_BASE_OFFSET); in mlx4_INIT_HCA()
1817 MLX4_PUT(inbox, param->log_num_cqs, INIT_HCA_LOG_CQ_OFFSET); in mlx4_INIT_HCA()
1818 MLX4_PUT(inbox, param->altc_base, INIT_HCA_ALTC_BASE_OFFSET); in mlx4_INIT_HCA()
1819 MLX4_PUT(inbox, param->auxc_base, INIT_HCA_AUXC_BASE_OFFSET); in mlx4_INIT_HCA()
1820 MLX4_PUT(inbox, param->eqc_base, INIT_HCA_EQC_BASE_OFFSET); in mlx4_INIT_HCA()
1821 MLX4_PUT(inbox, param->log_num_eqs, INIT_HCA_LOG_EQ_OFFSET); in mlx4_INIT_HCA()
1822 MLX4_PUT(inbox, param->num_sys_eqs, INIT_HCA_NUM_SYS_EQS_OFFSET); in mlx4_INIT_HCA()
1823 MLX4_PUT(inbox, param->rdmarc_base, INIT_HCA_RDMARC_BASE_OFFSET); in mlx4_INIT_HCA()
1824 MLX4_PUT(inbox, param->log_rd_per_qp, INIT_HCA_LOG_RD_OFFSET); in mlx4_INIT_HCA()
1833 MLX4_PUT(inbox, param->mc_base, INIT_HCA_FS_BASE_OFFSET); in mlx4_INIT_HCA()
1834 MLX4_PUT(inbox, param->log_mc_entry_sz, in mlx4_INIT_HCA()
1836 MLX4_PUT(inbox, param->log_mc_table_sz, in mlx4_INIT_HCA()
1843 MLX4_PUT(inbox, in mlx4_INIT_HCA()
1846 MLX4_PUT(inbox, (u16) MLX4_FS_NUM_OF_L2_ADDR, in mlx4_INIT_HCA()
1851 MLX4_PUT(inbox, (u8) (MLX4_FS_UDP_UC_EN | MLX4_FS_TCP_UC_EN), in mlx4_INIT_HCA()
1853 MLX4_PUT(inbox, (u16) MLX4_FS_NUM_OF_L2_ADDR, in mlx4_INIT_HCA()
1858 MLX4_PUT(inbox, in mlx4_INIT_HCA()
1863 MLX4_PUT(inbox, param->mc_base, INIT_HCA_MC_BASE_OFFSET); in mlx4_INIT_HCA()
1864 MLX4_PUT(inbox, param->log_mc_entry_sz, in mlx4_INIT_HCA()
1866 MLX4_PUT(inbox, param->log_mc_hash_sz, in mlx4_INIT_HCA()
1868 MLX4_PUT(inbox, param->log_mc_table_sz, in mlx4_INIT_HCA()
1871 MLX4_PUT(inbox, (u8) (1 << 3), in mlx4_INIT_HCA()
1877 MLX4_PUT(inbox, param->dmpt_base, INIT_HCA_DMPT_BASE_OFFSET); in mlx4_INIT_HCA()
1878 MLX4_PUT(inbox, param->mw_enabled, INIT_HCA_TPT_MW_OFFSET); in mlx4_INIT_HCA()
1879 MLX4_PUT(inbox, param->log_mpt_sz, INIT_HCA_LOG_MPT_SZ_OFFSET); in mlx4_INIT_HCA()
1880 MLX4_PUT(inbox, param->mtt_base, INIT_HCA_MTT_BASE_OFFSET); in mlx4_INIT_HCA()
1881 MLX4_PUT(inbox, param->cmpt_base, INIT_HCA_CMPT_BASE_OFFSET); in mlx4_INIT_HCA()
1885 MLX4_PUT(inbox, param->uar_page_sz, INIT_HCA_UAR_PAGE_SZ_OFFSET); in mlx4_INIT_HCA()
1886 MLX4_PUT(inbox, param->log_uar_sz, INIT_HCA_LOG_UAR_SZ_OFFSET); in mlx4_INIT_HCA()
1891 MLX4_PUT(inbox, parser_params, INIT_HCA_VXLAN_OFFSET); in mlx4_INIT_HCA()
2146 MLX4_PUT(inbox, flags, INIT_PORT_FLAGS_OFFSET); in mlx4_INIT_PORT()
2149 MLX4_PUT(inbox, field, INIT_PORT_MTU_OFFSET); in mlx4_INIT_PORT()
2151 MLX4_PUT(inbox, field, INIT_PORT_MAX_GID_OFFSET); in mlx4_INIT_PORT()
2153 MLX4_PUT(inbox, field, INIT_PORT_MAX_PKEY_OFFSET); in mlx4_INIT_PORT()